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[/] [openmsp430/] [trunk/] [fpga/] [altera_de0_nano_soc/] [doc/] [Terasic/] [DE0_NANO_SOC/] [Demonstrations/] [FPGA/] [DE0_NANO_SOC_Default/] [DE0_NANO_SOC_Default.htm] - Rev 221

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<html>
<body>
<h1 align="center">DE0-Nano-SoC Board Configuration</h1>
<br />
<br />
<h2 align="left">Pin Assignments:</h2>
<ul>
<a href="#ADC"><li>ADC</li></a>
<br />
<a href="#ARDUINO"><li>ARDUINO</li></a>
<br />
<a href="#CLOCK"><li>CLOCK</li></a>
<br />
<a href="#HPS"><li>HPS</li></a>
<br />
<a href="#KEY"><li>KEY</li></a>
<br />
<a href="#LED"><li>LED</li></a>
<br />
<a href="#SW"><li>SW</li></a>
<br />
<a href="#GPIO_0"><li>GPIO_0</li></a>
<br />
<a href="#GPIO_1"><li>GPIO_1</li></a>
<br />
</ul>
<br />
<br />
<br />
<h2 align="left">Pin Assignment Table:</h2>
<h2><a name="ADC"></a></h2><table border="3">
<caption  align="left">ADC</caption>
<br />
<br />
<tr>
   <th align="left" bgcolor="Khaki">Name</th>
   <th align="left" bgcolor="Khaki">Location</th>
   <th align="left" bgcolor="Khaki">Direction</th>
   <th align="left" bgcolor="Khaki">Standard</th>
</tr>
<tr>
   <td align="left">ADC_CONVST</td>
   <td align="left">U9</td>
   <td align="left">output</td>
   <td align="left">3.3-V LVTTL</td>
</tr>
<tr>
   <td align="left">ADC_SCK</td>
   <td align="left">V10</td>
   <td align="left">output</td>
   <td align="left">3.3-V LVTTL</td>
</tr>
<tr>
   <td align="left">ADC_SDI</td>
   <td align="left">AC4</td>
   <td align="left">output</td>
   <td align="left">3.3-V LVTTL</td>
</tr>
<tr>
   <td align="left">ADC_SDO</td>
   <td align="left">AD4</td>
   <td align="left">input </td>
   <td align="left">3.3-V LVTTL</td>
</tr>
</table>
<h2><a name="ARDUINO"></a></h2><table border="3">
<caption  align="left">ARDUINO</caption>
<br />
<br />
<tr>
   <th align="left" bgcolor="Khaki">Name</th>
   <th align="left" bgcolor="Khaki">Location</th>
   <th align="left" bgcolor="Khaki">Direction</th>
   <th align="left" bgcolor="Khaki">Standard</th>
</tr>
<tr>
   <td align="left">ARDUINO_IO[0]</td>
   <td align="left">AG13</td>
   <td align="left">inout </td>
   <td align="left">3.3-V LVTTL</td>
</tr>
<tr>
   <td align="left">ARDUINO_IO[1]</td>
   <td align="left">AF13</td>
   <td align="left">inout </td>
   <td align="left">3.3-V LVTTL</td>
</tr>
<tr>
   <td align="left">ARDUINO_IO[2]</td>
   <td align="left">AG10</td>
   <td align="left">inout </td>
   <td align="left">3.3-V LVTTL</td>
</tr>
<tr>
   <td align="left">ARDUINO_IO[3]</td>
   <td align="left">AG9</td>
   <td align="left">inout </td>
   <td align="left">3.3-V LVTTL</td>
</tr>
<tr>
   <td align="left">ARDUINO_IO[4]</td>
   <td align="left">U14</td>
   <td align="left">inout </td>
   <td align="left">3.3-V LVTTL</td>
</tr>
<tr>
   <td align="left">ARDUINO_IO[5]</td>
   <td align="left">U13</td>
   <td align="left">inout </td>
   <td align="left">3.3-V LVTTL</td>
</tr>
<tr>
   <td align="left">ARDUINO_IO[6]</td>
   <td align="left">AG8</td>
   <td align="left">inout </td>
   <td align="left">3.3-V LVTTL</td>
</tr>
<tr>
   <td align="left">ARDUINO_IO[7]</td>
   <td align="left">AH8</td>
   <td align="left">inout </td>
   <td align="left">3.3-V LVTTL</td>
</tr>
<tr>
   <td align="left">ARDUINO_IO[8]</td>
   <td align="left">AF17</td>
   <td align="left">inout </td>
   <td align="left">3.3-V LVTTL</td>
</tr>
<tr>
   <td align="left">ARDUINO_IO[9]</td>
   <td align="left">AE15</td>
   <td align="left">inout </td>
   <td align="left">3.3-V LVTTL</td>
</tr>
<tr>
   <td align="left">ARDUINO_IO[10]</td>
   <td align="left">AF15</td>
   <td align="left">inout </td>
   <td align="left">3.3-V LVTTL</td>
</tr>
<tr>
   <td align="left">ARDUINO_IO[11]</td>
   <td align="left">AG16</td>
   <td align="left">inout </td>
   <td align="left">3.3-V LVTTL</td>
</tr>
<tr>
   <td align="left">ARDUINO_IO[12]</td>
   <td align="left">AH11</td>
   <td align="left">inout </td>
   <td align="left">3.3-V LVTTL</td>
</tr>
<tr>
   <td align="left">ARDUINO_IO[13]</td>
   <td align="left">AH12</td>
   <td align="left">inout </td>
   <td align="left">3.3-V LVTTL</td>
</tr>
<tr>
   <td align="left">ARDUINO_IO[14]</td>
   <td align="left">AH9</td>
   <td align="left">inout </td>
   <td align="left">3.3-V LVTTL</td>
</tr>
<tr>
   <td align="left">ARDUINO_IO[15]</td>
   <td align="left">AG11</td>
   <td align="left">inout </td>
   <td align="left">3.3-V LVTTL</td>
</tr>
<tr>
   <td align="left">ARDUINO_RESET_N</td>
   <td align="left">AH7</td>
   <td align="left">inout </td>
   <td align="left">3.3-V LVTTL</td>
</tr>
</table>
<h2><a name="CLOCK"></a></h2><table border="3">
<caption  align="left">CLOCK</caption>
<br />
<br />
<tr>
   <th align="left" bgcolor="Khaki">Name</th>
   <th align="left" bgcolor="Khaki">Location</th>
   <th align="left" bgcolor="Khaki">Direction</th>
   <th align="left" bgcolor="Khaki">Standard</th>
</tr>
<tr>
   <td align="left">FPGA_CLK1_50</td>
   <td align="left">V11</td>
   <td align="left">input </td>
   <td align="left">3.3-V LVTTL</td>
</tr>
<tr>
   <td align="left">FPGA_CLK2_50</td>
   <td align="left">Y13</td>
   <td align="left">input </td>
   <td align="left">3.3-V LVTTL</td>
</tr>
<tr>
   <td align="left">FPGA_CLK3_50</td>
   <td align="left">E11</td>
   <td align="left">input </td>
   <td align="left">3.3-V LVTTL</td>
</tr>
</table>
<h2><a name="HPS"></a></h2><table border="3">
<caption  align="left">HPS</caption>
<br />
<br />
<tr>
   <th align="left" bgcolor="Khaki">Name</th>
   <th align="left" bgcolor="Khaki">Location</th>
   <th align="left" bgcolor="Khaki">Direction</th>
   <th align="left" bgcolor="Khaki">Standard</th>
</tr>
<tr>
   <td align="left">HPS_CONV_USB_N</td>
   <td align="left"></td>
   <td align="left">inout </td>
   <td align="left">3.3-V LVTTL</td>
</tr>
<tr>
   <td align="left">HPS_DDR3_ADDR[0]</td>
   <td align="left"></td>
   <td align="left">output</td>
   <td align="left">SSTL-15 Class I</td>
</tr>
<tr>
   <td align="left">HPS_DDR3_ADDR[1]</td>
   <td align="left"></td>
   <td align="left">output</td>
   <td align="left">SSTL-15 Class I</td>
</tr>
<tr>
   <td align="left">HPS_DDR3_ADDR[2]</td>
   <td align="left"></td>
   <td align="left">output</td>
   <td align="left">SSTL-15 Class I</td>
</tr>
<tr>
   <td align="left">HPS_DDR3_ADDR[3]</td>
   <td align="left"></td>
   <td align="left">output</td>
   <td align="left">SSTL-15 Class I</td>
</tr>
<tr>
   <td align="left">HPS_DDR3_ADDR[4]</td>
   <td align="left"></td>
   <td align="left">output</td>
   <td align="left">SSTL-15 Class I</td>
</tr>
<tr>
   <td align="left">HPS_DDR3_ADDR[5]</td>
   <td align="left"></td>
   <td align="left">output</td>
   <td align="left">SSTL-15 Class I</td>
</tr>
<tr>
   <td align="left">HPS_DDR3_ADDR[6]</td>
   <td align="left"></td>
   <td align="left">output</td>
   <td align="left">SSTL-15 Class I</td>
</tr>
<tr>
   <td align="left">HPS_DDR3_ADDR[7]</td>
   <td align="left"></td>
   <td align="left">output</td>
   <td align="left">SSTL-15 Class I</td>
</tr>
<tr>
   <td align="left">HPS_DDR3_ADDR[8]</td>
   <td align="left"></td>
   <td align="left">output</td>
   <td align="left">SSTL-15 Class I</td>
</tr>
<tr>
   <td align="left">HPS_DDR3_ADDR[9]</td>
   <td align="left"></td>
   <td align="left">output</td>
   <td align="left">SSTL-15 Class I</td>
</tr>
<tr>
   <td align="left">HPS_DDR3_ADDR[10]</td>
   <td align="left"></td>
   <td align="left">output</td>
   <td align="left">SSTL-15 Class I</td>
</tr>
<tr>
   <td align="left">HPS_DDR3_ADDR[11]</td>
   <td align="left"></td>
   <td align="left">output</td>
   <td align="left">SSTL-15 Class I</td>
</tr>
<tr>
   <td align="left">HPS_DDR3_ADDR[12]</td>
   <td align="left"></td>
   <td align="left">output</td>
   <td align="left">SSTL-15 Class I</td>
</tr>
<tr>
   <td align="left">HPS_DDR3_ADDR[13]</td>
   <td align="left"></td>
   <td align="left">output</td>
   <td align="left">SSTL-15 Class I</td>
</tr>
<tr>
   <td align="left">HPS_DDR3_ADDR[14]</td>
   <td align="left"></td>
   <td align="left">output</td>
   <td align="left">SSTL-15 Class I</td>
</tr>
<tr>
   <td align="left">HPS_DDR3_BA[0]</td>
   <td align="left"></td>
   <td align="left">output</td>
   <td align="left">SSTL-15 Class I</td>
</tr>
<tr>
   <td align="left">HPS_DDR3_BA[1]</td>
   <td align="left"></td>
   <td align="left">output</td>
   <td align="left">SSTL-15 Class I</td>
</tr>
<tr>
   <td align="left">HPS_DDR3_BA[2]</td>
   <td align="left"></td>
   <td align="left">output</td>
   <td align="left">SSTL-15 Class I</td>
</tr>
<tr>
   <td align="left">HPS_DDR3_CAS_N</td>
   <td align="left"></td>
   <td align="left">output</td>
   <td align="left">SSTL-15 Class I</td>
</tr>
<tr>
   <td align="left">HPS_DDR3_CKE</td>
   <td align="left"></td>
   <td align="left">output</td>
   <td align="left">SSTL-15 Class I</td>
</tr>
<tr>
   <td align="left">HPS_DDR3_CK_N</td>
   <td align="left"></td>
   <td align="left">output</td>
   <td align="left">Differential 1.5-V SSTL Class I</td>
</tr>
<tr>
   <td align="left">HPS_DDR3_CK_P</td>
   <td align="left"></td>
   <td align="left">output</td>
   <td align="left">Differential 1.5-V SSTL Class I</td>
</tr>
<tr>
   <td align="left">HPS_DDR3_CS_N</td>
   <td align="left"></td>
   <td align="left">output</td>
   <td align="left">SSTL-15 Class I</td>
</tr>
<tr>
   <td align="left">HPS_DDR3_DM[0]</td>
   <td align="left"></td>
   <td align="left">output</td>
   <td align="left">SSTL-15 Class I</td>
</tr>
<tr>
   <td align="left">HPS_DDR3_DM[1]</td>
   <td align="left"></td>
   <td align="left">output</td>
   <td align="left">SSTL-15 Class I</td>
</tr>
<tr>
   <td align="left">HPS_DDR3_DM[2]</td>
   <td align="left"></td>
   <td align="left">output</td>
   <td align="left">SSTL-15 Class I</td>
</tr>
<tr>
   <td align="left">HPS_DDR3_DM[3]</td>
   <td align="left"></td>
   <td align="left">output</td>
   <td align="left">SSTL-15 Class I</td>
</tr>
<tr>
   <td align="left">HPS_DDR3_DQ[0]</td>
   <td align="left"></td>
   <td align="left">inout </td>
   <td align="left">SSTL-15 Class I</td>
</tr>
<tr>
   <td align="left">HPS_DDR3_DQ[1]</td>
   <td align="left"></td>
   <td align="left">inout </td>
   <td align="left">SSTL-15 Class I</td>
</tr>
<tr>
   <td align="left">HPS_DDR3_DQ[2]</td>
   <td align="left"></td>
   <td align="left">inout </td>
   <td align="left">SSTL-15 Class I</td>
</tr>
<tr>
   <td align="left">HPS_DDR3_DQ[3]</td>
   <td align="left"></td>
   <td align="left">inout </td>
   <td align="left">SSTL-15 Class I</td>
</tr>
<tr>
   <td align="left">HPS_DDR3_DQ[4]</td>
   <td align="left"></td>
   <td align="left">inout </td>
   <td align="left">SSTL-15 Class I</td>
</tr>
<tr>
   <td align="left">HPS_DDR3_DQ[5]</td>
   <td align="left"></td>
   <td align="left">inout </td>
   <td align="left">SSTL-15 Class I</td>
</tr>
<tr>
   <td align="left">HPS_DDR3_DQ[6]</td>
   <td align="left"></td>
   <td align="left">inout </td>
   <td align="left">SSTL-15 Class I</td>
</tr>
<tr>
   <td align="left">HPS_DDR3_DQ[7]</td>
   <td align="left"></td>
   <td align="left">inout </td>
   <td align="left">SSTL-15 Class I</td>
</tr>
<tr>
   <td align="left">HPS_DDR3_DQ[8]</td>
   <td align="left"></td>
   <td align="left">inout </td>
   <td align="left">SSTL-15 Class I</td>
</tr>
<tr>
   <td align="left">HPS_DDR3_DQ[9]</td>
   <td align="left"></td>
   <td align="left">inout </td>
   <td align="left">SSTL-15 Class I</td>
</tr>
<tr>
   <td align="left">HPS_DDR3_DQ[10]</td>
   <td align="left"></td>
   <td align="left">inout </td>
   <td align="left">SSTL-15 Class I</td>
</tr>
<tr>
   <td align="left">HPS_DDR3_DQ[11]</td>
   <td align="left"></td>
   <td align="left">inout </td>
   <td align="left">SSTL-15 Class I</td>
</tr>
<tr>
   <td align="left">HPS_DDR3_DQ[12]</td>
   <td align="left"></td>
   <td align="left">inout </td>
   <td align="left">SSTL-15 Class I</td>
</tr>
<tr>
   <td align="left">HPS_DDR3_DQ[13]</td>
   <td align="left"></td>
   <td align="left">inout </td>
   <td align="left">SSTL-15 Class I</td>
</tr>
<tr>
   <td align="left">HPS_DDR3_DQ[14]</td>
   <td align="left"></td>
   <td align="left">inout </td>
   <td align="left">SSTL-15 Class I</td>
</tr>
<tr>
   <td align="left">HPS_DDR3_DQ[15]</td>
   <td align="left"></td>
   <td align="left">inout </td>
   <td align="left">SSTL-15 Class I</td>
</tr>
<tr>
   <td align="left">HPS_DDR3_DQ[16]</td>
   <td align="left"></td>
   <td align="left">inout </td>
   <td align="left">SSTL-15 Class I</td>
</tr>
<tr>
   <td align="left">HPS_DDR3_DQ[17]</td>
   <td align="left"></td>
   <td align="left">inout </td>
   <td align="left">SSTL-15 Class I</td>
</tr>
<tr>
   <td align="left">HPS_DDR3_DQ[18]</td>
   <td align="left"></td>
   <td align="left">inout </td>
   <td align="left">SSTL-15 Class I</td>
</tr>
<tr>
   <td align="left">HPS_DDR3_DQ[19]</td>
   <td align="left"></td>
   <td align="left">inout </td>
   <td align="left">SSTL-15 Class I</td>
</tr>
<tr>
   <td align="left">HPS_DDR3_DQ[20]</td>
   <td align="left"></td>
   <td align="left">inout </td>
   <td align="left">SSTL-15 Class I</td>
</tr>
<tr>
   <td align="left">HPS_DDR3_DQ[21]</td>
   <td align="left"></td>
   <td align="left">inout </td>
   <td align="left">SSTL-15 Class I</td>
</tr>
<tr>
   <td align="left">HPS_DDR3_DQ[22]</td>
   <td align="left"></td>
   <td align="left">inout </td>
   <td align="left">SSTL-15 Class I</td>
</tr>
<tr>
   <td align="left">HPS_DDR3_DQ[23]</td>
   <td align="left"></td>
   <td align="left">inout </td>
   <td align="left">SSTL-15 Class I</td>
</tr>
<tr>
   <td align="left">HPS_DDR3_DQ[24]</td>
   <td align="left"></td>
   <td align="left">inout </td>
   <td align="left">SSTL-15 Class I</td>
</tr>
<tr>
   <td align="left">HPS_DDR3_DQ[25]</td>
   <td align="left"></td>
   <td align="left">inout </td>
   <td align="left">SSTL-15 Class I</td>
</tr>
<tr>
   <td align="left">HPS_DDR3_DQ[26]</td>
   <td align="left"></td>
   <td align="left">inout </td>
   <td align="left">SSTL-15 Class I</td>
</tr>
<tr>
   <td align="left">HPS_DDR3_DQ[27]</td>
   <td align="left"></td>
   <td align="left">inout </td>
   <td align="left">SSTL-15 Class I</td>
</tr>
<tr>
   <td align="left">HPS_DDR3_DQ[28]</td>
   <td align="left"></td>
   <td align="left">inout </td>
   <td align="left">SSTL-15 Class I</td>
</tr>
<tr>
   <td align="left">HPS_DDR3_DQ[29]</td>
   <td align="left"></td>
   <td align="left">inout </td>
   <td align="left">SSTL-15 Class I</td>
</tr>
<tr>
   <td align="left">HPS_DDR3_DQ[30]</td>
   <td align="left"></td>
   <td align="left">inout </td>
   <td align="left">SSTL-15 Class I</td>
</tr>
<tr>
   <td align="left">HPS_DDR3_DQ[31]</td>
   <td align="left"></td>
   <td align="left">inout </td>
   <td align="left">SSTL-15 Class I</td>
</tr>
<tr>
   <td align="left">HPS_DDR3_DQS_N[0]</td>
   <td align="left"></td>
   <td align="left">inout </td>
   <td align="left">Differential 1.5-V SSTL Class I</td>
</tr>
<tr>
   <td align="left">HPS_DDR3_DQS_N[1]</td>
   <td align="left"></td>
   <td align="left">inout </td>
   <td align="left">Differential 1.5-V SSTL Class I</td>
</tr>
<tr>
   <td align="left">HPS_DDR3_DQS_N[2]</td>
   <td align="left"></td>
   <td align="left">inout </td>
   <td align="left">Differential 1.5-V SSTL Class I</td>
</tr>
<tr>
   <td align="left">HPS_DDR3_DQS_N[3]</td>
   <td align="left"></td>
   <td align="left">inout </td>
   <td align="left">Differential 1.5-V SSTL Class I</td>
</tr>
<tr>
   <td align="left">HPS_DDR3_DQS_P[0]</td>
   <td align="left"></td>
   <td align="left">inout </td>
   <td align="left">Differential 1.5-V SSTL Class I</td>
</tr>
<tr>
   <td align="left">HPS_DDR3_DQS_P[1]</td>
   <td align="left"></td>
   <td align="left">inout </td>
   <td align="left">Differential 1.5-V SSTL Class I</td>
</tr>
<tr>
   <td align="left">HPS_DDR3_DQS_P[2]</td>
   <td align="left"></td>
   <td align="left">inout </td>
   <td align="left">Differential 1.5-V SSTL Class I</td>
</tr>
<tr>
   <td align="left">HPS_DDR3_DQS_P[3]</td>
   <td align="left"></td>
   <td align="left">inout </td>
   <td align="left">Differential 1.5-V SSTL Class I</td>
</tr>
<tr>
   <td align="left">HPS_DDR3_ODT</td>
   <td align="left"></td>
   <td align="left">output</td>
   <td align="left">SSTL-15 Class I</td>
</tr>
<tr>
   <td align="left">HPS_DDR3_RAS_N</td>
   <td align="left"></td>
   <td align="left">output</td>
   <td align="left">SSTL-15 Class I</td>
</tr>
<tr>
   <td align="left">HPS_DDR3_RESET_N</td>
   <td align="left"></td>
   <td align="left">output</td>
   <td align="left">SSTL-15 Class I</td>
</tr>
<tr>
   <td align="left">HPS_DDR3_RZQ</td>
   <td align="left"></td>
   <td align="left">input </td>
   <td align="left">1.5 V</td>
</tr>
<tr>
   <td align="left">HPS_DDR3_WE_N</td>
   <td align="left"></td>
   <td align="left">output</td>
   <td align="left">SSTL-15 Class I</td>
</tr>
<tr>
   <td align="left">HPS_ENET_GTX_CLK</td>
   <td align="left"></td>
   <td align="left">output</td>
   <td align="left">3.3-V LVTTL</td>
</tr>
<tr>
   <td align="left">HPS_ENET_INT_N</td>
   <td align="left"></td>
   <td align="left">inout </td>
   <td align="left">3.3-V LVTTL</td>
</tr>
<tr>
   <td align="left">HPS_ENET_MDC</td>
   <td align="left"></td>
   <td align="left">output</td>
   <td align="left">3.3-V LVTTL</td>
</tr>
<tr>
   <td align="left">HPS_ENET_MDIO</td>
   <td align="left"></td>
   <td align="left">inout </td>
   <td align="left">3.3-V LVTTL</td>
</tr>
<tr>
   <td align="left">HPS_ENET_RX_CLK</td>
   <td align="left"></td>
   <td align="left">input </td>
   <td align="left">3.3-V LVTTL</td>
</tr>
<tr>
   <td align="left">HPS_ENET_RX_DATA[0]</td>
   <td align="left"></td>
   <td align="left">input </td>
   <td align="left">3.3-V LVTTL</td>
</tr>
<tr>
   <td align="left">HPS_ENET_RX_DATA[1]</td>
   <td align="left"></td>
   <td align="left">input </td>
   <td align="left">3.3-V LVTTL</td>
</tr>
<tr>
   <td align="left">HPS_ENET_RX_DATA[2]</td>
   <td align="left"></td>
   <td align="left">input </td>
   <td align="left">3.3-V LVTTL</td>
</tr>
<tr>
   <td align="left">HPS_ENET_RX_DATA[3]</td>
   <td align="left"></td>
   <td align="left">input </td>
   <td align="left">3.3-V LVTTL</td>
</tr>
<tr>
   <td align="left">HPS_ENET_RX_DV</td>
   <td align="left"></td>
   <td align="left">input </td>
   <td align="left">3.3-V LVTTL</td>
</tr>
<tr>
   <td align="left">HPS_ENET_TX_DATA[0]</td>
   <td align="left"></td>
   <td align="left">output</td>
   <td align="left">3.3-V LVTTL</td>
</tr>
<tr>
   <td align="left">HPS_ENET_TX_DATA[1]</td>
   <td align="left"></td>
   <td align="left">output</td>
   <td align="left">3.3-V LVTTL</td>
</tr>
<tr>
   <td align="left">HPS_ENET_TX_DATA[2]</td>
   <td align="left"></td>
   <td align="left">output</td>
   <td align="left">3.3-V LVTTL</td>
</tr>
<tr>
   <td align="left">HPS_ENET_TX_DATA[3]</td>
   <td align="left"></td>
   <td align="left">output</td>
   <td align="left">3.3-V LVTTL</td>
</tr>
<tr>
   <td align="left">HPS_ENET_TX_EN</td>
   <td align="left"></td>
   <td align="left">output</td>
   <td align="left">3.3-V LVTTL</td>
</tr>
<tr>
   <td align="left">HPS_GSENSOR_INT</td>
   <td align="left"></td>
   <td align="left">inout </td>
   <td align="left">3.3-V LVTTL</td>
</tr>
<tr>
   <td align="left">HPS_I2C0_SCLK</td>
   <td align="left"></td>
   <td align="left">inout </td>
   <td align="left">3.3-V LVTTL</td>
</tr>
<tr>
   <td align="left">HPS_I2C0_SDAT</td>
   <td align="left"></td>
   <td align="left">inout </td>
   <td align="left">3.3-V LVTTL</td>
</tr>
<tr>
   <td align="left">HPS_I2C1_SCLK</td>
   <td align="left"></td>
   <td align="left">inout </td>
   <td align="left">3.3-V LVTTL</td>
</tr>
<tr>
   <td align="left">HPS_I2C1_SDAT</td>
   <td align="left"></td>
   <td align="left">inout </td>
   <td align="left">3.3-V LVTTL</td>
</tr>
<tr>
   <td align="left">HPS_KEY</td>
   <td align="left"></td>
   <td align="left">inout </td>
   <td align="left">3.3-V LVTTL</td>
</tr>
<tr>
   <td align="left">HPS_LED</td>
   <td align="left"></td>
   <td align="left">inout </td>
   <td align="left">3.3-V LVTTL</td>
</tr>
<tr>
   <td align="left">HPS_LTC_GPIO</td>
   <td align="left"></td>
   <td align="left">inout </td>
   <td align="left">3.3-V LVTTL</td>
</tr>
<tr>
   <td align="left">HPS_SD_CLK</td>
   <td align="left"></td>
   <td align="left">output</td>
   <td align="left">3.3-V LVTTL</td>
</tr>
<tr>
   <td align="left">HPS_SD_CMD</td>
   <td align="left"></td>
   <td align="left">inout </td>
   <td align="left">3.3-V LVTTL</td>
</tr>
<tr>
   <td align="left">HPS_SD_DATA[0]</td>
   <td align="left"></td>
   <td align="left">inout </td>
   <td align="left">3.3-V LVTTL</td>
</tr>
<tr>
   <td align="left">HPS_SD_DATA[1]</td>
   <td align="left"></td>
   <td align="left">inout </td>
   <td align="left">3.3-V LVTTL</td>
</tr>
<tr>
   <td align="left">HPS_SD_DATA[2]</td>
   <td align="left"></td>
   <td align="left">inout </td>
   <td align="left">3.3-V LVTTL</td>
</tr>
<tr>
   <td align="left">HPS_SD_DATA[3]</td>
   <td align="left"></td>
   <td align="left">inout </td>
   <td align="left">3.3-V LVTTL</td>
</tr>
<tr>
   <td align="left">HPS_SPIM_CLK</td>
   <td align="left"></td>
   <td align="left">output</td>
   <td align="left">3.3-V LVTTL</td>
</tr>
<tr>
   <td align="left">HPS_SPIM_MISO</td>
   <td align="left"></td>
   <td align="left">input </td>
   <td align="left">3.3-V LVTTL</td>
</tr>
<tr>
   <td align="left">HPS_SPIM_MOSI</td>
   <td align="left"></td>
   <td align="left">output</td>
   <td align="left">3.3-V LVTTL</td>
</tr>
<tr>
   <td align="left">HPS_SPIM_SS</td>
   <td align="left"></td>
   <td align="left">inout </td>
   <td align="left">3.3-V LVTTL</td>
</tr>
<tr>
   <td align="left">HPS_UART_RX</td>
   <td align="left"></td>
   <td align="left">input </td>
   <td align="left">3.3-V LVTTL</td>
</tr>
<tr>
   <td align="left">HPS_UART_TX</td>
   <td align="left"></td>
   <td align="left">output</td>
   <td align="left">3.3-V LVTTL</td>
</tr>
<tr>
   <td align="left">HPS_USB_CLKOUT</td>
   <td align="left"></td>
   <td align="left">input </td>
   <td align="left">3.3-V LVTTL</td>
</tr>
<tr>
   <td align="left">HPS_USB_DATA[0]</td>
   <td align="left"></td>
   <td align="left">inout </td>
   <td align="left">3.3-V LVTTL</td>
</tr>
<tr>
   <td align="left">HPS_USB_DATA[1]</td>
   <td align="left"></td>
   <td align="left">inout </td>
   <td align="left">3.3-V LVTTL</td>
</tr>
<tr>
   <td align="left">HPS_USB_DATA[2]</td>
   <td align="left"></td>
   <td align="left">inout </td>
   <td align="left">3.3-V LVTTL</td>
</tr>
<tr>
   <td align="left">HPS_USB_DATA[3]</td>
   <td align="left"></td>
   <td align="left">inout </td>
   <td align="left">3.3-V LVTTL</td>
</tr>
<tr>
   <td align="left">HPS_USB_DATA[4]</td>
   <td align="left"></td>
   <td align="left">inout </td>
   <td align="left">3.3-V LVTTL</td>
</tr>
<tr>
   <td align="left">HPS_USB_DATA[5]</td>
   <td align="left"></td>
   <td align="left">inout </td>
   <td align="left">3.3-V LVTTL</td>
</tr>
<tr>
   <td align="left">HPS_USB_DATA[6]</td>
   <td align="left"></td>
   <td align="left">inout </td>
   <td align="left">3.3-V LVTTL</td>
</tr>
<tr>
   <td align="left">HPS_USB_DATA[7]</td>
   <td align="left"></td>
   <td align="left">inout </td>
   <td align="left">3.3-V LVTTL</td>
</tr>
<tr>
   <td align="left">HPS_USB_DIR</td>
   <td align="left"></td>
   <td align="left">input </td>
   <td align="left">3.3-V LVTTL</td>
</tr>
<tr>
   <td align="left">HPS_USB_NXT</td>
   <td align="left"></td>
   <td align="left">input </td>
   <td align="left">3.3-V LVTTL</td>
</tr>
<tr>
   <td align="left">HPS_USB_STP</td>
   <td align="left"></td>
   <td align="left">output</td>
   <td align="left">3.3-V LVTTL</td>
</tr>
</table>
<h2><a name="KEY"></a></h2><table border="3">
<caption  align="left">KEY</caption>
<br />
<br />
<tr>
   <th align="left" bgcolor="Khaki">Name</th>
   <th align="left" bgcolor="Khaki">Location</th>
   <th align="left" bgcolor="Khaki">Direction</th>
   <th align="left" bgcolor="Khaki">Standard</th>
</tr>
<tr>
   <td align="left">KEY[0]</td>
   <td align="left">AH17</td>
   <td align="left">input </td>
   <td align="left">3.3-V LVTTL</td>
</tr>
<tr>
   <td align="left">KEY[1]</td>
   <td align="left">AH16</td>
   <td align="left">input </td>
   <td align="left">3.3-V LVTTL</td>
</tr>
</table>
<h2><a name="LED"></a></h2><table border="3">
<caption  align="left">LED</caption>
<br />
<br />
<tr>
   <th align="left" bgcolor="Khaki">Name</th>
   <th align="left" bgcolor="Khaki">Location</th>
   <th align="left" bgcolor="Khaki">Direction</th>
   <th align="left" bgcolor="Khaki">Standard</th>
</tr>
<tr>
   <td align="left">LED[0]</td>
   <td align="left">W15</td>
   <td align="left">output</td>
   <td align="left">3.3-V LVTTL</td>
</tr>
<tr>
   <td align="left">LED[1]</td>
   <td align="left">AA24</td>
   <td align="left">output</td>
   <td align="left">3.3-V LVTTL</td>
</tr>
<tr>
   <td align="left">LED[2]</td>
   <td align="left">V16</td>
   <td align="left">output</td>
   <td align="left">3.3-V LVTTL</td>
</tr>
<tr>
   <td align="left">LED[3]</td>
   <td align="left">V15</td>
   <td align="left">output</td>
   <td align="left">3.3-V LVTTL</td>
</tr>
<tr>
   <td align="left">LED[4]</td>
   <td align="left">AF26</td>
   <td align="left">output</td>
   <td align="left">3.3-V LVTTL</td>
</tr>
<tr>
   <td align="left">LED[5]</td>
   <td align="left">AE26</td>
   <td align="left">output</td>
   <td align="left">3.3-V LVTTL</td>
</tr>
<tr>
   <td align="left">LED[6]</td>
   <td align="left">Y16</td>
   <td align="left">output</td>
   <td align="left">3.3-V LVTTL</td>
</tr>
<tr>
   <td align="left">LED[7]</td>
   <td align="left">AA23</td>
   <td align="left">output</td>
   <td align="left">3.3-V LVTTL</td>
</tr>
</table>
<h2><a name="SW"></a></h2><table border="3">
<caption  align="left">SW</caption>
<br />
<br />
<tr>
   <th align="left" bgcolor="Khaki">Name</th>
   <th align="left" bgcolor="Khaki">Location</th>
   <th align="left" bgcolor="Khaki">Direction</th>
   <th align="left" bgcolor="Khaki">Standard</th>
</tr>
<tr>
   <td align="left">SW[0]</td>
   <td align="left">L10</td>
   <td align="left">input </td>
   <td align="left">3.3-V LVTTL</td>
</tr>
<tr>
   <td align="left">SW[1]</td>
   <td align="left">L9</td>
   <td align="left">input </td>
   <td align="left">3.3-V LVTTL</td>
</tr>
<tr>
   <td align="left">SW[2]</td>
   <td align="left">H6</td>
   <td align="left">input </td>
   <td align="left">3.3-V LVTTL</td>
</tr>
<tr>
   <td align="left">SW[3]</td>
   <td align="left">H5</td>
   <td align="left">input </td>
   <td align="left">3.3-V LVTTL</td>
</tr>
</table>
<h2><a name="GPIO_0"></a></h2><table border="3">
<caption  align="left">GPIO connect to GPIO Default</caption>
<br />
<br />
<tr>
   <th align="left" bgcolor="Khaki">Name</th>
   <th align="left" bgcolor="Khaki">Location</th>
   <th align="left" bgcolor="Khaki">Direction</th>
   <th align="left" bgcolor="Khaki">Standard</th>
   <th align="left" bgcolor="Khaki">GPIO Pin Index</th>
</tr>
<tr>
   <td align="left">GPIO_0[0]</td>
   <td align="left">V12</td>
   <td align="left">inout </td>
   <td align="left">3.3-V LVTTL</td>
   <td align="left">1</td>
</tr>
<tr>
   <td align="left">GPIO_0[1]</td>
   <td align="left">AF7</td>
   <td align="left">inout </td>
   <td align="left">3.3-V LVTTL</td>
   <td align="left">2</td>
</tr>
<tr>
   <td align="left">GPIO_0[2]</td>
   <td align="left">W12</td>
   <td align="left">inout </td>
   <td align="left">3.3-V LVTTL</td>
   <td align="left">3</td>
</tr>
<tr>
   <td align="left">GPIO_0[3]</td>
   <td align="left">AF8</td>
   <td align="left">inout </td>
   <td align="left">3.3-V LVTTL</td>
   <td align="left">4</td>
</tr>
<tr>
   <td align="left">GPIO_0[4]</td>
   <td align="left">Y8</td>
   <td align="left">inout </td>
   <td align="left">3.3-V LVTTL</td>
   <td align="left">5</td>
</tr>
<tr>
   <td align="left">GPIO_0[5]</td>
   <td align="left">AB4</td>
   <td align="left">inout </td>
   <td align="left">3.3-V LVTTL</td>
   <td align="left">6</td>
</tr>
<tr>
   <td align="left">GPIO_0[6]</td>
   <td align="left">W8</td>
   <td align="left">inout </td>
   <td align="left">3.3-V LVTTL</td>
   <td align="left">7</td>
</tr>
<tr>
   <td align="left">GPIO_0[7]</td>
   <td align="left">Y4</td>
   <td align="left">inout </td>
   <td align="left">3.3-V LVTTL</td>
   <td align="left">8</td>
</tr>
<tr>
   <td align="left">GPIO_0[8]</td>
   <td align="left">Y5</td>
   <td align="left">inout </td>
   <td align="left">3.3-V LVTTL</td>
   <td align="left">9</td>
</tr>
<tr>
   <td align="left">GPIO_0[9]</td>
   <td align="left">U11</td>
   <td align="left">inout </td>
   <td align="left">3.3-V LVTTL</td>
   <td align="left">10</td>
</tr>
<tr>
   <td align="left">GPIO_0[10]</td>
   <td align="left">T8</td>
   <td align="left">inout </td>
   <td align="left">3.3-V LVTTL</td>
   <td align="left">13</td>
</tr>
<tr>
   <td align="left">GPIO_0[11]</td>
   <td align="left">T12</td>
   <td align="left">inout </td>
   <td align="left">3.3-V LVTTL</td>
   <td align="left">14</td>
</tr>
<tr>
   <td align="left">GPIO_0[12]</td>
   <td align="left">AH5</td>
   <td align="left">inout </td>
   <td align="left">3.3-V LVTTL</td>
   <td align="left">15</td>
</tr>
<tr>
   <td align="left">GPIO_0[13]</td>
   <td align="left">AH6</td>
   <td align="left">inout </td>
   <td align="left">3.3-V LVTTL</td>
   <td align="left">16</td>
</tr>
<tr>
   <td align="left">GPIO_0[14]</td>
   <td align="left">AH4</td>
   <td align="left">inout </td>
   <td align="left">3.3-V LVTTL</td>
   <td align="left">17</td>
</tr>
<tr>
   <td align="left">GPIO_0[15]</td>
   <td align="left">AG5</td>
   <td align="left">inout </td>
   <td align="left">3.3-V LVTTL</td>
   <td align="left">18</td>
</tr>
<tr>
   <td align="left">GPIO_0[16]</td>
   <td align="left">AH3</td>
   <td align="left">inout </td>
   <td align="left">3.3-V LVTTL</td>
   <td align="left">19</td>
</tr>
<tr>
   <td align="left">GPIO_0[17]</td>
   <td align="left">AH2</td>
   <td align="left">inout </td>
   <td align="left">3.3-V LVTTL</td>
   <td align="left">20</td>
</tr>
<tr>
   <td align="left">GPIO_0[18]</td>
   <td align="left">AF4</td>
   <td align="left">inout </td>
   <td align="left">3.3-V LVTTL</td>
   <td align="left">21</td>
</tr>
<tr>
   <td align="left">GPIO_0[19]</td>
   <td align="left">AG6</td>
   <td align="left">inout </td>
   <td align="left">3.3-V LVTTL</td>
   <td align="left">22</td>
</tr>
<tr>
   <td align="left">GPIO_0[20]</td>
   <td align="left">AF5</td>
   <td align="left">inout </td>
   <td align="left">3.3-V LVTTL</td>
   <td align="left">23</td>
</tr>
<tr>
   <td align="left">GPIO_0[21]</td>
   <td align="left">AE4</td>
   <td align="left">inout </td>
   <td align="left">3.3-V LVTTL</td>
   <td align="left">24</td>
</tr>
<tr>
   <td align="left">GPIO_0[22]</td>
   <td align="left">T13</td>
   <td align="left">inout </td>
   <td align="left">3.3-V LVTTL</td>
   <td align="left">25</td>
</tr>
<tr>
   <td align="left">GPIO_0[23]</td>
   <td align="left">T11</td>
   <td align="left">inout </td>
   <td align="left">3.3-V LVTTL</td>
   <td align="left">26</td>
</tr>
<tr>
   <td align="left">GPIO_0[24]</td>
   <td align="left">AE7</td>
   <td align="left">inout </td>
   <td align="left">3.3-V LVTTL</td>
   <td align="left">27</td>
</tr>
<tr>
   <td align="left">GPIO_0[25]</td>
   <td align="left">AF6</td>
   <td align="left">inout </td>
   <td align="left">3.3-V LVTTL</td>
   <td align="left">28</td>
</tr>
<tr>
   <td align="left">GPIO_0[26]</td>
   <td align="left">AF9</td>
   <td align="left">inout </td>
   <td align="left">3.3-V LVTTL</td>
   <td align="left">31</td>
</tr>
<tr>
   <td align="left">GPIO_0[27]</td>
   <td align="left">AE8</td>
   <td align="left">inout </td>
   <td align="left">3.3-V LVTTL</td>
   <td align="left">32</td>
</tr>
<tr>
   <td align="left">GPIO_0[28]</td>
   <td align="left">AD10</td>
   <td align="left">inout </td>
   <td align="left">3.3-V LVTTL</td>
   <td align="left">33</td>
</tr>
<tr>
   <td align="left">GPIO_0[29]</td>
   <td align="left">AE9</td>
   <td align="left">inout </td>
   <td align="left">3.3-V LVTTL</td>
   <td align="left">34</td>
</tr>
<tr>
   <td align="left">GPIO_0[30]</td>
   <td align="left">AD11</td>
   <td align="left">inout </td>
   <td align="left">3.3-V LVTTL</td>
   <td align="left">35</td>
</tr>
<tr>
   <td align="left">GPIO_0[31]</td>
   <td align="left">AF10</td>
   <td align="left">inout </td>
   <td align="left">3.3-V LVTTL</td>
   <td align="left">36</td>
</tr>
<tr>
   <td align="left">GPIO_0[32]</td>
   <td align="left">AD12</td>
   <td align="left">inout </td>
   <td align="left">3.3-V LVTTL</td>
   <td align="left">37</td>
</tr>
<tr>
   <td align="left">GPIO_0[33]</td>
   <td align="left">AE11</td>
   <td align="left">inout </td>
   <td align="left">3.3-V LVTTL</td>
   <td align="left">38</td>
</tr>
<tr>
   <td align="left">GPIO_0[34]</td>
   <td align="left">AF11</td>
   <td align="left">inout </td>
   <td align="left">3.3-V LVTTL</td>
   <td align="left">39</td>
</tr>
<tr>
   <td align="left">GPIO_0[35]</td>
   <td align="left">AE12</td>
   <td align="left">inout </td>
   <td align="left">3.3-V LVTTL</td>
   <td align="left">40</td>
</tr>
</table>
<h2><a name="GPIO_1"></a></h2><table border="3">
<caption  align="left">GPIO connect to GPIO Default</caption>
<br />
<br />
<tr>
   <th align="left" bgcolor="Khaki">Name</th>
   <th align="left" bgcolor="Khaki">Location</th>
   <th align="left" bgcolor="Khaki">Direction</th>
   <th align="left" bgcolor="Khaki">Standard</th>
   <th align="left" bgcolor="Khaki">GPIO Pin Index</th>
</tr>
<tr>
   <td align="left">GPIO_1[0]</td>
   <td align="left">Y15</td>
   <td align="left">inout </td>
   <td align="left">3.3-V LVTTL</td>
   <td align="left">1</td>
</tr>
<tr>
   <td align="left">GPIO_1[1]</td>
   <td align="left">AG28</td>
   <td align="left">inout </td>
   <td align="left">3.3-V LVTTL</td>
   <td align="left">2</td>
</tr>
<tr>
   <td align="left">GPIO_1[2]</td>
   <td align="left">AA15</td>
   <td align="left">inout </td>
   <td align="left">3.3-V LVTTL</td>
   <td align="left">3</td>
</tr>
<tr>
   <td align="left">GPIO_1[3]</td>
   <td align="left">AH27</td>
   <td align="left">inout </td>
   <td align="left">3.3-V LVTTL</td>
   <td align="left">4</td>
</tr>
<tr>
   <td align="left">GPIO_1[4]</td>
   <td align="left">AG26</td>
   <td align="left">inout </td>
   <td align="left">3.3-V LVTTL</td>
   <td align="left">5</td>
</tr>
<tr>
   <td align="left">GPIO_1[5]</td>
   <td align="left">AH24</td>
   <td align="left">inout </td>
   <td align="left">3.3-V LVTTL</td>
   <td align="left">6</td>
</tr>
<tr>
   <td align="left">GPIO_1[6]</td>
   <td align="left">AF23</td>
   <td align="left">inout </td>
   <td align="left">3.3-V LVTTL</td>
   <td align="left">7</td>
</tr>
<tr>
   <td align="left">GPIO_1[7]</td>
   <td align="left">AE22</td>
   <td align="left">inout </td>
   <td align="left">3.3-V LVTTL</td>
   <td align="left">8</td>
</tr>
<tr>
   <td align="left">GPIO_1[8]</td>
   <td align="left">AF21</td>
   <td align="left">inout </td>
   <td align="left">3.3-V LVTTL</td>
   <td align="left">9</td>
</tr>
<tr>
   <td align="left">GPIO_1[9]</td>
   <td align="left">AG20</td>
   <td align="left">inout </td>
   <td align="left">3.3-V LVTTL</td>
   <td align="left">10</td>
</tr>
<tr>
   <td align="left">GPIO_1[10]</td>
   <td align="left">AG19</td>
   <td align="left">inout </td>
   <td align="left">3.3-V LVTTL</td>
   <td align="left">13</td>
</tr>
<tr>
   <td align="left">GPIO_1[11]</td>
   <td align="left">AF20</td>
   <td align="left">inout </td>
   <td align="left">3.3-V LVTTL</td>
   <td align="left">14</td>
</tr>
<tr>
   <td align="left">GPIO_1[12]</td>
   <td align="left">AC23</td>
   <td align="left">inout </td>
   <td align="left">3.3-V LVTTL</td>
   <td align="left">15</td>
</tr>
<tr>
   <td align="left">GPIO_1[13]</td>
   <td align="left">AG18</td>
   <td align="left">inout </td>
   <td align="left">3.3-V LVTTL</td>
   <td align="left">16</td>
</tr>
<tr>
   <td align="left">GPIO_1[14]</td>
   <td align="left">AH26</td>
   <td align="left">inout </td>
   <td align="left">3.3-V LVTTL</td>
   <td align="left">17</td>
</tr>
<tr>
   <td align="left">GPIO_1[15]</td>
   <td align="left">AA19</td>
   <td align="left">inout </td>
   <td align="left">3.3-V LVTTL</td>
   <td align="left">18</td>
</tr>
<tr>
   <td align="left">GPIO_1[16]</td>
   <td align="left">AG24</td>
   <td align="left">inout </td>
   <td align="left">3.3-V LVTTL</td>
   <td align="left">19</td>
</tr>
<tr>
   <td align="left">GPIO_1[17]</td>
   <td align="left">AF25</td>
   <td align="left">inout </td>
   <td align="left">3.3-V LVTTL</td>
   <td align="left">20</td>
</tr>
<tr>
   <td align="left">GPIO_1[18]</td>
   <td align="left">AH23</td>
   <td align="left">inout </td>
   <td align="left">3.3-V LVTTL</td>
   <td align="left">21</td>
</tr>
<tr>
   <td align="left">GPIO_1[19]</td>
   <td align="left">AG23</td>
   <td align="left">inout </td>
   <td align="left">3.3-V LVTTL</td>
   <td align="left">22</td>
</tr>
<tr>
   <td align="left">GPIO_1[20]</td>
   <td align="left">AE19</td>
   <td align="left">inout </td>
   <td align="left">3.3-V LVTTL</td>
   <td align="left">23</td>
</tr>
<tr>
   <td align="left">GPIO_1[21]</td>
   <td align="left">AF18</td>
   <td align="left">inout </td>
   <td align="left">3.3-V LVTTL</td>
   <td align="left">24</td>
</tr>
<tr>
   <td align="left">GPIO_1[22]</td>
   <td align="left">AD19</td>
   <td align="left">inout </td>
   <td align="left">3.3-V LVTTL</td>
   <td align="left">25</td>
</tr>
<tr>
   <td align="left">GPIO_1[23]</td>
   <td align="left">AE20</td>
   <td align="left">inout </td>
   <td align="left">3.3-V LVTTL</td>
   <td align="left">26</td>
</tr>
<tr>
   <td align="left">GPIO_1[24]</td>
   <td align="left">AE24</td>
   <td align="left">inout </td>
   <td align="left">3.3-V LVTTL</td>
   <td align="left">27</td>
</tr>
<tr>
   <td align="left">GPIO_1[25]</td>
   <td align="left">AD20</td>
   <td align="left">inout </td>
   <td align="left">3.3-V LVTTL</td>
   <td align="left">28</td>
</tr>
<tr>
   <td align="left">GPIO_1[26]</td>
   <td align="left">AF22</td>
   <td align="left">inout </td>
   <td align="left">3.3-V LVTTL</td>
   <td align="left">31</td>
</tr>
<tr>
   <td align="left">GPIO_1[27]</td>
   <td align="left">AH22</td>
   <td align="left">inout </td>
   <td align="left">3.3-V LVTTL</td>
   <td align="left">32</td>
</tr>
<tr>
   <td align="left">GPIO_1[28]</td>
   <td align="left">AH19</td>
   <td align="left">inout </td>
   <td align="left">3.3-V LVTTL</td>
   <td align="left">33</td>
</tr>
<tr>
   <td align="left">GPIO_1[29]</td>
   <td align="left">AH21</td>
   <td align="left">inout </td>
   <td align="left">3.3-V LVTTL</td>
   <td align="left">34</td>
</tr>
<tr>
   <td align="left">GPIO_1[30]</td>
   <td align="left">AG21</td>
   <td align="left">inout </td>
   <td align="left">3.3-V LVTTL</td>
   <td align="left">35</td>
</tr>
<tr>
   <td align="left">GPIO_1[31]</td>
   <td align="left">AH18</td>
   <td align="left">inout </td>
   <td align="left">3.3-V LVTTL</td>
   <td align="left">36</td>
</tr>
<tr>
   <td align="left">GPIO_1[32]</td>
   <td align="left">AD23</td>
   <td align="left">inout </td>
   <td align="left">3.3-V LVTTL</td>
   <td align="left">37</td>
</tr>
<tr>
   <td align="left">GPIO_1[33]</td>
   <td align="left">AE23</td>
   <td align="left">inout </td>
   <td align="left">3.3-V LVTTL</td>
   <td align="left">38</td>
</tr>
<tr>
   <td align="left">GPIO_1[34]</td>
   <td align="left">AA18</td>
   <td align="left">inout </td>
   <td align="left">3.3-V LVTTL</td>
   <td align="left">39</td>
</tr>
<tr>
   <td align="left">GPIO_1[35]</td>
   <td align="left">AC22</td>
   <td align="left">inout </td>
   <td align="left">3.3-V LVTTL</td>
   <td align="left">40</td>
</tr>
</table>
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