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https://opencores.org/ocsvn/openmsp430/openmsp430/trunk
Subversion Repositories openmsp430
[/] [openmsp430/] [trunk/] [fpga/] [altera_de0_nano_soc/] [doc/] [Terasic/] [DE0_NANO_SOC/] [Demonstrations/] [FPGA/] [DE0_NANO_SOC_Default/] [DE0_NANO_SOC_Default.sta.summary] - Rev 221
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------------------------------------------------------------TimeQuest Timing Analyzer Summary------------------------------------------------------------Type : Slow 1100mV 85C Model Setup 'FPGA_CLK1_50'Slack : 17.660TNS : 0.000Type : Slow 1100mV 85C Model Hold 'FPGA_CLK1_50'Slack : 0.378TNS : 0.000Type : Slow 1100mV 85C Model Minimum Pulse Width 'FPGA_CLK1_50'Slack : 9.247TNS : 0.000Type : Slow 1100mV 0C Model Setup 'FPGA_CLK1_50'Slack : 17.551TNS : 0.000Type : Slow 1100mV 0C Model Hold 'FPGA_CLK1_50'Slack : 0.388TNS : 0.000Type : Slow 1100mV 0C Model Minimum Pulse Width 'FPGA_CLK1_50'Slack : 9.311TNS : 0.000Type : Fast 1100mV 85C Model Setup 'FPGA_CLK1_50'Slack : 18.676TNS : 0.000Type : Fast 1100mV 85C Model Hold 'FPGA_CLK1_50'Slack : 0.183TNS : 0.000Type : Fast 1100mV 85C Model Minimum Pulse Width 'FPGA_CLK1_50'Slack : 9.112TNS : 0.000Type : Fast 1100mV 0C Model Setup 'FPGA_CLK1_50'Slack : 18.692TNS : 0.000Type : Fast 1100mV 0C Model Hold 'FPGA_CLK1_50'Slack : 0.176TNS : 0.000Type : Fast 1100mV 0C Model Minimum Pulse Width 'FPGA_CLK1_50'Slack : 9.072TNS : 0.000------------------------------------------------------------