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[/] [openmsp430/] [trunk/] [fpga/] [altera_de0_nano_soc/] [sim/] [rtl_sim/] [src/] [leds.v] - Rev 221
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/*===========================================================================*/ /* DIGITAL I/O */ /*---------------------------------------------------------------------------*/ /* Test the Digital I/O interface. */ /*===========================================================================*/ `define NO_TIMEOUT initial begin $display(" ==============================================="); $display("| START SIMULATION |"); $display(" ==============================================="); repeat(5) @(posedge FPGA_CLK1_50); stimulus_done = 0; //repeat(100) @(posedge FPGA_CLK1_50); #(10000000.0); stimulus_done = 1; force omsp_inst_pc =16'hffff; stimulus_done = 1; end