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[/] [openmsp430/] [trunk/] [fpga/] [xilinx_avnet_lx9microbard/] [rtl/] [verilog/] [coregen_chipscope/] [chipscope_ila.asy] - Rev 157

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Version 4
SymbolType BLOCK
TEXT 32 32 LEFT 4 chipscope_ila
RECTANGLE Normal 32 32 288 704
LINE Wide 0 80 32 80
PIN 0 80 LEFT 36
PINATTR PinName control[35:0]
PINATTR Polarity IN
LINE Normal 0 112 32 112
PIN 0 112 LEFT 36
PINATTR PinName clk
PINATTR Polarity IN
LINE Wide 0 176 32 176
PIN 0 176 LEFT 36
PINATTR PinName trig0[23:0]
PINATTR Polarity IN

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