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[/] [openmsp430/] [trunk/] [fpga/] [xilinx_avnet_lx9microbard/] [sim/] [rtl_sim/] [src/] [leds.v] - Rev 162
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/*===========================================================================*/ /* DIGITAL I/O */ /*---------------------------------------------------------------------------*/ /* Test the Digital I/O interface. */ /*===========================================================================*/ initial begin $display(" ==============================================="); $display("| START SIMULATION |"); $display(" ==============================================="); repeat(5) @(posedge CLK_40MHz); stimulus_done = 0; repeat(100) @(posedge CLK_40MHz); // PMOD1_P8 = 1; repeat(500) @(posedge CLK_40MHz); // PMOD1_P8 = 0; repeat(100) @(posedge CLK_40MHz); // PMOD1_P8 = 1; repeat(500) @(posedge CLK_40MHz); PMOD1_P4 = 0; repeat(100) @(posedge CLK_40MHz); PMOD1_P4 = 1; repeat(500) @(posedge CLK_40MHz); stimulus_done = 1; end