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[/] [openmsp430/] [trunk/] [fpga/] [xilinx_avnet_lx9microbard/] [software/] [leds/] [linker.msp430-elf.x] - Rev 212
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/* ============================================================================ *//* Copyright (c) 2014, Texas Instruments Incorporated *//* All rights reserved. *//* *//* Redistribution and use in source and binary forms, with or without *//* modification, are permitted provided that the following conditions *//* are met: *//* *//* * Redistributions of source code must retain the above copyright *//* notice, this list of conditions and the following disclaimer. *//* *//* * Redistributions in binary form must reproduce the above copyright *//* notice, this list of conditions and the following disclaimer in the *//* documentation and/or other materials provided with the distribution. *//* *//* * Neither the name of Texas Instruments Incorporated nor the names of *//* its contributors may be used to endorse or promote products derived *//* from this software without specific prior written permission. *//* *//* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" *//* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, *//* THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR *//* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR *//* CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, *//* EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, *//* PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; *//* OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, *//* WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR *//* OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, *//* EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. *//* ============================================================================ *//* This file supports MSP430F110 devices. *//* Version: 1.155 *//* Default linker script, for normal executables */OUTPUT_ARCH(msp430)ENTRY(_start)MEMORY {SFR : ORIGIN = 0x0000, LENGTH = 0x0010PERIPHERAL_8BIT : ORIGIN = 0x0010, LENGTH = 0x00F0PERIPHERAL_16BIT : ORIGIN = 0x0100, LENGTH = 0x0100RAM : ORIGIN = 0x0200, LENGTH = 0x0800ROM (rx) : ORIGIN = 0xC000, LENGTH = 0x4000-0x20VECT1 : ORIGIN = 0xFFE0, LENGTH = 0x0002VECT2 : ORIGIN = 0xFFE2, LENGTH = 0x0002VECT3 : ORIGIN = 0xFFE4, LENGTH = 0x0002VECT4 : ORIGIN = 0xFFE6, LENGTH = 0x0002VECT5 : ORIGIN = 0xFFE8, LENGTH = 0x0002VECT6 : ORIGIN = 0xFFEA, LENGTH = 0x0002VECT7 : ORIGIN = 0xFFEC, LENGTH = 0x0002VECT8 : ORIGIN = 0xFFEE, LENGTH = 0x0002VECT9 : ORIGIN = 0xFFF0, LENGTH = 0x0002VECT10 : ORIGIN = 0xFFF2, LENGTH = 0x0002VECT11 : ORIGIN = 0xFFF4, LENGTH = 0x0002VECT12 : ORIGIN = 0xFFF6, LENGTH = 0x0002VECT13 : ORIGIN = 0xFFF8, LENGTH = 0x0002VECT14 : ORIGIN = 0xFFFA, LENGTH = 0x0002VECT15 : ORIGIN = 0xFFFC, LENGTH = 0x0002RESETVEC : ORIGIN = 0xFFFE, LENGTH = 0x0002}SECTIONS{__interrupt_vector_1 : { KEEP (*(__interrupt_vector_1 )) } > VECT1__interrupt_vector_2 : { KEEP (*(__interrupt_vector_2 )) } > VECT2__interrupt_vector_3 : { KEEP (*(__interrupt_vector_3 )) KEEP (*(__interrupt_vector_port1)) } > VECT3__interrupt_vector_4 : { KEEP (*(__interrupt_vector_4 )) KEEP (*(__interrupt_vector_port2)) } > VECT4__interrupt_vector_5 : { KEEP (*(__interrupt_vector_5 )) } > VECT5__interrupt_vector_6 : { KEEP (*(__interrupt_vector_6 )) } > VECT6__interrupt_vector_7 : { KEEP (*(__interrupt_vector_7 )) } > VECT7__interrupt_vector_8 : { KEEP (*(__interrupt_vector_8 )) } > VECT8__interrupt_vector_9 : { KEEP (*(__interrupt_vector_9 )) KEEP (*(__interrupt_vector_timera1)) } > VECT9__interrupt_vector_10 : { KEEP (*(__interrupt_vector_10)) KEEP (*(__interrupt_vector_timera0)) } > VECT10__interrupt_vector_11 : { KEEP (*(__interrupt_vector_11)) KEEP (*(__interrupt_vector_wdt)) } > VECT11__interrupt_vector_12 : { KEEP (*(__interrupt_vector_12)) } > VECT12__interrupt_vector_13 : { KEEP (*(__interrupt_vector_13)) } > VECT13__interrupt_vector_14 : { KEEP (*(__interrupt_vector_14)) } > VECT14__interrupt_vector_15 : { KEEP (*(__interrupt_vector_15)) KEEP (*(__interrupt_vector_nmi)) } > VECT15__reset_vector :{KEEP (*(__interrupt_vector_16))KEEP (*(__interrupt_vector_reset))KEEP (*(.resetvec))} > RESETVEC.rodata : {. = ALIGN(2);*(.plt)*(.rodata .rodata.* .gnu.linkonce.r.* .const .const:*)*(.rodata1)*(.eh_frame_hdr)KEEP (*(.eh_frame))KEEP (*(.gcc_except_table)) *(.gcc_except_table.*)PROVIDE (__preinit_array_start = .);KEEP (*(.preinit_array))PROVIDE (__preinit_array_end = .);PROVIDE (__init_array_start = .);KEEP (*(SORT(.init_array.*)))KEEP (*(.init_array))PROVIDE (__init_array_end = .);PROVIDE (__fini_array_start = .);KEEP (*(.fini_array))KEEP (*(SORT(.fini_array.*)))PROVIDE (__fini_array_end = .);LONG(0); /* Sentinel. *//* gcc uses crtbegin.o to find the start of the constructors, sowe make sure it is first. Because this is a wildcard, itdoesn't matter if the user does not actually link againstcrtbegin.o; the linker won't look for a file to match awildcard. The wildcard also means that it doesn't matter whichdirectory crtbegin.o is in. */KEEP (*crtbegin*.o(.ctors))/* We don't want to include the .ctor section from from thecrtend.o file until after the sorted ctors. The .ctor sectionfrom the crtend file contains the end of ctors marker and itmust be last */KEEP (*(EXCLUDE_FILE (*crtend*.o ) .ctors))KEEP (*(SORT(.ctors.*)))KEEP (*(.ctors))KEEP (*crtbegin*.o(.dtors))KEEP (*(EXCLUDE_FILE (*crtend*.o ) .dtors))KEEP (*(SORT(.dtors.*)))KEEP (*(.dtors))} > ROM.text :{. = ALIGN(2);PROVIDE (_start = .);KEEP (*(SORT(.crt_*)))*(.lowtext .text .stub .text.* .gnu.linkonce.t.* .text:*)KEEP (*(.text.*personality*))/* .gnu.warning sections are handled specially by elf32.em. */*(.gnu.warning)*(.interp .hash .dynsym .dynstr .gnu.version*)PROVIDE (__etext = .);PROVIDE (_etext = .);PROVIDE (etext = .);. = ALIGN(2);KEEP (*(.init))KEEP (*(.fini))KEEP (*(.tm_clone_table))} > ROM.data : {. = ALIGN(2);PROVIDE (__datastart = .);KEEP (*(.jcr))*(.data.rel.ro.local) *(.data.rel.ro*)*(.dynamic)*(.data .data.* .gnu.linkonce.d.*)KEEP (*(.gnu.linkonce.d.*personality*))SORT(CONSTRUCTORS)*(.data1)*(.got.plt) *(.got)/* We want the small data sections together, so single-instruction offsetscan access them all, and initialized data all before uninitialized, sowe can shorten the on-disk segment size. */. = ALIGN(2);*(.sdata .sdata.* .gnu.linkonce.s.* D_2 D_1). = ALIGN(2);_edata = .;PROVIDE (edata = .);PROVIDE (__dataend = .);} > RAM AT>ROM/* Note that crt0 assumes this is a multiple of two; all thestart/stop symbols are also assumed word-aligned. */PROVIDE(__romdatastart = LOADADDR(.data));PROVIDE (__romdatacopysize = SIZEOF(.data));.bss : {. = ALIGN(2);PROVIDE (__bssstart = .);*(.dynbss)*(.sbss .sbss.*)*(.bss .bss.* .gnu.linkonce.b.*). = ALIGN(2);*(COMMON)PROVIDE (__bssend = .);} > RAMPROVIDE (__bsssize = SIZEOF(.bss));.noinit (NOLOAD) : {. = ALIGN(2);PROVIDE (__noinit_start = .);*(.noinit). = ALIGN(2);PROVIDE (__noinit_end = .);end = .;} > RAM.stack (ORIGIN (RAM) + LENGTH(RAM)) :{PROVIDE (__stack = .);*(.stack)}.MP430.attributes 0 :{KEEP (*(.MSP430.attributes))KEEP (*(.gnu.attributes))KEEP (*(__TI_build_attributes))}/* The rest are all not normally part of the runtime image. *//* Stabs debugging sections. */.stab 0 : { *(.stab) }.stabstr 0 : { *(.stabstr) }.stab.excl 0 : { *(.stab.excl) }.stab.exclstr 0 : { *(.stab.exclstr) }.stab.index 0 : { *(.stab.index) }.stab.indexstr 0 : { *(.stab.indexstr) }.comment 0 : { *(.comment) }/* DWARF debug sections.Symbols in the DWARF debugging sections are relative to the beginningof the section so we begin them at 0. *//* DWARF 1 */.debug 0 : { *(.debug) }.line 0 : { *(.line) }/* GNU DWARF 1 extensions */.debug_srcinfo 0 : { *(.debug_srcinfo) }.debug_sfnames 0 : { *(.debug_sfnames) }/* DWARF 1.1 and DWARF 2 */.debug_aranges 0 : { *(.debug_aranges) }.debug_pubnames 0 : { *(.debug_pubnames) }/* DWARF 2 */.debug_info 0 : { *(.debug_info .gnu.linkonce.wi.*) }.debug_abbrev 0 : { *(.debug_abbrev) }.debug_line 0 : { *(.debug_line .debug_line.* .debug_line_end ) }.debug_frame 0 : { *(.debug_frame) }.debug_str 0 : { *(.debug_str) }.debug_loc 0 : { *(.debug_loc) }.debug_macinfo 0 : { *(.debug_macinfo) }/* SGI/MIPS DWARF 2 extensions */.debug_weaknames 0 : { *(.debug_weaknames) }.debug_funcnames 0 : { *(.debug_funcnames) }.debug_typenames 0 : { *(.debug_typenames) }.debug_varnames 0 : { *(.debug_varnames) }/DISCARD/ : { *(.note.GNU-stack) }}
