URL
https://opencores.org/ocsvn/openmsp430/openmsp430/trunk
Subversion Repositories openmsp430
[/] [openmsp430/] [trunk/] [fpga/] [xilinx_diligent_s3board/] [rtl/] [verilog/] [coregen/] [rom_8x2k_hi.asy] - Rev 104
Go to most recent revision | Compare with Previous | Blame | View Log
Version 4SymbolType BLOCKRECTANGLE Normal 32 0 320 272PIN 0 48 LEFT 36PINATTR PinName addr[10:0]PINATTR Polarity INLINE Wide 0 48 32 48PIN 0 80 LEFT 36PINATTR PinName din[7:0]PINATTR Polarity INLINE Wide 0 80 32 80PIN 0 112 LEFT 36PINATTR PinName wePINATTR Polarity INLINE Normal 0 112 32 112PIN 0 144 LEFT 36PINATTR PinName enPINATTR Polarity INLINE Normal 0 144 32 144PIN 0 240 LEFT 36PINATTR PinName clkPINATTR Polarity INLINE Normal 0 240 32 240PIN 352 48 RIGHT 36PINATTR PinName dout[7:0]PINATTR Polarity OUTLINE Wide 320 48 352 48
Go to most recent revision | Compare with Previous | Blame | View Log
