URL https://opencores.org/ocsvn/openmsp430/openmsp430/trunk

Subversion Repositories openmsp430

[/] [openmsp430/] [trunk/] [fpga/] [xilinx_diligent_s3board/] [rtl/] [verilog/] [coregen/] [rom_8x2k_lo.asy] - Rev 136

Go to most recent revision | Compare with Previous | Blame | View Log

Version 4
SymbolType BLOCK
RECTANGLE Normal 32 0 320 272
PIN 0 48  LEFT 36
PINATTR PinName addr[10:0]
PINATTR Polarity IN
LINE Wide 0 48 32 48
PIN 0 80  LEFT 36
PINATTR PinName din[7:0]
PINATTR Polarity IN
LINE Wide 0 80 32 80
PIN 0 112  LEFT 36
PINATTR PinName we
PINATTR Polarity IN
LINE Normal 0 112 32 112
PIN 0 144  LEFT 36
PINATTR PinName en
PINATTR Polarity IN
LINE Normal 0 144 32 144
PIN 0 240  LEFT 36
PINATTR PinName clk
PINATTR Polarity IN
LINE Normal 0 240 32 240
PIN 352 48  RIGHT 36
PINATTR PinName dout[7:0]
PINATTR Polarity OUT
LINE Wide 320 48 352 48

Go to most recent revision | Compare with Previous | Blame | View Log

Browse

Tools

Subversion Repositories openmsp430

[/] [openmsp430/] [trunk/] [fpga/] [xilinx_diligent_s3board/] [rtl/] [verilog/] [coregen/] [rom_8x2k_lo.asy] - Rev 136