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[/] [openmsp430/] [trunk/] [fpga/] [xilinx_diligent_s3board/] [sim/] [rtl_sim/] [bin/] [msp430sim] - Rev 212
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#!/bin/bash#------------------------------------------------------------------------------# Copyright (C) 2001 Authors## This source file may be used and distributed without restriction provided# that this copyright statement is not removed from the file and that any# derivative work contains the original copyright notice and the associated# disclaimer.## This source file is free software; you can redistribute it and/or modify# it under the terms of the GNU Lesser General Public License as published# by the Free Software Foundation; either version 2.1 of the License, or# (at your option) any later version.## This source is distributed in the hope that it will be useful, but WITHOUT# ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or# FITNESS FOR A PARTICULAR PURPOSE. See the GNU Lesser General Public# License for more details.## You should have received a copy of the GNU Lesser General Public License# along with this source; if not, write to the Free Software Foundation,# Inc., 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA##------------------------------------------------------------------------------## File Name: msp430sim## Author(s):# - Olivier Girard, olgirard@gmail.com##------------------------------------------------------------------------------# $Rev: 212 $# $LastChangedBy: olivier.girard $# $LastChangedDate: 2015-11-17 12:05:53 +0100 (Tue, 17 Nov 2015) $#------------------------------------------------------------------------------################################################################################ Parameter Check ################################################################################EXPECTED_ARGS=1if [ $# -ne $EXPECTED_ARGS ]; thenecho "ERROR : wrong number of arguments"echo "USAGE : msp430sim <test name>"echo "Example : msp430sim leds"echo ""echo "In order to switch the verilog simulator, the OMSP_SIMULATOR environment"echo "variable can be set to the following values:"echo ""echo " - iverilog : Icarus Verilog (default)"echo " - cver : CVer"echo " - verilog : Verilog-XL"echo " - ncverilog : NC-Verilog"echo " - vcs : VCS"echo " - vsim : Modelsim"echo " - isim : Xilinx simulator"echo ""exit 1fi################################################################################ Check if the required files exist ################################################################################softdir=../../../software/$1;elffile=../../../software/$1/$1.elf;verfile=../src/$1.v;submitfile=../src/submit.f;if [ $OMSP_SIMULATOR == "isim" ]; thensubmitfile=../src/submit.prj;fiincfile=../../../rtl/verilog/openmsp430/openMSP430_defines.v;if [ ! -e $softdir ]; thenecho "Software directory doesn't exist: $softdir"exit 1fiif [ ! -e $verfile ]; thenecho "Verilog stimulus file $verfile doesn't exist: $verfile"exit 1fiif [ ! -e $submitfile ]; thenecho "Verilog submit file $submitfile doesn't exist: $submitfile"exit 1fi################################################################################ Cleanup ################################################################################echo "Cleanup..."rm -rf *.vcdrm -rf *.vpdrm -rf *.trnrm -rf *.dsnrm -rf pmem.*rm -rf stimulus.v################################################################################ Run simulation ################################################################################echo " ======================================================="echo "| Start simulation: $1"echo " ======================================================="# Make local copy of the openMSP403 configuration file# and prepare it for MSPGCC preprocessingcp $incfile ./pmem.hsed -ie 's/`ifdef/#ifdef/g' ./pmem.hsed -ie 's/`else/#else/g' ./pmem.hsed -ie 's/`endif/#endif/g' ./pmem.hsed -ie 's/`define/#define/g' ./pmem.hsed -ie 's/`include/\/\/#include/g' ./pmem.hsed -ie 's/`//g' ./pmem.hsed -ie "s/'//g" ./pmem.h# Use MSPGCC preprocessor to extract the Program, Data# and Peripheral memory sizesif command -v msp430-elf-gcc >/dev/null; thenmsp430-elf-gcc -E -P -x c ../bin/omsp_config.sh > pmem.shelsemsp430-gcc -E -P -x c ../bin/omsp_config.sh > pmem.shfi# Source the extracted configuration fileif [[ $(uname -s) == CYGWIN* ]];thendos2unix pmem.shfisource pmem.sh# Make C programcd $softdirmake cleanmakecd ../../sim/rtl_sim/run/# Create linksif [[ $(uname -s) == CYGWIN* ]];thencp $elffile pmem.elfcp $verfile stimulus.velseln -s $elffile pmem.elfln -s $verfile stimulus.vfi# Create IHEX file from ELFecho "Convert ELF file to IHEX format..."if command -v msp430-elf-objcopy >/dev/null; thenmsp430-elf-objcopy -O ihex pmem.elf pmem.ihexelsemsp430-objcopy -O ihex pmem.elf pmem.ihexfi# Generate Program memory fileecho "Convert IHEX file to Verilog MEMH format..."../bin/ihex2mem.tcl -ihex pmem.ihex -out pmem.mem -mem_size $pmemsize# Start verilog simulationecho "Start Verilog simulation..."../bin/rtlsim.sh stimulus.v pmem.mem $submitfile
