OpenCores
URL https://opencores.org/ocsvn/openmsp430/openmsp430/trunk

Subversion Repositories openmsp430

[/] [openmsp430/] [trunk/] [fpga/] [xilinx_diligent_s3board/] [synthesis/] [xilinx/] [scripts/] [xst_verilog.opt] - Rev 153

Compare with Previous | Blame | View Log

FLOWTYPE = FPGA_SYNTHESIS;
#########################################################
## Filename: xst_verilog.opt
##
## Verilog Option File for XST targeted for speed
## This works for FPGA devices.
##
## Version: 13.1
## $Header: /devl/xcs/repo/env/Jobs/Xflow/data/optionfiles/fpga_xst_verilog_speed.opt,v 1.15.4.1 2011/01/11 22:40:31 rvklair Exp $
#########################################################
#
# Options for XST
#
#
Program xst
-ifn <design>_xst.scr;            # input XST script file
-ofn <design>_xst.log;            # output XST log file
-intstyle xflow;                  # Message Reporting Style: ise, xflow, or silent
#
# The options listed under ParamFile are the XST Properties that can be set by the 
# user. To turn on an option, uncomment by removing the '#' in front of the switch.
#
ParamFile: <design>_xst.scr
"run";

#
# Global Synthesis Options
#
"-ifn <synthdesign>";             # Input/Project File Name
"-ifmt Verilog";                  # Input Format
"-ofn <design>";                  # Output File Name 
"-ofmt ngc";                      # Output File Format
"-p <partname>";                  # Target Device
"-opt_level 1";                   # Optimization Effort Criteria
                                  # 1 (Normal) or 2 (High)

"-top       openMSP430_fpga";
"-vlgincdir ../../../rtl/verilog/openmsp430/";

"-opt_mode SPEED";                # Optimization Criteria
                                  # AREA or SPEED
End ParamFile
End Program xst
#
# See XST USER Guide Chapter 8 (Command Line Mode) for all XST options
#


Compare with Previous | Blame | View Log

powered by: WebSVN 2.1.0

© copyright 1999-2024 OpenCores.org, equivalent to Oliscience, all rights reserved. OpenCores®, registered trademark.