Subversion Repositories openmsp430

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<omsp:top xmlns:omsp="http://opencores.org/project,openmsp430">


     <!--  ===============================================================  -->
     <!-- ||                                                             || -->
     <!-- ||            oMSP-Xilinx-Example (CPU version 2)              || -->
     <!-- ||                                                             || -->
     <!--  ===============================================================  -->
     <omsp:alias val="oMSP-Xilinx-Example-CPUv2">

          <!--  +++++++++++++++++++++++++++++++++++++++++++++  -->
          <!-- | openMSP430 core configuration to be matched | -->
          <!--  +++++++++++++++++++++++++++++++++++++++++++++  -->
          <omsp:configuration>
                <omsp:cpu_ver>2</omsp:cpu_ver>
                <omsp:user_ver>1</omsp:user_ver>
                <omsp:asic>0</omsp:asic>
                <omsp:mpy>1</omsp:mpy>
                <omsp:pmem_size>4096</omsp:pmem_size>
                <omsp:dmem_size>1024</omsp:dmem_size>
                <omsp:per_size>512</omsp:per_size>
          </omsp:configuration>

          <!--  +++++++++++++++++++++++++++++++++++++++++++++  -->
          <!-- |                  Extra info                 | -->
          <!--  +++++++++++++++++++++++++++++++++++++++++++++  -->
          <omsp:extra_info>
                <omsp:Description>This is an example implementation of the openMSP430 core on a Xilinx Spartan3 FPGA</omsp:Description>
                <omsp:Contact>Olivier GIRARD</omsp:Contact>
                <omsp:Email>olgirard@googlemail.com</omsp:Email>
                <omsp:URL>http://opencores.org/project,openmsp430</omsp:URL>
          </omsp:extra_info>

     </omsp:alias>


     <!--  ===============================================================  -->
     <!-- ||                                                             || -->
     <!-- ||               oMSP-FPGA-Example (CPU version 1)             || -->
     <!-- ||                                                             || -->
     <!--  ===============================================================  -->
     <omsp:alias val="oMSP-FPGA-Example-CPUv1">

          <!--  ++++++++++++++++++++++++++++++++++++++++++++++  -->
          <!-- | openMSP430 core configuration to be matched  | -->
          <!-- |                                              | -->
          <!-- | Note: for CPU version 1, identification is   | -->
          <!-- |       based on pmem_size and dmem_size only. | -->
          <!--  ++++++++++++++++++++++++++++++++++++++++++++++  -->
          <omsp:configuration>
                <omsp:cpu_ver>1</omsp:cpu_ver>
                <omsp:pmem_size>4096</omsp:pmem_size>
                <omsp:dmem_size>1024</omsp:dmem_size>
          </omsp:configuration>

          <!--  +++++++++++++++++++++++++++++++++++++++++++++  -->
          <!-- |                  Extra info                 | -->
          <!--  +++++++++++++++++++++++++++++++++++++++++++++  -->
          <omsp:extra_info>
                <omsp:Description>This is an example implementation of the openMSP430 core on a Xilinx/Altera/Actel FPGA</omsp:Description>
                <omsp:Contact>Olivier GIRARD</omsp:Contact>
                <omsp:Email>olgirard@googlemail.com</omsp:Email>
                <omsp:URL>http://opencores.org/project,openmsp430</omsp:URL>
          </omsp:extra_info>

     </omsp:alias>

</omsp:top>