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Subversion Repositories openrisc_2011-10-31

[/] [openrisc/] [tags/] [gnu-src/] [gcc-4.5.1/] [gcc-4.5.1-or32-1.0rc2/] [gcc/] [testsuite/] [g++.dg/] [opt/] [conj1.C] - Rev 384

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// PR target/5740
// This testcase ICEd on SPARC -m64 because emit_group_load tried
// to move a DFmode register into DImode register directly.
// { dg-do compile }
// { dg-options "-O2" }

struct C
{
  C (double y, double z) { __real__ x = y; __imag__ x = z; }
  double r () const { return __real__ x; }
  double i () const { return __imag__ x; }
  __complex__ double x;
};

C conj (const C& z)
{
  return C (z.r (), -z.i ());
}

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