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[/] [openrisc/] [tags/] [gnu-src/] [gcc-4.5.1/] [gcc-4.5.1-or32-1.0rc3/] [gcc/] [testsuite/] [gcc.target/] [arm/] [neon/] [vRsubhns32.c] - Rev 313
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/* Test the `vRsubhns32' ARM Neon intrinsic. */ /* This file was autogenerated by neon-testgen. */ /* { dg-do assemble } */ /* { dg-require-effective-target arm_neon_ok } */ /* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */ #include "arm_neon.h" void test_vRsubhns32 (void) { int16x4_t out_int16x4_t; int32x4_t arg0_int32x4_t; int32x4_t arg1_int32x4_t; out_int16x4_t = vrsubhn_s32 (arg0_int32x4_t, arg1_int32x4_t); } /* { dg-final { scan-assembler "vrsubhn\.i32\[ \]+\[dD\]\[0-9\]+, \[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ /* { dg-final { cleanup-saved-temps } } */
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