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[/] [openrisc/] [tags/] [gnu-src/] [gdb-6.8/] [pre-binutils-2.20.1-sync/] [sim/] [mn10300/] [Makefile.in] - Rev 276
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# Makefile template for Configure for the mn10300 sim library.
# Copyright (C) 1996, 1997, 2000, 2001, 2004, 2007, 2008
# Free Software Foundation, Inc.
# Written by Cygnus Support.
#
# This program is free software; you can redistribute it and/or modify
# it under the terms of the GNU General Public License as published by
# the Free Software Foundation; either version 3 of the License, or
# (at your option) any later version.
#
# This program is distributed in the hope that it will be useful,
# but WITHOUT ANY WARRANTY; without even the implied warranty of
# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
# GNU General Public License for more details.
#
# You should have received a copy of the GNU General Public License
# along with this program. If not, see <http://www.gnu.org/licenses/>.
## COMMON_PRE_CONFIG_FRAG
MN10300_OBJS = \
itable.o semantics.o idecode.o icache.o engine.o irun.o support.o \
$(SIM_NEW_COMMON_OBJS) \
op_utils.o \
sim-engine.o \
sim-hload.o \
sim-hrw.o \
sim-resume.o \
sim-reason.o \
sim-stop.o \
dv-sockser.o
SIM_OBJS = $(MN10300_OBJS) interp.o
# List of main object files for `run'.
SIM_RUN_OBJS = nrun.o
SIM_EXTRA_CLEAN = clean-igen
# Extra dependencies for "sim-main.h"
SIM_EXTRA_DEPS = mn10300_sim.h itable.h idecode.h
# Select mn10300 support in nltvals.def.
NL_TARGET = -DNL_TARGET_mn10300
INCLUDE = mn10300_sim.h $(srcdir)/../../include/gdb/callback.h
# List of extra flags to always pass to $(CC).
SIM_EXTRA_CFLAGS = -DPOLL_QUIT_INTERVAL=0x20
## COMMON_POST_CONFIG_FRAG
idecode.o op_utils.o semantics.o: targ-vals.h
BUILT_SRC_FROM_IGEN = \
icache.h \
icache.c \
idecode.h \
idecode.c \
semantics.h \
semantics.c \
model.h \
model.c \
support.h \
support.c \
itable.h \
itable.c \
engine.h \
engine.c \
irun.c
$(BUILT_SRC_FROM_IGEN): tmp-igen
.PHONY: clean-igen
clean-igen:
rm -f $(BUILT_SRC_FROM_IGEN)
rm -f tmp-igen tmp-insns
../igen/igen:
cd ../igen && $(MAKE)
IGEN_TRACE= # -G omit-line-numbers # -G trace-rule-selection -G trace-rule-rejection -G trace-entries
IGEN_INSN=$(srcdir)/mn10300.igen $(srcdir)/am33.igen $(srcdir)/am33-2.igen
IGEN_DC=$(srcdir)/mn10300.dc
tmp-igen: $(IGEN_INSN) $(IGEN_DC) ../igen/igen
cd ../igen && $(MAKE)
../igen/igen \
$(IGEN_TRACE) \
-G gen-direct-access \
-M mn10300,am33 -G gen-multi-sim=am33 \
-M am33_2 \
-I $(srcdir) \
-i $(IGEN_INSN) \
-o $(IGEN_DC) \
-x \
-n icache.h -hc tmp-icache.h \
-n icache.c -c tmp-icache.c \
-n semantics.h -hs tmp-semantics.h \
-n semantics.c -s tmp-semantics.c \
-n idecode.h -hd tmp-idecode.h \
-n idecode.c -d tmp-idecode.c \
-n model.h -hm tmp-model.h \
-n model.c -m tmp-model.c \
-n support.h -hf tmp-support.h \
-n support.c -f tmp-support.c \
-n itable.h -ht tmp-itable.h \
-n itable.c -t tmp-itable.c \
-n engine.h -he tmp-engine.h \
-n engine.c -e tmp-engine.c \
-n irun.c -r tmp-irun.c
$(SHELL) $(srcdir)/../../move-if-change tmp-icache.h icache.h
$(SHELL) $(srcdir)/../../move-if-change tmp-icache.c icache.c
$(SHELL) $(srcdir)/../../move-if-change tmp-idecode.h idecode.h
$(SHELL) $(srcdir)/../../move-if-change tmp-idecode.c idecode.c
$(SHELL) $(srcdir)/../../move-if-change tmp-semantics.h semantics.h
$(SHELL) $(srcdir)/../../move-if-change tmp-semantics.c semantics.c
$(SHELL) $(srcdir)/../../move-if-change tmp-model.h model.h
$(SHELL) $(srcdir)/../../move-if-change tmp-model.c model.c
$(SHELL) $(srcdir)/../../move-if-change tmp-support.h support.h
$(SHELL) $(srcdir)/../../move-if-change tmp-support.c support.c
$(SHELL) $(srcdir)/../../move-if-change tmp-itable.h itable.h
$(SHELL) $(srcdir)/../../move-if-change tmp-itable.c itable.c
$(SHELL) $(srcdir)/../../move-if-change tmp-engine.h engine.h
$(SHELL) $(srcdir)/../../move-if-change tmp-engine.c engine.c
$(SHELL) $(srcdir)/../../move-if-change tmp-irun.c irun.c
touch tmp-igen
interp.o: interp.c $(INCLUDE)
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