URL
https://opencores.org/ocsvn/openrisc_2011-10-31/openrisc_2011-10-31/trunk
Subversion Repositories openrisc_2011-10-31
[/] [openrisc/] [tags/] [gnu-src/] [gdb-7.2/] [gdb-7.2-or32-1.0rc1/] [sim/] [iq2000/] [iq2000-sim.h] - Rev 330
Go to most recent revision | Compare with Previous | Blame | View Log
/* collection of junk waiting time to sort out Copyright (C) 1998, 1999, 2007, 2008, 2009, 2010 Free Software Foundation, Inc. Contributed by Cygnus Solutions. This file is part of the GNU Simulators. This program is free software; you can redistribute it and/or modify it under the terms of the GNU General Public License as published by the Free Software Foundation; either version 3 of the License, or (at your option) any later version. This program is distributed in the hope that it will be useful, but WITHOUT ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for more details. You should have received a copy of the GNU General Public License along with this program. If not, see <http://www.gnu.org/licenses/>. */ #ifndef IQ2000_SIM_H #define IQ2000_SIM_H #define GETTWI GETTSI #define SETTWI SETTSI /* Hardware/device support. /* sim_core_attach device argument. */ extern device iq2000_devices; /* FIXME: Temporary, until device support ready. */ struct _device { int foo; }; #endif /* IQ2000_SIM_H */
Go to most recent revision | Compare with Previous | Blame | View Log