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https://opencores.org/ocsvn/openrisc_2011-10-31/openrisc_2011-10-31/trunk
Subversion Repositories openrisc_2011-10-31
[/] [openrisc/] [tags/] [gnu-src/] [gdb-7.2/] [gdb-7.2-or32-1.0rc1/] [sim/] [testsuite/] [sim/] [frv/] [addxicc.cgs] - Rev 341
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# frv testcase for addxicc $GRi,$s10,$GRk,$ICCi_1
# mach: all
.include "testutils.inc"
start
.global addxicc
addxicc:
set_gr_immed 2,gr8
set_icc 0x0e,0 ; Make sure carry bit is off
addxicc gr8,1,gr8,icc0
test_icc 0 0 0 0 icc0
test_gr_immed 3,gr8
set_gr_limmed 0x7fff,0xffff,gr8
set_icc 0x04,0 ; Make sure carry bit is off
addxicc gr8,1,gr8,icc0
test_icc 1 0 1 0 icc0
test_gr_limmed 0x8000,0x0000,gr8
set_gr_limmed 0xffff,0xff00,gr8
set_icc 0x08,0 ; Make sure carry bit is off
addxicc gr8,0x100,gr8,icc0
test_icc 0 1 0 1 icc0
test_gr_immed 0,gr8
set_gr_immed 2,gr8
set_icc 0x0f,0 ; Make sure carry bit is on
addxicc gr8,1,gr8,icc0
test_icc 0 0 0 0 icc0
test_gr_immed 4,gr8
set_gr_limmed 0x7fff,0xffff,gr8
set_icc 0x05,0 ; Make sure carry bit is on
addxicc gr8,0,gr8,icc0
test_icc 1 0 1 0 icc0
test_gr_limmed 0x8000,0x0000,gr8
set_gr_limmed 0xffff,0xfeff,gr8
set_icc 0x0b,0 ; Make sure carry bit is on
addxicc gr8,0x100,gr8,icc0
test_icc 0 1 0 1 icc0
test_gr_immed 0,gr8
pass