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https://opencores.org/ocsvn/openrisc/openrisc/trunk
Subversion Repositories openrisc
[/] [openrisc/] [tags/] [or1ksim/] [or1ksim-0.3.0/] [build/] [doc/] [or1ksim.cp] - Rev 417
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\entry{installing Or1ksim}{2}{installing Or1ksim}
\entry{--enable-ethphy}{2}{\code {--enable-ethphy}}
\entry{Ethernet via socket, enabling}{2}{Ethernet via socket, enabling}
\entry{enabling Ethernet via socket}{2}{enabling Ethernet via socket}
\entry{running Or1ksim}{3}{running Or1ksim}
\entry{command line for Or1ksim standalone use}{3}{command line for Or1ksim standalone use}
\entry{-v}{3}{\code {-v}}
\entry{--version}{3}{\code {--version}}
\entry{-h}{3}{\code {-h}}
\entry{--help}{3}{\code {--help}}
\entry{-f}{3}{\code {-f}}
\entry{--file}{3}{\code {--file}}
\entry{--nosrv}{3}{\code {--nosrv}}
\entry{--srv}{3}{\code {--srv}}
\entry{-d}{3}{\code {-d}}
\entry{--debug-config}{3}{\code {--debug-config}}
\entry{-i}{3}{\code {-i}}
\entry{--interactive}{3}{\code {--interactive}}
\entry{--enable-profile}{3}{\code {--enable-profile}}
\entry{--enable-mprofile}{3}{\code {--enable-mprofile}}
\entry{profiling for Or1ksim}{3}{profiling for Or1ksim}
\entry{instruction profiling for Or1ksim}{3}{instruction profiling for Or1ksim}
\entry{-v (profiling utility)}{4}{\code {-v} (profiling utility)}
\entry{--version (profiling utility)}{4}{\code {--version} (profiling utility)}
\entry{-h (profiling utility)}{4}{\code {-h} (profiling utility)}
\entry{--help (profiling utility)}{4}{\code {--help} (profiling utility)}
\entry{-c}{4}{\code {-c}}
\entry{--cumulative}{4}{\code {--cumulative}}
\entry{-q}{4}{\code {-q}}
\entry{--quiet}{4}{\code {--quiet}}
\entry{-g}{4}{\code {-g}}
\entry{--generate}{4}{\code {--generate}}
\entry{memory profiling version of Or1ksim}{4}{memory profiling version of Or1ksim}
\entry{-v (memory profiling utility)}{4}{\code {-v} (memory profiling utility)}
\entry{--version (memory profiling utility)}{4}{\code {--version} (memory profiling utility)}
\entry{-h (memory profiling utility)}{4}{\code {-h} (memory profiling utility)}
\entry{--help (memory profiling utility)}{4}{\code {--help} (memory profiling utility)}
\entry{-m}{4}{\code {-m}}
\entry{--mode}{4}{\code {--mode}}
\entry{-g}{4}{\code {-g}}
\entry{--group}{4}{\code {--group}}
\entry{-f}{4}{\code {-f}}
\entry{--filename}{4}{\code {--filename}}
\entry{memory profiling start address}{4}{memory profiling start address}
\entry{memory profiling end address}{4}{memory profiling end address}
\entry{library version of Or1ksim}{5}{library version of Or1ksim}
\entry{or1ksim_init}{5}{\code {or1ksim_init}}
\entry{or1ksim_run}{5}{\code {or1ksim_run}}
\entry{or1ksim_reset_duration}{5}{\code {or1ksim_reset_duration}}
\entry{or1ksim_set_time_point}{5}{\code {or1ksim_set_time_point}}
\entry{or1ksim_get_time_period}{5}{\code {or1ksim_get_time_period}}
\entry{or1ksim_is_le}{5}{\code {or1ksim_is_le}}
\entry{long}{5}{\code {long}}
\entry{or1ksim_interrupt}{5}{\code {or1ksim_interrupt}}
\entry{configuring Or1ksim}{7}{configuring Or1ksim}
\entry{configuration file structure}{7}{configuration file structure}
\entry{configuring the behavior of Or1ksim}{8}{configuring the behavior of Or1ksim}
\entry{simulator configuration}{8}{simulator configuration}
\entry{section sim}{8}{\code {section sim}}
\entry{verbose (simulator configuration)}{8}{\code {verbose} (simulator configuration)}
\entry{debug (simulator configuration)}{8}{\code {debug} (simulator configuration)}
\entry{profile (simulator configuration)}{8}{\code {profile} (simulator configuration)}
\entry{prof_file (simulator configuration)}{8}{\code {prof_file} (simulator configuration)}
\entry{prof_fn (simulator configuration - deprecated)}{8}{\code {prof_fn} (simulator configuration - deprecated)}
\entry{mprofile (simulator configuration)}{8}{\code {mprofile} (simulator configuration)}
\entry{mprof_file (simulator configuration)}{8}{\code {mprof_file} (simulator configuration)}
\entry{mprof_fn (simulator configuration - deprecated)}{8}{\code {mprof_fn} (simulator configuration - deprecated)}
\entry{history (simulator configuration)}{8}{\code {history} (simulator configuration)}
\entry{exe_log (simulator configuration)}{9}{\code {exe_log} (simulator configuration)}
\entry{exe_log_type (simulator configuration)}{9}{\code {exe_log_type} (simulator configuration)}
\entry{exe_log_type=default (simulator configuration)}{9}{\code {exe_log_type=default} (simulator configuration)}
\entry{exe_log_type=hardware (simulator configuration)}{9}{\code {exe_log_type=hardware} (simulator configuration)}
\entry{exe_log_type=simple (simulator configuration)}{9}{\code {exe_log_type=simple} (simulator configuration)}
\entry{exe_log_type=software (simulator configuration)}{9}{\code {exe_log_type=software} (simulator configuration)}
\entry{exe_log_start (simulator configuration)}{9}{\code {exe_log_start} (simulator configuration)}
\entry{exe_log_end (simulator configuration)}{9}{\code {exe_log_end} (simulator configuration)}
\entry{exe_log_marker (simulator configuration)}{9}{\code {exe_log_marker} (simulator configuration)}
\entry{exe_log_file (simulator configuration)}{9}{\code {exe_log_file} (simulator configuration)}
\entry{exe_log_fn (simulator configuration - deprecated)}{9}{\code {exe_log_fn} (simulator configuration - deprecated)}
\entry{clkcycle (simulator configuration)}{9}{\code {clkcycle} (simulator configuration)}
\entry{configuring the Verification API (VAPI)}{9}{configuring the Verification API (VAPI)}
\entry{Verification API configuration}{9}{Verification API configuration}
\entry{VAPI configuration}{9}{VAPI configuration}
\entry{section vapi}{9}{\code {section vapi}}
\entry{enabled (verification API configuration)}{10}{\code {enabled} (verification API configuration)}
\entry{server_port (verification API configuration)}{10}{\code {server_port} (verification API configuration)}
\entry{TCP/IP port range}{10}{TCP/IP port range}
\entry{port range for TCP/IP}{10}{port range for TCP/IP}
\entry{dynamic ports, use of}{10}{dynamic ports, use of}
\entry{private ports, use of}{10}{private ports, use of}
\entry{log_enabled (verification API configuration)}{10}{\code {log_enabled} (verification API configuration)}
\entry{hide_device_id (verification API configuration)}{10}{\code {hide_device_id} (verification API configuration)}
\entry{vapi_log_file (verification API configuration)}{10}{\code {vapi_log_file} (verification API configuration)}
\entry{vapi_log_fn (verification API configuration - deprecated)}{10}{\code {vapi_log_fn} (verification API configuration - deprecated)}
\entry{configuring the Custom Unit Compiler (CUC)}{10}{configuring the Custom Unit Compiler (CUC)}
\entry{Custom Unit Compiler Configuration}{10}{Custom Unit Compiler Configuration}
\entry{CUC configuration}{10}{CUC configuration}
\entry{section cuc}{10}{\code {section cuc}}
\entry{memory_order (CUC configuration)}{10}{\code {memory_order} (CUC configuration)}
\entry{memory_order=none (CUC configuration)}{10}{\code {memory_order=none} (CUC configuration)}
\entry{memory_order=weak (CUC configuration)}{10}{\code {memory_order=weak} (CUC configuration)}
\entry{memory_order=strong (CUC configuration)}{10}{\code {memory_order=strong} (CUC configuration)}
\entry{memory_order=exact (CUC configuration)}{10}{\code {memory_order=exact} (CUC configuration)}
\entry{calling_convention (CUC configuration)}{10}{\code {calling_convention} (CUC configuration)}
\entry{enable_bursts (CUC configuration)}{10}{\code {enable_bursts} (CUC configuration)}
\entry{no_multicycle (CUC configuration)}{11}{\code {no_multicycle} (CUC configuration)}
\entry{timings_file (CUC configuration)}{11}{\code {timings_file} (CUC configuration)}
\entry{timings_fn (CUC configuration - deprecated)}{11}{\code {timings_fn} (CUC configuration - deprecated)}
\entry{configuring the CPU}{11}{configuring the CPU}
\entry{configuring the processor}{11}{configuring the processor}
\entry{CPU configuration}{11}{CPU configuration}
\entry{processor configuration}{11}{processor configuration}
\entry{section cpu}{11}{\code {section cpu}}
\entry{ver (CPU configuration)}{11}{\code {ver} (CPU configuration)}
\entry{rev (CPU configuration)}{11}{\code {rev} (CPU configuration)}
\entry{upr (CPU configuration)}{11}{\code {upr} (CPU configuration)}
\entry{cfgr (CPU configuration)}{11}{\code {cfgr} (CPU configuration)}
\entry{sr (CPU configuration)}{11}{\code {sr} (CPU configuration)}
\entry{superscalar (CPU configuration)}{11}{\code {superscalar} (CPU configuration)}
\entry{hazards (CPU configuration)}{12}{\code {hazards} (CPU configuration)}
\entry{dependstats (CPU configuration)}{12}{\code {dependstats} (CPU configuration)}
\entry{sbuf_len (CPU configuration)}{12}{\code {sbuf_len} (CPU configuration)}
\entry{configuring memory}{12}{configuring memory}
\entry{memory configuration}{12}{memory configuration}
\entry{section memory}{12}{\code {section memory}}
\entry{type (memory configuration)}{12}{\code {type} (memory configuration)}
\entry{type=random (memory configuration)}{12}{\code {type=random} (memory configuration)}
\entry{type=pattern (memory configuration)}{12}{\code {type=pattern} (memory configuration)}
\entry{type=unknown (memory configuration)}{12}{\code {type=unknown} (memory configuration)}
\entry{type=zero (memory configuration)}{12}{\code {type=zero} (memory configuration)}
\entry{random_seed (memory configuration)}{12}{\code {random_seed} (memory configuration)}
\entry{pattern (memory configuration)}{13}{\code {pattern} (memory configuration)}
\entry{baseaddr (memory configuration)}{13}{\code {baseaddr} (memory configuration)}
\entry{size (memory configuration)}{13}{\code {size} (memory configuration)}
\entry{name (memory configuration)}{13}{\code {name} (memory configuration)}
\entry{ce (memory configuration)}{13}{\code {ce} (memory configuration)}
\entry{mc (memory configuration)}{13}{\code {mc} (memory configuration)}
\entry{delayr (memory configuration)}{13}{\code {delayr} (memory configuration)}
\entry{delayw (memory configuration)}{14}{\code {delayw} (memory configuration)}
\entry{log (memory configuration)}{14}{\code {log} (memory configuration)}
\entry{configuring data & instruction MMUs}{14}{configuring data & instruction MMUs}
\entry{MMU configuration}{14}{MMU configuration}
\entry{DMMU configuration}{14}{DMMU configuration}
\entry{data MMU configuration}{14}{data MMU configuration}
\entry{IMMU configuration}{14}{IMMU configuration}
\entry{instruction MMU configuration}{14}{instruction MMU configuration}
\entry{section dmmu}{14}{\code {section dmmu}}
\entry{section immu}{14}{\code {section immu}}
\entry{enabled (MMU configuration)}{14}{\code {enabled} (MMU configuration)}
\entry{nsets (MMU configuration)}{14}{\code {nsets} (MMU configuration)}
\entry{nways (MMU configuration)}{14}{\code {nways} (MMU configuration)}
\entry{pagesize (MMU configuration)}{14}{\code {pagesize} (MMU configuration)}
\entry{entrysize (MMU configuration)}{14}{\code {entrysize} (MMU configuration)}
\entry{ustates (MMU configuration)}{14}{\code {ustates} (MMU configuration)}
\entry{hitdelay (MMU configuration)}{14}{\code {hitdelay} (MMU configuration)}
\entry{missdelay (MMU configuration)}{14}{\code {missdelay} (MMU configuration)}
\entry{configuring data & instruction caches}{15}{configuring data & instruction caches}
\entry{cache configuration}{15}{cache configuration}
\entry{data cache configuration}{15}{data cache configuration}
\entry{instruction cache configuration}{15}{instruction cache configuration}
\entry{section dc}{15}{\code {section dc}}
\entry{section ic}{15}{\code {section ic}}
\entry{enabled (cache configuration)}{15}{\code {enabled} (cache configuration)}
\entry{nsets (cache configuration)}{15}{\code {nsets} (cache configuration)}
\entry{nways (cache configuration)}{15}{\code {nways} (cache configuration)}
\entry{blocksize (cache configuration)}{15}{\code {blocksize} (cache configuration)}
\entry{ustates (cache configuration)}{15}{\code {ustates} (cache configuration)}
\entry{hitdelay (instruction cache configuration)}{15}{\code {hitdelay} (instruction cache configuration)}
\entry{missdelay (instruction cache configuration)}{15}{\code {missdelay} (instruction cache configuration)}
\entry{load_hitdelay (data cache configuration)}{15}{\code {load_hitdelay} (data cache configuration)}
\entry{load_missdelay (data cache configuration)}{15}{\code {load_missdelay} (data cache configuration)}
\entry{store_hitdelay (data cache configuration)}{15}{\code {store_hitdelay} (data cache configuration)}
\entry{store_missdelay (data cache configuration)}{15}{\code {store_missdelay} (data cache configuration)}
\entry{configuring the interrupt controller}{15}{configuring the interrupt controller}
\entry{interrupt controller configuration}{15}{interrupt controller configuration}
\entry{programmable interrupt controller configuration}{15}{programmable interrupt controller configuration}
\entry{PIC configuration}{15}{PIC configuration}
\entry{section pic}{15}{\code {section pic}}
\entry{enabled (interrupt controller)}{16}{\code {enabled} (interrupt controller)}
\entry{edge_trigger (interrupt controller)}{16}{\code {edge_trigger} (interrupt controller)}
\entry{configuring power management}{16}{configuring power management}
\entry{power management configuration}{16}{power management configuration}
\entry{PMU configuration}{16}{PMU configuration}
\entry{section pmu}{16}{\code {section pmu}}
\entry{SDF (power management register)}{16}{SDF (power management register)}
\entry{slow down factor (power management register)}{16}{slow down factor (power management register)}
\entry{power management register, SDF}{16}{power management register, SDF}
\entry{PMR - SDF}{16}{PMR - SDF}
\entry{DME (power management register)}{16}{DME (power management register)}
\entry{doze mode (power management register)}{16}{doze mode (power management register)}
\entry{power management register, DME}{16}{power management register, DME}
\entry{PMR - DME}{16}{PMR - DME}
\entry{SME (power management register)}{16}{SME (power management register)}
\entry{sleep mode (power management register)}{16}{sleep mode (power management register)}
\entry{power management register, SME}{16}{power management register, SME}
\entry{PMR - SME}{16}{PMR - SME}
\entry{DCGE (power management register)}{16}{DCGE (power management register)}
\entry{dynamic clock gating (power management register)}{16}{dynamic clock gating (power management register)}
\entry{power management register, DGCE}{16}{power management register, DGCE}
\entry{PMR - DGCE}{16}{PMR - DGCE}
\entry{SUME (power management register)}{16}{SUME (power management register)}
\entry{suspend mode (power management register)}{16}{suspend mode (power management register)}
\entry{power management register, SUME}{16}{power management register, SUME}
\entry{PMR - SUME}{16}{PMR - SUME}
\entry{enabled (power management configuration)}{16}{\code {enabled} (power management configuration)}
\entry{configuring branch prediction}{16}{configuring branch prediction}
\entry{branch prediction configuration}{16}{branch prediction configuration}
\entry{BPB configuration}{16}{BPB configuration}
\entry{section bpb}{16}{\code {section bpb}}
\entry{enabled (branch prediction configuration)}{16}{\code {enabled} (branch prediction configuration)}
\entry{btic (branch prediction configuration)}{16}{\code {btic} (branch prediction configuration)}
\entry{sbp_bf_fwd (branch prediction configuration)}{16}{\code {sbp_bf_fwd} (branch prediction configuration)}
\entry{sbp_bnf_fwd (branch prediction configuration)}{16}{\code {sbp_bnf_fwd} (branch prediction configuration)}
\entry{hitdelay (branch prediction configuration)}{16}{\code {hitdelay} (branch prediction configuration)}
\entry{missdelay (branch prediction configuration)}{17}{\code {missdelay} (branch prediction configuration)}
\entry{configuring the debug unit and interface to external debuggers}{17}{configuring the debug unit and interface to external debuggers}
\entry{debug unit configuration}{17}{debug unit configuration}
\entry{debug interface configuration}{17}{debug interface configuration}
\entry{section debug}{17}{\code {section debug}}
\entry{enabled (debug interface configuration)}{17}{\code {enabled} (debug interface configuration)}
\entry{gdb_enabled (debug interface configuration)}{17}{\code {gdb_enabled} (debug interface configuration)}
\entry{server_port (debug interface configuration)}{17}{\code {server_port} (debug interface configuration)}
\entry{TCP/IP port range for or1ksim service}{17}{TCP/IP port range for \code {or1ksim} service}
\entry{vapi_id (debug interface configuration)}{17}{\code {vapi_id} (debug interface configuration)}
\entry{configuring the memory controller}{17}{configuring the memory controller}
\entry{memory controller configuration}{17}{memory controller configuration}
\entry{section mc}{17}{\code {section mc}}
\entry{enabled (memory controller configuration)}{18}{\code {enabled} (memory controller configuration)}
\entry{baseaddr (memory controller configuration)}{18}{\code {baseaddr} (memory controller configuration)}
\entry{poc (memory controller configuration)}{18}{\code {poc} (memory controller configuration)}
\entry{index (memory controller configuration)}{18}{\code {index} (memory controller configuration)}
\entry{configuring the UART}{18}{configuring the UART}
\entry{UART configuration}{18}{UART configuration}
\entry{section uart}{18}{\code {section uart}}
\entry{enabled (UART configuration)}{18}{\code {enabled} (UART configuration)}
\entry{baseaddr (UART configuration)}{18}{\code {baseaddr} (UART configuration)}
\entry{channel (UART configuration)}{18}{\code {channel} (UART configuration)}
\entry{UART I/O from/to files}{19}{UART I/O from/to files}
\entry{UART I/O from/to an xterm}{19}{UART I/O from/to an \command {xterm}}
\entry{UART I/O from/to TCP/IP}{19}{UART I/O from/to TCP/IP}
\entry{UART I/O from/to open file descriptors}{19}{UART I/O from/to open file descriptors}
\entry{UART I/O from/to a physical serial port}{19}{UART I/O from/to a physical serial port}
\entry{irq (UART configuration)}{19}{\code {irq} (UART configuration)}
\entry{16550 (UART configuration)}{19}{\code {16550} (UART configuration)}
\entry{jitter (UART configuration)}{19}{\code {jitter} (UART configuration)}
\entry{vapi_id (UART configuration)}{19}{\code {vapi_id} (UART configuration)}
\entry{configuring DMA}{19}{configuring DMA}
\entry{DMA configuration}{19}{DMA configuration}
\entry{section dma}{19}{\code {section dma}}
\entry{enabled (DMA configuration)}{20}{\code {enabled} (DMA configuration)}
\entry{baseaddr (DMA configuration)}{20}{\code {baseaddr} (DMA configuration)}
\entry{irq (DMA configuration)}{20}{\code {irq} (DMA configuration)}
\entry{vapi_id (DMA configuration)}{20}{\code {vapi_id} (DMA configuration)}
\entry{configuring the Ethernet interface}{20}{configuring the Ethernet interface}
\entry{Ethernet configuration}{20}{Ethernet configuration}
\entry{section ethernet}{20}{\code {section ethernet}}
\entry{enabled (Ethernet configuration)}{20}{\code {enabled} (Ethernet configuration)}
\entry{baseaddr (Ethernet configuration)}{20}{\code {baseaddr} (Ethernet configuration)}
\entry{dma (Ethernet configuration)}{20}{\code {dma} (Ethernet configuration)}
\entry{dma (Ethernet configuration)}{20}{\code {dma} (Ethernet configuration)}
\entry{rtx_type (Ethernet configuration)}{21}{\code {rtx_type} (Ethernet configuration)}
\entry{rx_channel (Ethernet configuration)}{21}{\code {rx_channel} (Ethernet configuration)}
\entry{tx_channel (Ethernet configuration)}{21}{\code {tx_channel} (Ethernet configuration)}
\entry{rxfile (Ethernet configuration)}{21}{\code {rxfile} (Ethernet configuration)}
\entry{txfile (Ethernet configuration)}{21}{\code {txfile} (Ethernet configuration)}
\entry{sockif (Ethernet configuration)}{21}{\code {sockif} (Ethernet configuration)}
\entry{vapi_id (DMA configuration)}{21}{\code {vapi_id} (DMA configuration)}
\entry{configuring the GPIO}{21}{configuring the GPIO}
\entry{GPIO configuration}{21}{GPIO configuration}
\entry{section cpio}{21}{\code {section cpio}}
\entry{enabled (GPIO configuration)}{21}{\code {enabled} (GPIO configuration)}
\entry{baseaddr (GPIO configuration)}{21}{\code {baseaddr} (GPIO configuration)}
\entry{irq (GPIO configuration)}{22}{\code {irq} (GPIO configuration)}
\entry{vapi_id (GPIO configuration)}{22}{\code {vapi_id} (GPIO configuration)}
\entry{base_vapi_id (GPIO configuration - deprecated)}{22}{\code {base_vapi_id} (GPIO configuration - deprecated)}
\entry{configuring the VGA interface}{22}{configuring the VGA interface}
\entry{display interface configuration}{22}{display interface configuration}
\entry{VGA configuration}{22}{VGA configuration}
\entry{section vga}{22}{\code {section vga}}
\entry{enabled (VGA configuration)}{22}{\code {enabled} (VGA configuration)}
\entry{baseaddr (VGA configuration)}{22}{\code {baseaddr} (VGA configuration)}
\entry{irq (VGA configuration)}{22}{\code {irq} (VGA configuration)}
\entry{refresh_rate (VGA configuration)}{22}{\code {refresh_rate} (VGA configuration)}
\entry{txfile (VGA configuration)}{22}{\code {txfile} (VGA configuration)}
\entry{filename (VGA configuration - deprecated)}{22}{\code {filename} (VGA configuration - deprecated)}
\entry{configuring the frame buffer}{22}{configuring the frame buffer}
\entry{frame buffer configuration}{22}{frame buffer configuration}
\entry{section fb}{22}{\code {section fb}}
\entry{enabled (frame buffer configuration)}{22}{\code {enabled} (frame buffer configuration)}
\entry{baseaddr (frame buffer configuration)}{23}{\code {baseaddr} (frame buffer configuration)}
\entry{refresh_rate (frame buffer configuration)}{23}{\code {refresh_rate} (frame buffer configuration)}
\entry{txfile (frame buffer configuration)}{23}{\code {txfile} (frame buffer configuration)}
\entry{filename (frame buffer configuration - deprecated)}{23}{\code {filename} (frame buffer configuration - deprecated)}
\entry{configuring the keyboard interface}{23}{configuring the keyboard interface}
\entry{configuring the PS2 interface}{23}{configuring the PS2 interface}
\entry{keyboard configuration}{23}{keyboard configuration}
\entry{PS2 configuration}{23}{PS2 configuration}
\entry{section kb}{23}{\code {section kb}}
\entry{enabled (keyboard configuration)}{23}{\code {enabled} (keyboard configuration)}
\entry{baseaddr (keyboard configuration)}{23}{\code {baseaddr} (keyboard configuration)}
\entry{irq (keyboard configuration)}{23}{\code {irq} (keyboard configuration)}
\entry{file (keyboard configuration)}{23}{\code {file} (keyboard configuration)}
\entry{configuring the ATA/ATAPI interfaces}{24}{configuring the ATA/ATAPI interfaces}
\entry{disc interface configuration}{24}{disc interface configuration}
\entry{ATA/ATAPI configuration}{24}{ATA/ATAPI configuration}
\entry{section ata}{24}{\code {section ata}}
\entry{enabled (ATA/ATAPI configuration)}{24}{\code {enabled} (ATA/ATAPI configuration)}
\entry{baseaddr (ATA/ATAPI configuration)}{24}{\code {baseaddr} (ATA/ATAPI configuration)}
\entry{irq (ATA/ATAPI configuration)}{24}{\code {irq} (ATA/ATAPI configuration)}
\entry{dev_id (ATA/ATAPI configuration)}{24}{\code {dev_id} (ATA/ATAPI configuration)}
\entry{rev (ATA/ATAPI configuration)}{24}{\code {rev} (ATA/ATAPI configuration)}
\entry{pio_mode0_t1 (ATA/ATAPI configuration)}{24}{\code {pio_mode0_t1} (ATA/ATAPI configuration)}
\entry{pio_mode0_t2 (ATA/ATAPI configuration)}{24}{\code {pio_mode0_t2} (ATA/ATAPI configuration)}
\entry{pio_mode0_t4 (ATA/ATAPI configuration)}{24}{\code {pio_mode0_t4} (ATA/ATAPI configuration)}
\entry{pio_mode0_teoc (ATA/ATAPI configuration)}{24}{\code {pio_mode0_teoc} (ATA/ATAPI configuration)}
\entry{dma_mode0_tm (ATA/ATAPI configuration)}{24}{\code {dma_mode0_tm} (ATA/ATAPI configuration)}
\entry{dma_mode0_td (ATA/ATAPI configuration)}{24}{\code {dma_mode0_td} (ATA/ATAPI configuration)}
\entry{dma_mode0_teoc (ATA/ATAPI configuration)}{24}{\code {dma_mode0_teoc} (ATA/ATAPI configuration)}
\entry{disc interface device configuration}{25}{disc interface device configuration}
\entry{ATA/ATAPI device configuration}{25}{ATA/ATAPI device configuration}
\entry{type (ATA/ATAPI device configuration)}{25}{\code {type} (ATA/ATAPI device configuration)}
\entry{file (ATA/ATAPI device configuration)}{25}{\code {file} (ATA/ATAPI device configuration)}
\entry{size (ATA/ATAPI device configuration)}{25}{\code {size} (ATA/ATAPI device configuration)}
\entry{packet (ATA/ATAPI device configuration)}{25}{\code {packet} (ATA/ATAPI device configuration)}
\entry{firmware (ATA/ATAPI device configuration)}{25}{\code {firmware} (ATA/ATAPI device configuration)}
\entry{heads (ATA/ATAPI device configuration)}{25}{\code {heads} (ATA/ATAPI device configuration)}
\entry{sectors (ATA/ATAPI device configuration)}{25}{\code {sectors} (ATA/ATAPI device configuration)}
\entry{mwdma (ATA/ATAPI device configuration)}{25}{\code {mwdma} (ATA/ATAPI device configuration)}
\entry{pio (ATA/ATAPI device configuration)}{25}{\code {pio} (ATA/ATAPI device configuration)}
\entry{generic peripheral configuration}{25}{generic peripheral configuration}
\entry{configuration of generic peripherals}{25}{configuration of generic peripherals}
\entry{section generic}{25}{\code {section generic}}
\entry{enabled (generic peripheral configuration)}{26}{\code {enabled} (generic peripheral configuration)}
\entry{baseaddr (generic peripheral configuration)}{26}{\code {baseaddr} (generic peripheral configuration)}
\entry{size (generic peripheral configuration)}{26}{\code {size} (generic peripheral configuration)}
\entry{name (generic peripheral configuration)}{26}{\code {name} (generic peripheral configuration)}
\entry{byte_enabled (generic peripheral configuration)}{26}{\code {byte_enabled} (generic peripheral configuration)}
\entry{hw_enabled (generic peripheral configuration)}{26}{\code {hw_enabled} (generic peripheral configuration)}
\entry{word_enabled (generic peripheral configuration)}{26}{\code {word_enabled} (generic peripheral configuration)}
\entry{q (Interactive CLI)}{27}{\code {q} (Interactive CLI)}
\entry{quitting (Interactive CLI)}{27}{quitting (Interactive CLI)}
\entry{r (Interactive CLI)}{27}{\code {r} (Interactive CLI)}
\entry{displaying registers (Interactive CLI)}{27}{displaying registers (Interactive CLI)}
\entry{register display (Interactive CLI)}{27}{register display (Interactive CLI)}
\entry{t (Interactive CLI)}{27}{\code {t} (Interactive CLI)}
\entry{stepping code (Interactive CLI)}{27}{stepping code (Interactive CLI)}
\entry{run (Interactive CLI)}{27}{\code {run} (Interactive CLI)}
\entry{running code (Interactive CLI)}{27}{running code (Interactive CLI)}
\entry{executing code (Interactive CLI)}{27}{executing code (Interactive CLI)}
\entry{pr (Interactive CLI)}{27}{\code {pr} (Interactive CLI)}
\entry{patching registers (Interactive CLI)}{27}{patching registers (Interactive CLI)}
\entry{register patching (Interactive CLI)}{27}{register patching (Interactive CLI)}
\entry{dm (Interactive CLI)}{27}{\code {dm} (Interactive CLI)}
\entry{displaying memory (Interactive CLI)}{27}{displaying memory (Interactive CLI)}
\entry{memory display (Interactive CLI)}{27}{memory display (Interactive CLI)}
\entry{dm (Interactive CLI)}{27}{\code {dm} (Interactive CLI)}
\entry{disassemble (Interactive CLI)}{27}{disassemble (Interactive CLI)}
\entry{pm (Interactive CLI)}{27}{\code {pm} (Interactive CLI)}
\entry{patching memory (Interactive CLI)}{27}{patching memory (Interactive CLI)}
\entry{memory patching (Interactive CLI)}{27}{memory patching (Interactive CLI)}
\entry{pc (Interactive CLI)}{27}{\code {pc} (Interactive CLI)}
\entry{patching the program counter (Interactive CLI)}{27}{patching the program counter (Interactive CLI)}
\entry{program counter patching (Interactive CLI)}{27}{program counter patching (Interactive CLI)}
\entry{cm (Interactive CLI)}{27}{\code {cm} (Interactive CLI)}
\entry{copying memory (Interactive CLI)}{27}{copying memory (Interactive CLI)}
\entry{memory copying (Interactive CLI)}{27}{memory copying (Interactive CLI)}
\entry{break (Interactive CLI)}{27}{\code {break} (Interactive CLI)}
\entry{breakpoint set/clear (Interactive CLI)}{27}{breakpoint set/clear (Interactive CLI)}
\entry{set breakpoint (Interactive CLI)}{27}{set breakpoint (Interactive CLI)}
\entry{clear breakpoint (Interactive CLI)}{27}{clear breakpoint (Interactive CLI)}
\entry{toggle breakpoint (Interactive CLI)}{27}{toggle breakpoint (Interactive CLI)}
\entry{breaks (Interactive CLI)}{27}{\code {breaks} (Interactive CLI)}
\entry{breakpoint list (Interactive CLI)}{27}{breakpoint list (Interactive CLI)}
\entry{list breakpoints (Interactive CLI)}{27}{list breakpoints (Interactive CLI)}
\entry{reset (Interactive CLI)}{27}{\code {reset} (Interactive CLI)}
\entry{simulator reset (Interactive CLI)}{27}{simulator reset (Interactive CLI)}
\entry{reset the simulator (Interactive CLI)}{27}{reset the simulator (Interactive CLI)}
\entry{hist (Interactive CLI)}{27}{\code {hist} (Interactive CLI)}
\entry{execution history (Interactive CLI)}{27}{execution history (Interactive CLI)}
\entry{history of execution (Interactive CLI)}{27}{history of execution (Interactive CLI)}
\entry{stall (Interactive CLI)}{27}{\code {stall} (Interactive CLI)}
\entry{processor stall (Interactive CLI)}{27}{processor stall (Interactive CLI)}
\entry{stall the processor (Interactive CLI)}{27}{stall the processor (Interactive CLI)}
\entry{stats (Interactive CLI)}{28}{\code {stats} (Interactive CLI)}
\entry{simulator statistics (Interactive CLI)}{28}{simulator statistics (Interactive CLI)}
\entry{statistics, simulation (Interactive CLI)}{28}{statistics, simulation (Interactive CLI)}
\entry{info (Interactive CLI)}{28}{\code {info} (Interactive CLI)}
\entry{simulator configuration info (Interactive CLI)}{28}{simulator configuration info (Interactive CLI)}
\entry{configuration info (Interactive CLI)}{28}{configuration info (Interactive CLI)}
\entry{dv (Interactive CLI)}{28}{\code {dv} (Interactive CLI)}
\entry{Verilog memory dump (Interactive CLI)}{28}{Verilog memory dump (Interactive CLI)}
\entry{memory dump, Verilog (Interactive CLI)}{28}{memory dump, Verilog (Interactive CLI)}
\entry{dv (Interactive CLI)}{28}{\code {dv} (Interactive CLI)}
\entry{hexadecimal memory dump (Interactive CLI)}{28}{hexadecimal memory dump (Interactive CLI)}
\entry{memory dump, hexadecimal (Interactive CLI)}{28}{memory dump, hexadecimal (Interactive CLI)}
\entry{setdbch (Interactive CLI)}{28}{\code {setdbch} (Interactive CLI)}
\entry{debug channel toggle (Interactive CLI)}{28}{debug channel toggle (Interactive CLI)}
\entry{toggle debug channels (Interactive CLI)}{28}{toggle debug channels (Interactive CLI)}
\entry{set (Interactive CLI)}{28}{\code {set} (Interactive CLI)}
\entry{configuration parameter setting (Interactive CLI)}{28}{configuration parameter setting (Interactive CLI)}
\entry{debug (Interactive CLI)}{28}{\code {debug} (Interactive CLI)}
\entry{debug mode toggle (Interactive CLI)}{28}{debug mode toggle (Interactive CLI)}
\entry{toggle debug mode (Interactive CLI)}{28}{toggle debug mode (Interactive CLI)}
\entry{debug (Interactive CLI)}{29}{\code {debug} (Interactive CLI)}
\entry{Custom Unit Compiler (Interactive CLI)}{29}{Custom Unit Compiler (Interactive CLI)}
\entry{help (Interactive CLI)}{29}{\code {help} (Interactive CLI)}
\entry{Custom Unit Compiler (Interactive CLI)}{29}{Custom Unit Compiler (Interactive CLI)}
\entry{mprofile (Interactive CLI)}{29}{\code {mprofile} (Interactive CLI)}
\entry{memory profiling utility (Interactive CLI)}{29}{memory profiling utility (Interactive CLI)}
\entry{mprofile (Interactive CLI)}{29}{\code {mprofile} (Interactive CLI)}
\entry{profiling utility (Interactive CLI)}{29}{profiling utility (Interactive CLI)}
\entry{instruction profiling utility (Interactive CLI)}{29}{instruction profiling utility (Interactive CLI)}
\entry{Debug Unit verification (VAPI)}{30}{Debug Unit verification (VAPI)}
\entry{VAPI for Debug Unit}{30}{VAPI for Debug Unit}
\entry{UART verification (VAPI)}{30}{UART verification (VAPI)}
\entry{VAPI for UART}{30}{VAPI for UART}
\entry{0x00 UART VAPI sub-command (UART verification)}{30}{0x00 UART VAPI sub-command (UART verification)}
\entry{0x01 UART VAPI sub-command (UART verification)}{30}{0x01 UART VAPI sub-command (UART verification)}
\entry{0x02 UART VAPI sub-command (UART verification)}{30}{0x02 UART VAPI sub-command (UART verification)}
\entry{0x03 UART VAPI sub-command (UART verification)}{30}{0x03 UART VAPI sub-command (UART verification)}
\entry{0x04 UART VAPI sub-command (UART verification)}{30}{0x04 UART VAPI sub-command (UART verification)}
\entry{DMA verification (VAPI)}{30}{DMA verification (VAPI)}
\entry{VAPI for DMA}{30}{VAPI for DMA}
\entry{Ethernet verification (VAPI)}{30}{Ethernet verification (VAPI)}
\entry{VAPI for Ethernet}{30}{VAPI for Ethernet}
\entry{ETH_VAPI_DATA (Ethernet verification)}{31}{\code {ETH_VAPI_DATA} (Ethernet verification)}
\entry{ETH_VAPI_CTRL (Ethernet verification)}{31}{\code {ETH_VAPI_CTRL} (Ethernet verification)}
\entry{GPIO verification (VAPI)}{31}{GPIO verification (VAPI)}
\entry{VAPI for GPIO}{31}{VAPI for GPIO}
\entry{GPIO_VAPI_DATA (GPIO verification)}{31}{\code {GPIO_VAPI_DATA} (GPIO verification)}
\entry{GPIO_VAPI_AUX (GPIO verification)}{31}{\code {GPIO_VAPI_AUX} (GPIO verification)}
\entry{GPIO_VAPI_CLOCK (GPIO verification)}{31}{\code {GPIO_VAPI_CLOCK} (GPIO verification)}
\entry{GPIO_VAPI_RGPIO (GPIO verification)}{31}{\code {GPIO_VAPI_RGPIO} (GPIO verification)}
\entry{GPIO_VAPI_INTE (GPIO verification)}{31}{\code {GPIO_VAPI_INTE} (GPIO verification)}
\entry{GPIO_VAPI_PTRIG (GPIO verification)}{31}{\code {GPIO_VAPI_PTRIG} (GPIO verification)}
\entry{GPIO_VAPI_AUX (GPIO verification)}{31}{\code {GPIO_VAPI_AUX} (GPIO verification)}
\entry{GPIO_VAPI_CTRL (GPIO verification)}{31}{\code {GPIO_VAPI_CTRL} (GPIO verification)}
\entry{configuration global structure}{33}{configuration global structure}
\entry{config}{33}{\code {config}}
\entry{config.sim}{33}{\code {config.sim}}
\entry{config.vapi}{33}{\code {config.vapi}}
\entry{config.cuc}{33}{\code {config.cuc}}
\entry{config.cpu}{33}{\code {config.cpu}}
\entry{config.dc}{33}{\code {config.dc}}
\entry{config.pm}{33}{\code {config.pm}}
\entry{config.pic}{34}{\code {config.pic}}
\entry{config.bpb}{34}{\code {config.bpb}}
\entry{config.debug}{34}{\code {config.debug}}
\entry{configuration dynamic structure}{34}{configuration dynamic structure}
\entry{sections}{34}{\code {sections}}
\entry{runtime global structure}{34}{runtime global structure}
\entry{runtime}{34}{\code {runtime}}
\entry{runtime.cpu}{34}{\code {runtime.cpu}}
\entry{runtime.vapi}{34}{\code {runtime.vapi}}
\entry{runtime.cuc}{34}{\code {runtime.cuc}}
\entry{output rediretion}{34}{output rediretion}
\entry{runtime.cpu.fout}{34}{\code {runtime.cpu.fout}}
\entry{reset hooks}{34}{reset hooks}
\entry{reg_sim_reset}{34}{\code {reg_sim_reset}}
\entry{internal debugging}{34}{internal debugging}
\entry{license for Or1ksim}{35}{license for Or1ksim}
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