URL
https://opencores.org/ocsvn/openrisc/openrisc/trunk
Subversion Repositories openrisc
[/] [openrisc/] [trunk/] [gnu-dev/] [or1k-gcc/] [gcc/] [config/] [mep/] [intrinsics.md] - Rev 757
Go to most recent revision | Compare with Previous | Blame | View Log
;; DO NOT EDIT: This file is automatically generated by CGEN.;; Any changes you make will be discarded when it is next regenerated.(define_predicate "cgen_h_sint_12a1_immediate"(and (match_code "const_int")(match_test "(INTVAL (op) & 0) == 0&& INTVAL (op) >= -2048&& INTVAL (op) < 2048")))(define_predicate "cgen_h_uint_20a1_immediate"(and (match_code "const_int")(match_test "(INTVAL (op) & 0) == 0&& INTVAL (op) >= 0&& INTVAL (op) < 1048576")))(define_predicate "cgen_h_uint_7a1_immediate"(and (match_code "const_int")(match_test "(INTVAL (op) & 0) == 0&& INTVAL (op) >= 0&& INTVAL (op) < 128")))(define_predicate "cgen_h_uint_6a2_immediate"(and (match_code "const_int")(match_test "(INTVAL (op) & 1) == 0&& INTVAL (op) >= 0&& INTVAL (op) < 128")))(define_predicate "cgen_h_uint_22a4_immediate"(and (match_code "const_int")(match_test "(INTVAL (op) & 3) == 0&& INTVAL (op) >= 0&& INTVAL (op) < 33554432")))(define_predicate "cgen_h_sint_2a1_immediate"(and (match_code "const_int")(match_test "(INTVAL (op) & 0) == 0&& INTVAL (op) >= -2&& INTVAL (op) < 2")))(define_predicate "cgen_h_uint_24a1_immediate"(and (match_code "const_int")(match_test "(INTVAL (op) & 0) == 0&& INTVAL (op) >= 0&& INTVAL (op) < 16777216")))(define_predicate "cgen_h_sint_6a1_immediate"(and (match_code "const_int")(match_test "(INTVAL (op) & 0) == 0&& INTVAL (op) >= -32&& INTVAL (op) < 32")))(define_predicate "cgen_h_uint_5a4_immediate"(and (match_code "const_int")(match_test "(INTVAL (op) & 3) == 0&& INTVAL (op) >= 0&& INTVAL (op) < 256")))(define_predicate "cgen_h_uint_2a1_immediate"(and (match_code "const_int")(match_test "(INTVAL (op) & 0) == 0&& INTVAL (op) >= 0&& INTVAL (op) < 4")))(define_predicate "cgen_h_sint_10a1_immediate"(and (match_code "const_int")(match_test "(INTVAL (op) & 0) == 0&& INTVAL (op) >= -512&& INTVAL (op) < 512")))(define_predicate "cgen_h_uint_4a1_immediate"(and (match_code "const_int")(match_test "(INTVAL (op) & 0) == 0&& INTVAL (op) >= 0&& INTVAL (op) < 16")))(define_predicate "cgen_h_uint_6a1_immediate"(and (match_code "const_int")(match_test "(INTVAL (op) & 0) == 0&& INTVAL (op) >= 0&& INTVAL (op) < 64")))(define_predicate "cgen_h_uint_16a1_immediate"(and (match_code "const_int")(match_test "(INTVAL (op) & 0) == 0&& INTVAL (op) >= 0&& INTVAL (op) < 65536")))(define_predicate "cgen_h_uint_8a1_immediate"(and (match_code "const_int")(match_test "(INTVAL (op) & 0) == 0&& INTVAL (op) >= 0&& INTVAL (op) < 256")))(define_predicate "cgen_h_sint_16a1_immediate"(and (match_code "const_int")(match_test "(INTVAL (op) & 0) == 0&& INTVAL (op) >= -32768&& INTVAL (op) < 32768")))(define_predicate "cgen_h_uint_5a1_immediate"(and (match_code "const_int")(match_test "(INTVAL (op) & 0) == 0&& INTVAL (op) >= 0&& INTVAL (op) < 32")))(define_predicate "cgen_h_sint_8a1_immediate"(and (match_code "const_int")(match_test "(INTVAL (op) & 0) == 0&& INTVAL (op) >= -128&& INTVAL (op) < 128")))(define_predicate "cgen_h_uint_3a1_immediate"(and (match_code "const_int")(match_test "(INTVAL (op) & 0) == 0&& INTVAL (op) >= 0&& INTVAL (op) < 8")))(define_insn "cgen_intrinsic_cpsmsbslla1_w_C3"[(set (reg:SI 87)(unspec_volatile:SI [(match_operand:DI 0 "general_operand" "x")(match_operand:DI 1 "general_operand" "x")] 2198))(set (reg:SI 107)(unspec_volatile:SI [(match_dup 0)(match_dup 1)] 2200))(set (reg:SI 106)(unspec_volatile:SI [(match_dup 0)(match_dup 1)] 2202))(set (reg:SI 105)(unspec_volatile:SI [(match_dup 0)(match_dup 1)] 2204))(set (reg:SI 104)(unspec_volatile:SI [(match_dup 0)(match_dup 1)] 2206))]"CGEN_ENABLE_INSN_P (0)""cpsmsbslla1.w\\t%0,%1"[(set_attr "may_trap" "no")(set_attr "latency" "0")(set_attr "length" "4")(set_attr "slot" "cop")(set_attr "slots" "c3")(set_attr "stall" "none")])(define_insn "cgen_intrinsic_cpsmsbslla1_w_P1"[(set (reg:SI 87)(unspec_volatile:SI [(match_operand:DI 0 "general_operand" "x")(match_operand:DI 1 "general_operand" "x")] 2198))(set (reg:SI 107)(unspec_volatile:SI [(match_dup 0)(match_dup 1)] 2200))(set (reg:SI 106)(unspec_volatile:SI [(match_dup 0)(match_dup 1)] 2202))(set (reg:SI 105)(unspec_volatile:SI [(match_dup 0)(match_dup 1)] 2204))(set (reg:SI 104)(unspec_volatile:SI [(match_dup 0)(match_dup 1)] 2206))]"CGEN_ENABLE_INSN_P (1)""cpsmsbslla1.w\\t%0,%1"[(set_attr "may_trap" "no")(set_attr "latency" "0")(set_attr "length" "4")(set_attr "slot" "cop")(set_attr "slots" "p1")(set_attr "stall" "none")])(define_insn "cgen_intrinsic_cpsmsbslua1_w_C3"[(set (reg:SI 87)(unspec_volatile:SI [(match_operand:DI 0 "general_operand" "x")(match_operand:DI 1 "general_operand" "x")] 2208))(set (reg:SI 111)(unspec_volatile:SI [(match_dup 0)(match_dup 1)] 2210))(set (reg:SI 110)(unspec_volatile:SI [(match_dup 0)(match_dup 1)] 2212))(set (reg:SI 109)(unspec_volatile:SI [(match_dup 0)(match_dup 1)] 2214))(set (reg:SI 108)(unspec_volatile:SI [(match_dup 0)(match_dup 1)] 2216))]"CGEN_ENABLE_INSN_P (2)""cpsmsbslua1.w\\t%0,%1"[(set_attr "may_trap" "no")(set_attr "latency" "0")(set_attr "length" "4")(set_attr "slot" "cop")(set_attr "slots" "c3")(set_attr "stall" "none")])(define_insn "cgen_intrinsic_cpsmsbslua1_w_P1"[(set (reg:SI 87)(unspec_volatile:SI [(match_operand:DI 0 "general_operand" "x")(match_operand:DI 1 "general_operand" "x")] 2208))(set (reg:SI 111)(unspec_volatile:SI [(match_dup 0)(match_dup 1)] 2210))(set (reg:SI 110)(unspec_volatile:SI [(match_dup 0)(match_dup 1)] 2212))(set (reg:SI 109)(unspec_volatile:SI [(match_dup 0)(match_dup 1)] 2214))(set (reg:SI 108)(unspec_volatile:SI [(match_dup 0)(match_dup 1)] 2216))]"CGEN_ENABLE_INSN_P (3)""cpsmsbslua1.w\\t%0,%1"[(set_attr "may_trap" "no")(set_attr "latency" "0")(set_attr "length" "4")(set_attr "slot" "cop")(set_attr "slots" "p1")(set_attr "stall" "none")])(define_insn "cgen_intrinsic_cpsmsbslla1_h_C3"[(set (reg:SI 87)(unspec_volatile:SI [(match_operand:DI 0 "general_operand" "x")(match_operand:DI 1 "general_operand" "x")] 2218))(set (reg:SI 107)(unspec_volatile:SI [(match_dup 0)(match_dup 1)] 2220))(set (reg:SI 106)(unspec_volatile:SI [(match_dup 0)(match_dup 1)] 2222))(set (reg:SI 105)(unspec_volatile:SI [(match_dup 0)(match_dup 1)] 2224))(set (reg:SI 104)(unspec_volatile:SI [(match_dup 0)(match_dup 1)] 2226))]"CGEN_ENABLE_INSN_P (4)""cpsmsbslla1.h\\t%0,%1"[(set_attr "may_trap" "no")(set_attr "latency" "0")(set_attr "length" "4")(set_attr "slot" "cop")(set_attr "slots" "c3")(set_attr "stall" "none")])(define_insn "cgen_intrinsic_cpsmsbslla1_h_P1"[(set (reg:SI 87)(unspec_volatile:SI [(match_operand:DI 0 "general_operand" "x")(match_operand:DI 1 "general_operand" "x")] 2218))(set (reg:SI 107)(unspec_volatile:SI [(match_dup 0)(match_dup 1)] 2220))(set (reg:SI 106)(unspec_volatile:SI [(match_dup 0)(match_dup 1)] 2222))(set (reg:SI 105)(unspec_volatile:SI [(match_dup 0)(match_dup 1)] 2224))(set (reg:SI 104)(unspec_volatile:SI [(match_dup 0)(match_dup 1)] 2226))]"CGEN_ENABLE_INSN_P (5)""cpsmsbslla1.h\\t%0,%1"[(set_attr "may_trap" "no")(set_attr "latency" "0")(set_attr "length" "4")(set_attr "slot" "cop")(set_attr "slots" "p1")(set_attr "stall" "none")])(define_insn "cgen_intrinsic_cpsmsbslua1_h_C3"[(set (reg:SI 87)(unspec_volatile:SI [(match_operand:DI 0 "general_operand" "x")(match_operand:DI 1 "general_operand" "x")] 2228))(set (reg:SI 111)(unspec_volatile:SI [(match_dup 0)(match_dup 1)] 2230))(set (reg:SI 110)(unspec_volatile:SI [(match_dup 0)(match_dup 1)] 2232))(set (reg:SI 109)(unspec_volatile:SI [(match_dup 0)(match_dup 1)] 2234))(set (reg:SI 108)(unspec_volatile:SI [(match_dup 0)(match_dup 1)] 2236))]"CGEN_ENABLE_INSN_P (6)""cpsmsbslua1.h\\t%0,%1"[(set_attr "may_trap" "no")(set_attr "latency" "0")(set_attr "length" "4")(set_attr "slot" "cop")(set_attr "slots" "c3")(set_attr "stall" "none")])(define_insn "cgen_intrinsic_cpsmsbslua1_h_P1"[(set (reg:SI 87)(unspec_volatile:SI [(match_operand:DI 0 "general_operand" "x")(match_operand:DI 1 "general_operand" "x")] 2228))(set (reg:SI 111)(unspec_volatile:SI [(match_dup 0)(match_dup 1)] 2230))(set (reg:SI 110)(unspec_volatile:SI [(match_dup 0)(match_dup 1)] 2232))(set (reg:SI 109)(unspec_volatile:SI [(match_dup 0)(match_dup 1)] 2234))(set (reg:SI 108)(unspec_volatile:SI [(match_dup 0)(match_dup 1)] 2236))]"CGEN_ENABLE_INSN_P (7)""cpsmsbslua1.h\\t%0,%1"[(set_attr "may_trap" "no")(set_attr "latency" "0")(set_attr "length" "4")(set_attr "slot" "cop")(set_attr "slots" "p1")(set_attr "stall" "none")])(define_insn "cgen_intrinsic_cpsmadslla1_w_C3"[(set (reg:SI 87)(unspec_volatile:SI [(match_operand:DI 0 "general_operand" "x")(match_operand:DI 1 "general_operand" "x")] 2238))(set (reg:SI 107)(unspec_volatile:SI [(match_dup 0)(match_dup 1)] 2240))(set (reg:SI 106)(unspec_volatile:SI [(match_dup 0)(match_dup 1)] 2242))(set (reg:SI 105)(unspec_volatile:SI [(match_dup 0)(match_dup 1)] 2244))(set (reg:SI 104)(unspec_volatile:SI [(match_dup 0)(match_dup 1)] 2246))]"CGEN_ENABLE_INSN_P (8)""cpsmadslla1.w\\t%0,%1"[(set_attr "may_trap" "no")(set_attr "latency" "0")(set_attr "length" "4")(set_attr "slot" "cop")(set_attr "slots" "c3")(set_attr "stall" "none")])(define_insn "cgen_intrinsic_cpsmadslla1_w_P1"[(set (reg:SI 87)(unspec_volatile:SI [(match_operand:DI 0 "general_operand" "x")(match_operand:DI 1 "general_operand" "x")] 2238))(set (reg:SI 107)(unspec_volatile:SI [(match_dup 0)(match_dup 1)] 2240))(set (reg:SI 106)(unspec_volatile:SI [(match_dup 0)(match_dup 1)] 2242))(set (reg:SI 105)(unspec_volatile:SI [(match_dup 0)(match_dup 1)] 2244))(set (reg:SI 104)(unspec_volatile:SI [(match_dup 0)(match_dup 1)] 2246))]"CGEN_ENABLE_INSN_P (9)""cpsmadslla1.w\\t%0,%1"[(set_attr "may_trap" "no")(set_attr "latency" "0")(set_attr "length" "4")(set_attr "slot" "cop")(set_attr "slots" "p1")(set_attr "stall" "none")])(define_insn "cgen_intrinsic_cpsmadslua1_w_C3"[(set (reg:SI 87)(unspec_volatile:SI [(match_operand:DI 0 "general_operand" "x")(match_operand:DI 1 "general_operand" "x")] 2248))(set (reg:SI 111)(unspec_volatile:SI [(match_dup 0)(match_dup 1)] 2250))(set (reg:SI 110)(unspec_volatile:SI [(match_dup 0)(match_dup 1)] 2252))(set (reg:SI 109)(unspec_volatile:SI [(match_dup 0)(match_dup 1)] 2254))(set (reg:SI 108)(unspec_volatile:SI [(match_dup 0)(match_dup 1)] 2256))]"CGEN_ENABLE_INSN_P (10)""cpsmadslua1.w\\t%0,%1"[(set_attr "may_trap" "no")(set_attr "latency" "0")(set_attr "length" "4")(set_attr "slot" "cop")(set_attr "slots" "c3")(set_attr "stall" "none")])(define_insn "cgen_intrinsic_cpsmadslua1_w_P1"[(set (reg:SI 87)(unspec_volatile:SI [(match_operand:DI 0 "general_operand" "x")(match_operand:DI 1 "general_operand" "x")] 2248))(set (reg:SI 111)(unspec_volatile:SI [(match_dup 0)(match_dup 1)] 2250))(set (reg:SI 110)(unspec_volatile:SI [(match_dup 0)(match_dup 1)] 2252))(set (reg:SI 109)(unspec_volatile:SI [(match_dup 0)(match_dup 1)] 2254))(set (reg:SI 108)(unspec_volatile:SI [(match_dup 0)(match_dup 1)] 2256))]"CGEN_ENABLE_INSN_P (11)""cpsmadslua1.w\\t%0,%1"[(set_attr "may_trap" "no")(set_attr "latency" "0")(set_attr "length" "4")(set_attr "slot" "cop")(set_attr "slots" "p1")(set_attr "stall" "none")])(define_insn "cgen_intrinsic_cpsmadslla1_h_C3"[(set (reg:SI 87)(unspec_volatile:SI [(match_operand:DI 0 "general_operand" "x")(match_operand:DI 1 "general_operand" "x")] 2258))(set (reg:SI 107)(unspec_volatile:SI [(match_dup 0)(match_dup 1)] 2260))(set (reg:SI 106)(unspec_volatile:SI [(match_dup 0)(match_dup 1)] 2262))(set (reg:SI 105)(unspec_volatile:SI [(match_dup 0)(match_dup 1)] 2264))(set (reg:SI 104)(unspec_volatile:SI [(match_dup 0)(match_dup 1)] 2266))]"CGEN_ENABLE_INSN_P (12)""cpsmadslla1.h\\t%0,%1"[(set_attr "may_trap" "no")(set_attr "latency" "0")(set_attr "length" "4")(set_attr "slot" "cop")(set_attr "slots" "c3")(set_attr "stall" "none")])(define_insn "cgen_intrinsic_cpsmadslla1_h_P1"[(set (reg:SI 87)(unspec_volatile:SI [(match_operand:DI 0 "general_operand" "x")(match_operand:DI 1 "general_operand" "x")] 2258))(set (reg:SI 107)(unspec_volatile:SI [(match_dup 0)(match_dup 1)] 2260))(set (reg:SI 106)(unspec_volatile:SI [(match_dup 0)(match_dup 1)] 2262))(set (reg:SI 105)(unspec_volatile:SI [(match_dup 0)(match_dup 1)] 2264))(set (reg:SI 104)(unspec_volatile:SI [(match_dup 0)(match_dup 1)] 2266))]"CGEN_ENABLE_INSN_P (13)""cpsmadslla1.h\\t%0,%1"[(set_attr "may_trap" "no")(set_attr "latency" "0")(set_attr "length" "4")(set_attr "slot" "cop")(set_attr "slots" "p1")(set_attr "stall" "none")])(define_insn "cgen_intrinsic_cpsmadslua1_h_C3"[(set (reg:SI 87)(unspec_volatile:SI [(match_operand:DI 0 "general_operand" "x")(match_operand:DI 1 "general_operand" "x")] 2268))(set (reg:SI 111)(unspec_volatile:SI [(match_dup 0)(match_dup 1)] 2270))(set (reg:SI 110)(unspec_volatile:SI [(match_dup 0)(match_dup 1)] 2272))(set (reg:SI 109)(unspec_volatile:SI [(match_dup 0)(match_dup 1)] 2274))(set (reg:SI 108)(unspec_volatile:SI [(match_dup 0)(match_dup 1)] 2276))]"CGEN_ENABLE_INSN_P (14)""cpsmadslua1.h\\t%0,%1"[(set_attr "may_trap" "no")(set_attr "latency" "0")(set_attr "length" "4")(set_attr "slot" "cop")(set_attr "slots" "c3")(set_attr "stall" "none")])(define_insn "cgen_intrinsic_cpsmadslua1_h_P1"[(set (reg:SI 87)(unspec_volatile:SI [(match_operand:DI 0 "general_operand" "x")(match_operand:DI 1 "general_operand" "x")] 2268))(set (reg:SI 111)(unspec_volatile:SI [(match_dup 0)(match_dup 1)] 2270))(set (reg:SI 110)(unspec_volatile:SI [(match_dup 0)(match_dup 1)] 2272))(set (reg:SI 109)(unspec_volatile:SI [(match_dup 0)(match_dup 1)] 2274))(set (reg:SI 108)(unspec_volatile:SI [(match_dup 0)(match_dup 1)] 2276))]"CGEN_ENABLE_INSN_P (15)""cpsmadslua1.h\\t%0,%1"[(set_attr "may_trap" "no")(set_attr "latency" "0")(set_attr "length" "4")(set_attr "slot" "cop")(set_attr "slots" "p1")(set_attr "stall" "none")])(define_insn "cgen_intrinsic_cpmulslla1_w_C3"[(set (reg:SI 87)(unspec_volatile:SI [(match_operand:DI 0 "general_operand" "x")(match_operand:DI 1 "general_operand" "x")] 2278))(set (reg:SI 107)(unspec_volatile:SI [(match_dup 0)(match_dup 1)] 2280))(set (reg:SI 106)(unspec_volatile:SI [(match_dup 0)(match_dup 1)] 2282))(set (reg:SI 105)(unspec_volatile:SI [(match_dup 0)(match_dup 1)] 2284))(set (reg:SI 104)(unspec_volatile:SI [(match_dup 0)(match_dup 1)] 2286))]"CGEN_ENABLE_INSN_P (16)""cpmulslla1.w\\t%0,%1"[(set_attr "may_trap" "no")(set_attr "latency" "0")(set_attr "length" "4")(set_attr "slot" "cop")(set_attr "slots" "c3")(set_attr "stall" "none")])(define_insn "cgen_intrinsic_cpmulslla1_w_P1"[(set (reg:SI 87)(unspec_volatile:SI [(match_operand:DI 0 "general_operand" "x")(match_operand:DI 1 "general_operand" "x")] 2278))(set (reg:SI 107)(unspec_volatile:SI [(match_dup 0)(match_dup 1)] 2280))(set (reg:SI 106)(unspec_volatile:SI [(match_dup 0)(match_dup 1)] 2282))(set (reg:SI 105)(unspec_volatile:SI [(match_dup 0)(match_dup 1)] 2284))(set (reg:SI 104)(unspec_volatile:SI [(match_dup 0)(match_dup 1)] 2286))]"CGEN_ENABLE_INSN_P (17)""cpmulslla1.w\\t%0,%1"[(set_attr "may_trap" "no")(set_attr "latency" "0")(set_attr "length" "4")(set_attr "slot" "cop")(set_attr "slots" "p1")(set_attr "stall" "none")])(define_insn "cgen_intrinsic_cpmulslua1_w_C3"[(set (reg:SI 87)(unspec_volatile:SI [(match_operand:DI 0 "general_operand" "x")(match_operand:DI 1 "general_operand" "x")] 2288))(set (reg:SI 111)(unspec_volatile:SI [(match_dup 0)(match_dup 1)] 2290))(set (reg:SI 110)(unspec_volatile:SI [(match_dup 0)(match_dup 1)] 2292))(set (reg:SI 109)(unspec_volatile:SI [(match_dup 0)(match_dup 1)] 2294))(set (reg:SI 108)(unspec_volatile:SI [(match_dup 0)(match_dup 1)] 2296))]"CGEN_ENABLE_INSN_P (18)""cpmulslua1.w\\t%0,%1"[(set_attr "may_trap" "no")(set_attr "latency" "0")(set_attr "length" "4")(set_attr "slot" "cop")(set_attr "slots" "c3")(set_attr "stall" "none")])(define_insn "cgen_intrinsic_cpmulslua1_w_P1"[(set (reg:SI 87)(unspec_volatile:SI [(match_operand:DI 0 "general_operand" "x")(match_operand:DI 1 "general_operand" "x")] 2288))(set (reg:SI 111)(unspec_volatile:SI [(match_dup 0)(match_dup 1)] 2290))(set (reg:SI 110)(unspec_volatile:SI [(match_dup 0)(match_dup 1)] 2292))(set (reg:SI 109)(unspec_volatile:SI [(match_dup 0)(match_dup 1)] 2294))(set (reg:SI 108)(unspec_volatile:SI [(match_dup 0)(match_dup 1)] 2296))]"CGEN_ENABLE_INSN_P (19)""cpmulslua1.w\\t%0,%1"[(set_attr "may_trap" "no")(set_attr "latency" "0")(set_attr "length" "4")(set_attr "slot" "cop")(set_attr "slots" "p1")(set_attr "stall" "none")])(define_insn "cgen_intrinsic_cpmulslla1_h_C3"[(set (reg:SI 87)(unspec_volatile:SI [(match_operand:DI 0 "general_operand" "x")(match_operand:DI 1 "general_operand" "x")] 2298))(set (reg:SI 107)(unspec_volatile:SI [(match_dup 0)(match_dup 1)] 2300))(set (reg:SI 106)(unspec_volatile:SI [(match_dup 0)(match_dup 1)] 2302))(set (reg:SI 105)(unspec_volatile:SI [(match_dup 0)(match_dup 1)] 2304))(set (reg:SI 104)(unspec_volatile:SI [(match_dup 0)(match_dup 1)] 2306))]"CGEN_ENABLE_INSN_P (20)""cpmulslla1.h\\t%0,%1"[(set_attr "may_trap" "no")(set_attr "latency" "0")(set_attr "length" "4")(set_attr "slot" "cop")(set_attr "slots" "c3")(set_attr "stall" "none")])(define_insn "cgen_intrinsic_cpmulslla1_h_P1"[(set (reg:SI 87)(unspec_volatile:SI [(match_operand:DI 0 "general_operand" "x")(match_operand:DI 1 "general_operand" "x")] 2298))(set (reg:SI 107)(unspec_volatile:SI [(match_dup 0)(match_dup 1)] 2300))(set (reg:SI 106)(unspec_volatile:SI [(match_dup 0)(match_dup 1)] 2302))(set (reg:SI 105)(unspec_volatile:SI [(match_dup 0)(match_dup 1)] 2304))(set (reg:SI 104)(unspec_volatile:SI [(match_dup 0)(match_dup 1)] 2306))]"CGEN_ENABLE_INSN_P (21)""cpmulslla1.h\\t%0,%1"[(set_attr "may_trap" "no")(set_attr "latency" "0")(set_attr "length" "4")(set_attr "slot" "cop")(set_attr "slots" "p1")(set_attr "stall" "none")])(define_insn "cgen_intrinsic_cpmulslua1_h_C3"[(set (reg:SI 87)(unspec_volatile:SI [(match_operand:DI 0 "general_operand" "x")(match_operand:DI 1 "general_operand" "x")] 2308))(set (reg:SI 111)(unspec_volatile:SI [(match_dup 0)(match_dup 1)] 2310))(set (reg:SI 110)(unspec_volatile:SI [(match_dup 0)(match_dup 1)] 2312))(set (reg:SI 109)(unspec_volatile:SI [(match_dup 0)(match_dup 1)] 2314))(set (reg:SI 108)(unspec_volatile:SI [(match_dup 0)(match_dup 1)] 2316))]"CGEN_ENABLE_INSN_P (22)""cpmulslua1.h\\t%0,%1"[(set_attr "may_trap" "no")(set_attr "latency" "0")(set_attr "length" "4")(set_attr "slot" "cop")(set_attr "slots" "c3")(set_attr "stall" "none")])(define_insn "cgen_intrinsic_cpmulslua1_h_P1"[(set (reg:SI 87)(unspec_volatile:SI [(match_operand:DI 0 "general_operand" "x")(match_operand:DI 1 "general_operand" "x")] 2308))(set (reg:SI 111)(unspec_volatile:SI [(match_dup 0)(match_dup 1)] 2310))(set (reg:SI 110)(unspec_volatile:SI [(match_dup 0)(match_dup 1)] 2312))(set (reg:SI 109)(unspec_volatile:SI [(match_dup 0)(match_dup 1)] 2314))(set (reg:SI 108)(unspec_volatile:SI [(match_dup 0)(match_dup 1)] 2316))]"CGEN_ENABLE_INSN_P (23)""cpmulslua1.h\\t%0,%1"[(set_attr "may_trap" "no")(set_attr "latency" "0")(set_attr "length" "4")(set_attr "slot" "cop")(set_attr "slots" "p1")(set_attr "stall" "none")])(define_insn "cgen_intrinsic_cpsmsbla1_w_C3"[(set (reg:SI 87)(unspec_volatile:SI [(match_operand:DI 0 "general_operand" "x")(match_operand:DI 1 "general_operand" "x")] 2318))(set (reg:SI 107)(unspec_volatile:SI [(match_dup 0)(match_dup 1)] 2320))(set (reg:SI 106)(unspec_volatile:SI [(match_dup 0)(match_dup 1)] 2322))(set (reg:SI 105)(unspec_volatile:SI [(match_dup 0)(match_dup 1)] 2324))(set (reg:SI 104)(unspec_volatile:SI [(match_dup 0)(match_dup 1)] 2326))]"CGEN_ENABLE_INSN_P (24)""cpsmsbla1.w\\t%0,%1"[(set_attr "may_trap" "no")(set_attr "latency" "0")(set_attr "length" "4")(set_attr "slot" "cop")(set_attr "slots" "c3")(set_attr "stall" "none")])(define_insn "cgen_intrinsic_cpsmsbla1_w_P1"[(set (reg:SI 87)(unspec_volatile:SI [(match_operand:DI 0 "general_operand" "x")(match_operand:DI 1 "general_operand" "x")] 2318))(set (reg:SI 107)(unspec_volatile:SI [(match_dup 0)(match_dup 1)] 2320))(set (reg:SI 106)(unspec_volatile:SI [(match_dup 0)(match_dup 1)] 2322))(set (reg:SI 105)(unspec_volatile:SI [(match_dup 0)(match_dup 1)] 2324))(set (reg:SI 104)(unspec_volatile:SI [(match_dup 0)(match_dup 1)] 2326))]"CGEN_ENABLE_INSN_P (25)""cpsmsbla1.w\\t%0,%1"[(set_attr "may_trap" "no")(set_attr "latency" "0")(set_attr "length" "4")(set_attr "slot" "cop")(set_attr "slots" "p1")(set_attr "stall" "none")])(define_insn "cgen_intrinsic_cpsmsbua1_w_C3"[(set (reg:SI 87)(unspec_volatile:SI [(match_operand:DI 0 "general_operand" "x")(match_operand:DI 1 "general_operand" "x")] 2328))(set (reg:SI 111)(unspec_volatile:SI [(match_dup 0)(match_dup 1)] 2330))(set (reg:SI 110)(unspec_volatile:SI [(match_dup 0)(match_dup 1)] 2332))(set (reg:SI 109)(unspec_volatile:SI [(match_dup 0)(match_dup 1)] 2334))(set (reg:SI 108)(unspec_volatile:SI [(match_dup 0)(match_dup 1)] 2336))]"CGEN_ENABLE_INSN_P (26)""cpsmsbua1.w\\t%0,%1"[(set_attr "may_trap" "no")(set_attr "latency" "0")(set_attr "length" "4")(set_attr "slot" "cop")(set_attr "slots" "c3")(set_attr "stall" "none")])(define_insn "cgen_intrinsic_cpsmsbua1_w_P1"[(set (reg:SI 87)(unspec_volatile:SI [(match_operand:DI 0 "general_operand" "x")(match_operand:DI 1 "general_operand" "x")] 2328))(set (reg:SI 111)(unspec_volatile:SI [(match_dup 0)(match_dup 1)] 2330))(set (reg:SI 110)(unspec_volatile:SI [(match_dup 0)(match_dup 1)] 2332))(set (reg:SI 109)(unspec_volatile:SI [(match_dup 0)(match_dup 1)] 2334))(set (reg:SI 108)(unspec_volatile:SI [(match_dup 0)(match_dup 1)] 2336))]"CGEN_ENABLE_INSN_P (27)""cpsmsbua1.w\\t%0,%1"[(set_attr "may_trap" "no")(set_attr "latency" "0")(set_attr "length" "4")(set_attr "slot" "cop")(set_attr "slots" "p1")(set_attr "stall" "none")])(define_insn "cgen_intrinsic_cpsmsbla1_h_C3"[(set (reg:SI 87)(unspec_volatile:SI [(match_operand:DI 0 "general_operand" "x")(match_operand:DI 1 "general_operand" "x")] 2338))(set (reg:SI 107)(unspec_volatile:SI [(match_dup 0)(match_dup 1)] 2340))(set (reg:SI 106)(unspec_volatile:SI [(match_dup 0)(match_dup 1)] 2342))(set (reg:SI 105)(unspec_volatile:SI [(match_dup 0)(match_dup 1)] 2344))(set (reg:SI 104)(unspec_volatile:SI [(match_dup 0)(match_dup 1)] 2346))]"CGEN_ENABLE_INSN_P (28)""cpsmsbla1.h\\t%0,%1"[(set_attr "may_trap" "no")(set_attr "latency" "0")(set_attr "length" "4")(set_attr "slot" "cop")(set_attr "slots" "c3")(set_attr "stall" "none")])(define_insn "cgen_intrinsic_cpsmsbla1_h_P1"[(set (reg:SI 87)(unspec_volatile:SI [(match_operand:DI 0 "general_operand" "x")(match_operand:DI 1 "general_operand" "x")] 2338))(set (reg:SI 107)(unspec_volatile:SI [(match_dup 0)(match_dup 1)] 2340))(set (reg:SI 106)(unspec_volatile:SI [(match_dup 0)(match_dup 1)] 2342))(set (reg:SI 105)(unspec_volatile:SI [(match_dup 0)(match_dup 1)] 2344))(set (reg:SI 104)(unspec_volatile:SI [(match_dup 0)(match_dup 1)] 2346))]"CGEN_ENABLE_INSN_P (29)""cpsmsbla1.h\\t%0,%1"[(set_attr "may_trap" "no")(set_attr "latency" "0")(set_attr "length" "4")(set_attr "slot" "cop")(set_attr "slots" "p1")(set_attr "stall" "none")])(define_insn "cgen_intrinsic_cpsmsbua1_h_C3"[(set (reg:SI 87)(unspec_volatile:SI [(match_operand:DI 0 "general_operand" "x")(match_operand:DI 1 "general_operand" "x")] 2348))(set (reg:SI 111)(unspec_volatile:SI [(match_dup 0)(match_dup 1)] 2350))(set (reg:SI 110)(unspec_volatile:SI [(match_dup 0)(match_dup 1)] 2352))(set (reg:SI 109)(unspec_volatile:SI [(match_dup 0)(match_dup 1)] 2354))(set (reg:SI 108)(unspec_volatile:SI [(match_dup 0)(match_dup 1)] 2356))]"CGEN_ENABLE_INSN_P (30)""cpsmsbua1.h\\t%0,%1"[(set_attr "may_trap" "no")(set_attr "latency" "0")(set_attr "length" "4")(set_attr "slot" "cop")(set_attr "slots" "c3")(set_attr "stall" "none")])(define_insn "cgen_intrinsic_cpsmsbua1_h_P1"[(set (reg:SI 87)(unspec_volatile:SI [(match_operand:DI 0 "general_operand" "x")(match_operand:DI 1 "general_operand" "x")] 2348))(set (reg:SI 111)(unspec_volatile:SI [(match_dup 0)(match_dup 1)] 2350))(set (reg:SI 110)(unspec_volatile:SI [(match_dup 0)(match_dup 1)] 2352))(set (reg:SI 109)(unspec_volatile:SI [(match_dup 0)(match_dup 1)] 2354))(set (reg:SI 108)(unspec_volatile:SI [(match_dup 0)(match_dup 1)] 2356))]"CGEN_ENABLE_INSN_P (31)""cpsmsbua1.h\\t%0,%1"[(set_attr "may_trap" "no")(set_attr "latency" "0")(set_attr "length" "4")(set_attr "slot" "cop")(set_attr "slots" "p1")(set_attr "stall" "none")])(define_insn "cgen_intrinsic_cpsmadla1_w_C3"[(set (reg:SI 87)(unspec_volatile:SI [(match_operand:DI 0 "general_operand" "x")(match_operand:DI 1 "general_operand" "x")] 2358))(set (reg:SI 107)(unspec_volatile:SI [(match_dup 0)(match_dup 1)] 2360))(set (reg:SI 106)(unspec_volatile:SI [(match_dup 0)(match_dup 1)] 2362))(set (reg:SI 105)(unspec_volatile:SI [(match_dup 0)(match_dup 1)] 2364))(set (reg:SI 104)(unspec_volatile:SI [(match_dup 0)(match_dup 1)] 2366))]"CGEN_ENABLE_INSN_P (32)""cpsmadla1.w\\t%0,%1"[(set_attr "may_trap" "no")(set_attr "latency" "0")(set_attr "length" "4")(set_attr "slot" "cop")(set_attr "slots" "c3")(set_attr "stall" "none")])(define_insn "cgen_intrinsic_cpsmadla1_w_P1"[(set (reg:SI 87)(unspec_volatile:SI [(match_operand:DI 0 "general_operand" "x")(match_operand:DI 1 "general_operand" "x")] 2358))(set (reg:SI 107)(unspec_volatile:SI [(match_dup 0)(match_dup 1)] 2360))(set (reg:SI 106)(unspec_volatile:SI [(match_dup 0)(match_dup 1)] 2362))(set (reg:SI 105)(unspec_volatile:SI [(match_dup 0)(match_dup 1)] 2364))(set (reg:SI 104)(unspec_volatile:SI [(match_dup 0)(match_dup 1)] 2366))]"CGEN_ENABLE_INSN_P (33)""cpsmadla1.w\\t%0,%1"[(set_attr "may_trap" "no")(set_attr "latency" "0")(set_attr "length" "4")(set_attr "slot" "cop")(set_attr "slots" "p1")(set_attr "stall" "none")])(define_insn "cgen_intrinsic_cpsmadua1_w_C3"[(set (reg:SI 87)(unspec_volatile:SI [(match_operand:DI 0 "general_operand" "x")(match_operand:DI 1 "general_operand" "x")] 2368))(set (reg:SI 111)(unspec_volatile:SI [(match_dup 0)(match_dup 1)] 2370))(set (reg:SI 110)(unspec_volatile:SI [(match_dup 0)(match_dup 1)] 2372))(set (reg:SI 109)(unspec_volatile:SI [(match_dup 0)(match_dup 1)] 2374))(set (reg:SI 108)(unspec_volatile:SI [(match_dup 0)(match_dup 1)] 2376))]"CGEN_ENABLE_INSN_P (34)""cpsmadua1.w\\t%0,%1"[(set_attr "may_trap" "no")(set_attr "latency" "0")(set_attr "length" "4")(set_attr "slot" "cop")(set_attr "slots" "c3")(set_attr "stall" "none")])(define_insn "cgen_intrinsic_cpsmadua1_w_P1"[(set (reg:SI 87)(unspec_volatile:SI [(match_operand:DI 0 "general_operand" "x")(match_operand:DI 1 "general_operand" "x")] 2368))(set (reg:SI 111)(unspec_volatile:SI [(match_dup 0)(match_dup 1)] 2370))(set (reg:SI 110)(unspec_volatile:SI [(match_dup 0)(match_dup 1)] 2372))(set (reg:SI 109)(unspec_volatile:SI [(match_dup 0)(match_dup 1)] 2374))(set (reg:SI 108)(unspec_volatile:SI [(match_dup 0)(match_dup 1)] 2376))]"CGEN_ENABLE_INSN_P (35)""cpsmadua1.w\\t%0,%1"[(set_attr "may_trap" "no")(set_attr "latency" "0")(set_attr "length" "4")(set_attr "slot" "cop")(set_attr "slots" "p1")(set_attr "stall" "none")])(define_insn "cgen_intrinsic_cpsmadla1_h_C3"[(set (reg:SI 87)(unspec_volatile:SI [(match_operand:DI 0 "general_operand" "x")(match_operand:DI 1 "general_operand" "x")] 2378))(set (reg:SI 107)(unspec_volatile:SI [(match_dup 0)(match_dup 1)] 2380))(set (reg:SI 106)(unspec_volatile:SI [(match_dup 0)(match_dup 1)] 2382))(set (reg:SI 105)(unspec_volatile:SI [(match_dup 0)(match_dup 1)] 2384))(set (reg:SI 104)(unspec_volatile:SI [(match_dup 0)(match_dup 1)] 2386))]"CGEN_ENABLE_INSN_P (36)""cpsmadla1.h\\t%0,%1"[(set_attr "may_trap" "no")(set_attr "latency" "0")(set_attr "length" "4")(set_attr "slot" "cop")(set_attr "slots" "c3")(set_attr "stall" "none")])(define_insn "cgen_intrinsic_cpsmadla1_h_P1"[(set (reg:SI 87)(unspec_volatile:SI [(match_operand:DI 0 "general_operand" "x")(match_operand:DI 1 "general_operand" "x")] 2378))(set (reg:SI 107)(unspec_volatile:SI [(match_dup 0)(match_dup 1)] 2380))(set (reg:SI 106)(unspec_volatile:SI [(match_dup 0)(match_dup 1)] 2382))(set (reg:SI 105)(unspec_volatile:SI [(match_dup 0)(match_dup 1)] 2384))(set (reg:SI 104)(unspec_volatile:SI [(match_dup 0)(match_dup 1)] 2386))]"CGEN_ENABLE_INSN_P (37)""cpsmadla1.h\\t%0,%1"[(set_attr "may_trap" "no")(set_attr "latency" "0")(set_attr "length" "4")(set_attr "slot" "cop")(set_attr "slots" "p1")(set_attr "stall" "none")])(define_insn "cgen_intrinsic_cpsmadua1_h_C3"[(set (reg:SI 87)(unspec_volatile:SI [(match_operand:DI 0 "general_operand" "x")(match_operand:DI 1 "general_operand" "x")] 2388))(set (reg:SI 111)(unspec_volatile:SI [(match_dup 0)(match_dup 1)] 2390))(set (reg:SI 110)(unspec_volatile:SI [(match_dup 0)(match_dup 1)] 2392))(set (reg:SI 109)(unspec_volatile:SI [(match_dup 0)(match_dup 1)] 2394))(set (reg:SI 108)(unspec_volatile:SI [(match_dup 0)(match_dup 1)] 2396))]"CGEN_ENABLE_INSN_P (38)""cpsmadua1.h\\t%0,%1"[(set_attr "may_trap" "no")(set_attr "latency" "0")(set_attr "length" "4")(set_attr "slot" "cop")(set_attr "slots" "c3")(set_attr "stall" "none")])(define_insn "cgen_intrinsic_cpsmadua1_h_P1"[(set (reg:SI 87)(unspec_volatile:SI [(match_operand:DI 0 "general_operand" "x")(match_operand:DI 1 "general_operand" "x")] 2388))(set (reg:SI 111)(unspec_volatile:SI [(match_dup 0)(match_dup 1)] 2390))(set (reg:SI 110)(unspec_volatile:SI [(match_dup 0)(match_dup 1)] 2392))(set (reg:SI 109)(unspec_volatile:SI [(match_dup 0)(match_dup 1)] 2394))(set (reg:SI 108)(unspec_volatile:SI [(match_dup 0)(match_dup 1)] 2396))]"CGEN_ENABLE_INSN_P (39)""cpsmadua1.h\\t%0,%1"[(set_attr "may_trap" "no")(set_attr "latency" "0")(set_attr "length" "4")(set_attr "slot" "cop")(set_attr "slots" "p1")(set_attr "stall" "none")])(define_insn "cgen_intrinsic_cpmsbla1_w_C3"[(set (reg:SI 87)(unspec_volatile:SI [(match_operand:DI 0 "general_operand" "x")(match_operand:DI 1 "general_operand" "x")] 2398))(set (reg:SI 107)(unspec_volatile:SI [(match_dup 0)(match_dup 1)] 2400))(set (reg:SI 106)(unspec_volatile:SI [(match_dup 0)(match_dup 1)] 2402))(set (reg:SI 105)(unspec_volatile:SI [(match_dup 0)(match_dup 1)] 2404))(set (reg:SI 104)(unspec_volatile:SI [(match_dup 0)(match_dup 1)] 2406))]"CGEN_ENABLE_INSN_P (40)""cpmsbla1.w\\t%0,%1"[(set_attr "may_trap" "no")(set_attr "latency" "0")(set_attr "length" "4")(set_attr "slot" "cop")(set_attr "slots" "c3")(set_attr "stall" "none")])(define_insn "cgen_intrinsic_cpmsbla1_w_P1"[(set (reg:SI 87)(unspec_volatile:SI [(match_operand:DI 0 "general_operand" "x")(match_operand:DI 1 "general_operand" "x")] 2398))(set (reg:SI 107)(unspec_volatile:SI [(match_dup 0)(match_dup 1)] 2400))(set (reg:SI 106)(unspec_volatile:SI [(match_dup 0)(match_dup 1)] 2402))(set (reg:SI 105)(unspec_volatile:SI [(match_dup 0)(match_dup 1)] 2404))(set (reg:SI 104)(unspec_volatile:SI [(match_dup 0)(match_dup 1)] 2406))]"CGEN_ENABLE_INSN_P (41)""cpmsbla1.w\\t%0,%1"[(set_attr "may_trap" "no")(set_attr "latency" "0")(set_attr "length" "4")(set_attr "slot" "cop")(set_attr "slots" "p1")(set_attr "stall" "none")])(define_insn "cgen_intrinsic_cpmsbua1_w_C3"[(set (reg:SI 87)(unspec_volatile:SI [(match_operand:DI 0 "general_operand" "x")(match_operand:DI 1 "general_operand" "x")] 2408))(set (reg:SI 111)(unspec_volatile:SI [(match_dup 0)(match_dup 1)] 2410))(set (reg:SI 110)(unspec_volatile:SI [(match_dup 0)(match_dup 1)] 2412))(set (reg:SI 109)(unspec_volatile:SI [(match_dup 0)(match_dup 1)] 2414))(set (reg:SI 108)(unspec_volatile:SI [(match_dup 0)(match_dup 1)] 2416))]"CGEN_ENABLE_INSN_P (42)""cpmsbua1.w\\t%0,%1"[(set_attr "may_trap" "no")(set_attr "latency" "0")(set_attr "length" "4")(set_attr "slot" "cop")(set_attr "slots" "c3")(set_attr "stall" "none")])(define_insn "cgen_intrinsic_cpmsbua1_w_P1"[(set (reg:SI 87)(unspec_volatile:SI [(match_operand:DI 0 "general_operand" "x")(match_operand:DI 1 "general_operand" "x")] 2408))(set (reg:SI 111)(unspec_volatile:SI [(match_dup 0)(match_dup 1)] 2410))(set (reg:SI 110)(unspec_volatile:SI [(match_dup 0)(match_dup 1)] 2412))(set (reg:SI 109)(unspec_volatile:SI [(match_dup 0)(match_dup 1)] 2414))(set (reg:SI 108)(unspec_volatile:SI [(match_dup 0)(match_dup 1)] 2416))]"CGEN_ENABLE_INSN_P (43)""cpmsbua1.w\\t%0,%1"[(set_attr "may_trap" "no")(set_attr "latency" "0")(set_attr "length" "4")(set_attr "slot" "cop")(set_attr "slots" "p1")(set_attr "stall" "none")])(define_insn "cgen_intrinsic_cpmsbla1u_w_C3"[(set (reg:SI 87)(unspec_volatile:SI [(match_operand:DI 0 "general_operand" "x")(match_operand:DI 1 "general_operand" "x")] 2418))(set (reg:SI 107)(unspec_volatile:SI [(match_dup 0)(match_dup 1)] 2420))(set (reg:SI 106)(unspec_volatile:SI [(match_dup 0)(match_dup 1)] 2422))(set (reg:SI 105)(unspec_volatile:SI [(match_dup 0)(match_dup 1)] 2424))(set (reg:SI 104)(unspec_volatile:SI [(match_dup 0)(match_dup 1)] 2426))]"CGEN_ENABLE_INSN_P (44)""cpmsbla1u.w\\t%0,%1"[(set_attr "may_trap" "no")(set_attr "latency" "0")(set_attr "length" "4")(set_attr "slot" "cop")(set_attr "slots" "c3")(set_attr "stall" "none")])(define_insn "cgen_intrinsic_cpmsbla1u_w_P1"[(set (reg:SI 87)(unspec_volatile:SI [(match_operand:DI 0 "general_operand" "x")(match_operand:DI 1 "general_operand" "x")] 2418))(set (reg:SI 107)(unspec_volatile:SI [(match_dup 0)(match_dup 1)] 2420))(set (reg:SI 106)(unspec_volatile:SI [(match_dup 0)(match_dup 1)] 2422))(set (reg:SI 105)(unspec_volatile:SI [(match_dup 0)(match_dup 1)] 2424))(set (reg:SI 104)(unspec_volatile:SI [(match_dup 0)(match_dup 1)] 2426))]"CGEN_ENABLE_INSN_P (45)""cpmsbla1u.w\\t%0,%1"[(set_attr "may_trap" "no")(set_attr "latency" "0")(set_attr "length" "4")(set_attr "slot" "cop")(set_attr "slots" "p1")(set_attr "stall" "none")])(define_insn "cgen_intrinsic_cpmsbua1u_w_C3"[(set (reg:SI 87)(unspec_volatile:SI [(match_operand:DI 0 "general_operand" "x")(match_operand:DI 1 "general_operand" "x")] 2428))(set (reg:SI 111)(unspec_volatile:SI [(match_dup 0)(match_dup 1)] 2430))(set (reg:SI 110)(unspec_volatile:SI [(match_dup 0)(match_dup 1)] 2432))(set (reg:SI 109)(unspec_volatile:SI [(match_dup 0)(match_dup 1)] 2434))(set (reg:SI 108)(unspec_volatile:SI [(match_dup 0)(match_dup 1)] 2436))]"CGEN_ENABLE_INSN_P (46)""cpmsbua1u.w\\t%0,%1"[(set_attr "may_trap" "no")(set_attr "latency" "0")(set_attr "length" "4")(set_attr "slot" "cop")(set_attr "slots" "c3")(set_attr "stall" "none")])(define_insn "cgen_intrinsic_cpmsbua1u_w_P1"[(set (reg:SI 87)(unspec_volatile:SI [(match_operand:DI 0 "general_operand" "x")(match_operand:DI 1 "general_operand" "x")] 2428))(set (reg:SI 111)(unspec_volatile:SI [(match_dup 0)(match_dup 1)] 2430))(set (reg:SI 110)(unspec_volatile:SI [(match_dup 0)(match_dup 1)] 2432))(set (reg:SI 109)(unspec_volatile:SI [(match_dup 0)(match_dup 1)] 2434))(set (reg:SI 108)(unspec_volatile:SI [(match_dup 0)(match_dup 1)] 2436))]"CGEN_ENABLE_INSN_P (47)""cpmsbua1u.w\\t%0,%1"[(set_attr "may_trap" "no")(set_attr "latency" "0")(set_attr "length" "4")(set_attr "slot" "cop")(set_attr "slots" "p1")(set_attr "stall" "none")])(define_insn "cgen_intrinsic_cpmsbla1_h_C3"[(set (reg:SI 87)(unspec_volatile:SI [(match_operand:DI 0 "general_operand" "x")(match_operand:DI 1 "general_operand" "x")] 2438))(set (reg:SI 107)(unspec_volatile:SI [(match_dup 0)(match_dup 1)] 2440))(set (reg:SI 106)(unspec_volatile:SI [(match_dup 0)(match_dup 1)] 2442))(set (reg:SI 105)(unspec_volatile:SI [(match_dup 0)(match_dup 1)] 2444))(set (reg:SI 104)(unspec_volatile:SI [(match_dup 0)(match_dup 1)] 2446))]"CGEN_ENABLE_INSN_P (48)""cpmsbla1.h\\t%0,%1"[(set_attr "may_trap" "no")(set_attr "latency" "0")(set_attr "length" "4")(set_attr "slot" "cop")(set_attr "slots" "c3")(set_attr "stall" "none")])(define_insn "cgen_intrinsic_cpmsbla1_h_P1"[(set (reg:SI 87)(unspec_volatile:SI [(match_operand:DI 0 "general_operand" "x")(match_operand:DI 1 "general_operand" "x")] 2438))(set (reg:SI 107)(unspec_volatile:SI [(match_dup 0)(match_dup 1)] 2440))(set (reg:SI 106)(unspec_volatile:SI [(match_dup 0)(match_dup 1)] 2442))(set (reg:SI 105)(unspec_volatile:SI [(match_dup 0)(match_dup 1)] 2444))(set (reg:SI 104)(unspec_volatile:SI [(match_dup 0)(match_dup 1)] 2446))]"CGEN_ENABLE_INSN_P (49)""cpmsbla1.h\\t%0,%1"[(set_attr "may_trap" "no")(set_attr "latency" "0")(set_attr "length" "4")(set_attr "slot" "cop")(set_attr "slots" "p1")(set_attr "stall" "none")])(define_insn "cgen_intrinsic_cpmsbua1_h_C3"[(set (reg:SI 87)(unspec_volatile:SI [(match_operand:DI 0 "general_operand" "x")(match_operand:DI 1 "general_operand" "x")] 2448))(set (reg:SI 111)(unspec_volatile:SI [(match_dup 0)(match_dup 1)] 2450))(set (reg:SI 110)(unspec_volatile:SI [(match_dup 0)(match_dup 1)] 2452))(set (reg:SI 109)(unspec_volatile:SI [(match_dup 0)(match_dup 1)] 2454))(set (reg:SI 108)(unspec_volatile:SI [(match_dup 0)(match_dup 1)] 2456))]"CGEN_ENABLE_INSN_P (50)""cpmsbua1.h\\t%0,%1"[(set_attr "may_trap" "no")(set_attr "latency" "0")(set_attr "length" "4")(set_attr "slot" "cop")(set_attr "slots" "c3")(set_attr "stall" "none")])(define_insn "cgen_intrinsic_cpmsbua1_h_P1"[(set (reg:SI 87)(unspec_volatile:SI [(match_operand:DI 0 "general_operand" "x")(match_operand:DI 1 "general_operand" "x")] 2448))(set (reg:SI 111)(unspec_volatile:SI [(match_dup 0)(match_dup 1)] 2450))(set (reg:SI 110)(unspec_volatile:SI [(match_dup 0)(match_dup 1)] 2452))(set (reg:SI 109)(unspec_volatile:SI [(match_dup 0)(match_dup 1)] 2454))(set (reg:SI 108)(unspec_volatile:SI [(match_dup 0)(match_dup 1)] 2456))]"CGEN_ENABLE_INSN_P (51)""cpmsbua1.h\\t%0,%1"[(set_attr "may_trap" "no")(set_attr "latency" "0")(set_attr "length" "4")(set_attr "slot" "cop")(set_attr "slots" "p1")(set_attr "stall" "none")])(define_insn "cgen_intrinsic_cpmadla1_w_C3"[(set (reg:SI 87)(unspec_volatile:SI [(match_operand:DI 0 "general_operand" "x")(match_operand:DI 1 "general_operand" "x")] 2458))(set (reg:SI 107)(unspec_volatile:SI [(match_dup 0)(match_dup 1)] 2460))(set (reg:SI 106)(unspec_volatile:SI [(match_dup 0)(match_dup 1)] 2462))(set (reg:SI 105)(unspec_volatile:SI [(match_dup 0)(match_dup 1)] 2464))(set (reg:SI 104)(unspec_volatile:SI [(match_dup 0)(match_dup 1)] 2466))]"CGEN_ENABLE_INSN_P (52)""cpmadla1.w\\t%0,%1"[(set_attr "may_trap" "no")(set_attr "latency" "0")(set_attr "length" "4")(set_attr "slot" "cop")(set_attr "slots" "c3")(set_attr "stall" "none")])(define_insn "cgen_intrinsic_cpmadla1_w_P1"[(set (reg:SI 87)(unspec_volatile:SI [(match_operand:DI 0 "general_operand" "x")(match_operand:DI 1 "general_operand" "x")] 2458))(set (reg:SI 107)(unspec_volatile:SI [(match_dup 0)(match_dup 1)] 2460))(set (reg:SI 106)(unspec_volatile:SI [(match_dup 0)(match_dup 1)] 2462))(set (reg:SI 105)(unspec_volatile:SI [(match_dup 0)(match_dup 1)] 2464))(set (reg:SI 104)(unspec_volatile:SI [(match_dup 0)(match_dup 1)] 2466))]"CGEN_ENABLE_INSN_P (53)""cpmadla1.w\\t%0,%1"[(set_attr "may_trap" "no")(set_attr "latency" "0")(set_attr "length" "4")(set_attr "slot" "cop")(set_attr "slots" "p1")(set_attr "stall" "none")])(define_insn "cgen_intrinsic_cpmadua1_w_C3"[(set (reg:SI 87)(unspec_volatile:SI [(match_operand:DI 0 "general_operand" "x")(match_operand:DI 1 "general_operand" "x")] 2468))(set (reg:SI 111)(unspec_volatile:SI [(match_dup 0)(match_dup 1)] 2470))(set (reg:SI 110)(unspec_volatile:SI [(match_dup 0)(match_dup 1)] 2472))(set (reg:SI 109)(unspec_volatile:SI [(match_dup 0)(match_dup 1)] 2474))(set (reg:SI 108)(unspec_volatile:SI [(match_dup 0)(match_dup 1)] 2476))]"CGEN_ENABLE_INSN_P (54)""cpmadua1.w\\t%0,%1"[(set_attr "may_trap" "no")(set_attr "latency" "0")(set_attr "length" "4")(set_attr "slot" "cop")(set_attr "slots" "c3")(set_attr "stall" "none")])(define_insn "cgen_intrinsic_cpmadua1_w_P1"[(set (reg:SI 87)(unspec_volatile:SI [(match_operand:DI 0 "general_operand" "x")(match_operand:DI 1 "general_operand" "x")] 2468))(set (reg:SI 111)(unspec_volatile:SI [(match_dup 0)(match_dup 1)] 2470))(set (reg:SI 110)(unspec_volatile:SI [(match_dup 0)(match_dup 1)] 2472))(set (reg:SI 109)(unspec_volatile:SI [(match_dup 0)(match_dup 1)] 2474))(set (reg:SI 108)(unspec_volatile:SI [(match_dup 0)(match_dup 1)] 2476))]"CGEN_ENABLE_INSN_P (55)""cpmadua1.w\\t%0,%1"[(set_attr "may_trap" "no")(set_attr "latency" "0")(set_attr "length" "4")(set_attr "slot" "cop")(set_attr "slots" "p1")(set_attr "stall" "none")])(define_insn "cgen_intrinsic_cpmadla1u_w_C3"[(set (reg:SI 87)(unspec_volatile:SI [(match_operand:DI 0 "general_operand" "x")(match_operand:DI 1 "general_operand" "x")] 2478))(set (reg:SI 107)(unspec_volatile:SI [(match_dup 0)(match_dup 1)] 2480))(set (reg:SI 106)(unspec_volatile:SI [(match_dup 0)(match_dup 1)] 2482))(set (reg:SI 105)(unspec_volatile:SI [(match_dup 0)(match_dup 1)] 2484))(set (reg:SI 104)(unspec_volatile:SI [(match_dup 0)(match_dup 1)] 2486))]"CGEN_ENABLE_INSN_P (56)""cpmadla1u.w\\t%0,%1"[(set_attr "may_trap" "no")(set_attr "latency" "0")(set_attr "length" "4")(set_attr "slot" "cop")(set_attr "slots" "c3")(set_attr "stall" "none")])(define_insn "cgen_intrinsic_cpmadla1u_w_P1"[(set (reg:SI 87)(unspec_volatile:SI [(match_operand:DI 0 "general_operand" "x")(match_operand:DI 1 "general_operand" "x")] 2478))(set (reg:SI 107)(unspec_volatile:SI [(match_dup 0)(match_dup 1)] 2480))(set (reg:SI 106)(unspec_volatile:SI [(match_dup 0)(match_dup 1)] 2482))(set (reg:SI 105)(unspec_volatile:SI [(match_dup 0)(match_dup 1)] 2484))(set (reg:SI 104)(unspec_volatile:SI [(match_dup 0)(match_dup 1)] 2486))]"CGEN_ENABLE_INSN_P (57)""cpmadla1u.w\\t%0,%1"[(set_attr "may_trap" "no")(set_attr "latency" "0")(set_attr "length" "4")(set_attr "slot" "cop")(set_attr "slots" "p1")(set_attr "stall" "none")])(define_insn "cgen_intrinsic_cpmadua1u_w_C3"[(set (reg:SI 87)(unspec_volatile:SI [(match_operand:DI 0 "general_operand" "x")(match_operand:DI 1 "general_operand" "x")] 2488))(set (reg:SI 111)(unspec_volatile:SI [(match_dup 0)(match_dup 1)] 2490))(set (reg:SI 110)(unspec_volatile:SI [(match_dup 0)(match_dup 1)] 2492))(set (reg:SI 109)(unspec_volatile:SI [(match_dup 0)(match_dup 1)] 2494))(set (reg:SI 108)(unspec_volatile:SI [(match_dup 0)(match_dup 1)] 2496))]"CGEN_ENABLE_INSN_P (58)""cpmadua1u.w\\t%0,%1"[(set_attr "may_trap" "no")(set_attr "latency" "0")(set_attr "length" "4")(set_attr "slot" "cop")(set_attr "slots" "c3")(set_attr "stall" "none")])(define_insn "cgen_intrinsic_cpmadua1u_w_P1"[(set (reg:SI 87)(unspec_volatile:SI [(match_operand:DI 0 "general_operand" "x")(match_operand:DI 1 "general_operand" "x")] 2488))(set (reg:SI 111)(unspec_volatile:SI [(match_dup 0)(match_dup 1)] 2490))(set (reg:SI 110)(unspec_volatile:SI [(match_dup 0)(match_dup 1)] 2492))(set (reg:SI 109)(unspec_volatile:SI [(match_dup 0)(match_dup 1)] 2494))(set (reg:SI 108)(unspec_volatile:SI [(match_dup 0)(match_dup 1)] 2496))]"CGEN_ENABLE_INSN_P (59)""cpmadua1u.w\\t%0,%1"[(set_attr "may_trap" "no")(set_attr "latency" "0")(set_attr "length" "4")(set_attr "slot" "cop")(set_attr "slots" "p1")(set_attr "stall" "none")])(define_insn "cgen_intrinsic_cpmadla1_h_C3"[(set (reg:SI 87)(unspec_volatile:SI [(match_operand:DI 0 "general_operand" "x")(match_operand:DI 1 "general_operand" "x")] 2498))(set (reg:SI 107)(unspec_volatile:SI [(match_dup 0)(match_dup 1)] 2500))(set (reg:SI 106)(unspec_volatile:SI [(match_dup 0)(match_dup 1)] 2502))(set (reg:SI 105)(unspec_volatile:SI [(match_dup 0)(match_dup 1)] 2504))(set (reg:SI 104)(unspec_volatile:SI [(match_dup 0)(match_dup 1)] 2506))]"CGEN_ENABLE_INSN_P (60)""cpmadla1.h\\t%0,%1"[(set_attr "may_trap" "no")(set_attr "latency" "0")(set_attr "length" "4")(set_attr "slot" "cop")(set_attr "slots" "c3")(set_attr "stall" "none")])(define_insn "cgen_intrinsic_cpmadla1_h_P1"[(set (reg:SI 87)(unspec_volatile:SI [(match_operand:DI 0 "general_operand" "x")(match_operand:DI 1 "general_operand" "x")] 2498))(set (reg:SI 107)(unspec_volatile:SI [(match_dup 0)(match_dup 1)] 2500))(set (reg:SI 106)(unspec_volatile:SI [(match_dup 0)(match_dup 1)] 2502))(set (reg:SI 105)(unspec_volatile:SI [(match_dup 0)(match_dup 1)] 2504))(set (reg:SI 104)(unspec_volatile:SI [(match_dup 0)(match_dup 1)] 2506))]"CGEN_ENABLE_INSN_P (61)""cpmadla1.h\\t%0,%1"[(set_attr "may_trap" "no")(set_attr "latency" "0")(set_attr "length" "4")(set_attr "slot" "cop")(set_attr "slots" "p1")(set_attr "stall" "none")])(define_insn "cgen_intrinsic_cpmadua1_h_C3"[(set (reg:SI 87)(unspec_volatile:SI [(match_operand:DI 0 "general_operand" "x")(match_operand:DI 1 "general_operand" "x")] 2508))(set (reg:SI 111)(unspec_volatile:SI [(match_dup 0)(match_dup 1)] 2510))(set (reg:SI 110)(unspec_volatile:SI [(match_dup 0)(match_dup 1)] 2512))(set (reg:SI 109)(unspec_volatile:SI [(match_dup 0)(match_dup 1)] 2514))(set (reg:SI 108)(unspec_volatile:SI [(match_dup 0)(match_dup 1)] 2516))]"CGEN_ENABLE_INSN_P (62)""cpmadua1.h\\t%0,%1"[(set_attr "may_trap" "no")(set_attr "latency" "0")(set_attr "length" "4")(set_attr "slot" "cop")(set_attr "slots" "c3")(set_attr "stall" "none")])(define_insn "cgen_intrinsic_cpmadua1_h_P1"[(set (reg:SI 87)(unspec_volatile:SI [(match_operand:DI 0 "general_operand" "x")(match_operand:DI 1 "general_operand" "x")] 2508))(set (reg:SI 111)(unspec_volatile:SI [(match_dup 0)(match_dup 1)] 2510))(set (reg:SI 110)(unspec_volatile:SI [(match_dup 0)(match_dup 1)] 2512))(set (reg:SI 109)(unspec_volatile:SI [(match_dup 0)(match_dup 1)] 2514))(set (reg:SI 108)(unspec_volatile:SI [(match_dup 0)(match_dup 1)] 2516))]"CGEN_ENABLE_INSN_P (63)""cpmadua1.h\\t%0,%1"[(set_attr "may_trap" "no")(set_attr "latency" "0")(set_attr "length" "4")(set_attr "slot" "cop")(set_attr "slots" "p1")(set_attr "stall" "none")])(define_insn "cgen_intrinsic_cpmada1_b_C3"[(set (reg:SI 87)(unspec_volatile:SI [(match_operand:DI 0 "general_operand" "x")(match_operand:DI 1 "general_operand" "x")] 2518))(set (reg:SI 111)(unspec_volatile:SI [(match_dup 0)(match_dup 1)] 2520))(set (reg:SI 110)(unspec_volatile:SI [(match_dup 0)(match_dup 1)] 2522))(set (reg:SI 109)(unspec_volatile:SI [(match_dup 0)(match_dup 1)] 2524))(set (reg:SI 108)(unspec_volatile:SI [(match_dup 0)(match_dup 1)] 2526))(set (reg:SI 107)(unspec_volatile:SI [(match_dup 0)(match_dup 1)] 2528))(set (reg:SI 106)(unspec_volatile:SI [(match_dup 0)(match_dup 1)] 2530))(set (reg:SI 105)(unspec_volatile:SI [(match_dup 0)(match_dup 1)] 2532))(set (reg:SI 104)(unspec_volatile:SI [(match_dup 0)(match_dup 1)] 2534))]"CGEN_ENABLE_INSN_P (64)""cpmada1.b\\t%0,%1"[(set_attr "may_trap" "no")(set_attr "latency" "0")(set_attr "length" "4")(set_attr "slot" "cop")(set_attr "slots" "c3")(set_attr "stall" "none")])(define_insn "cgen_intrinsic_cpmada1_b_P1"[(set (reg:SI 87)(unspec_volatile:SI [(match_operand:DI 0 "general_operand" "x")(match_operand:DI 1 "general_operand" "x")] 2518))(set (reg:SI 111)(unspec_volatile:SI [(match_dup 0)(match_dup 1)] 2520))(set (reg:SI 110)(unspec_volatile:SI [(match_dup 0)(match_dup 1)] 2522))(set (reg:SI 109)(unspec_volatile:SI [(match_dup 0)(match_dup 1)] 2524))(set (reg:SI 108)(unspec_volatile:SI [(match_dup 0)(match_dup 1)] 2526))(set (reg:SI 107)(unspec_volatile:SI [(match_dup 0)(match_dup 1)] 2528))(set (reg:SI 106)(unspec_volatile:SI [(match_dup 0)(match_dup 1)] 2530))(set (reg:SI 105)(unspec_volatile:SI [(match_dup 0)(match_dup 1)] 2532))(set (reg:SI 104)(unspec_volatile:SI [(match_dup 0)(match_dup 1)] 2534))]"CGEN_ENABLE_INSN_P (65)""cpmada1.b\\t%0,%1"[(set_attr "may_trap" "no")(set_attr "latency" "0")(set_attr "length" "4")(set_attr "slot" "cop")(set_attr "slots" "p1")(set_attr "stall" "none")])(define_insn "cgen_intrinsic_cpmada1u_b_C3"[(set (reg:SI 87)(unspec_volatile:SI [(match_operand:DI 0 "general_operand" "x")(match_operand:DI 1 "general_operand" "x")] 2536))(set (reg:SI 111)(unspec_volatile:SI [(match_dup 0)(match_dup 1)] 2538))(set (reg:SI 110)(unspec_volatile:SI [(match_dup 0)(match_dup 1)] 2540))(set (reg:SI 109)(unspec_volatile:SI [(match_dup 0)(match_dup 1)] 2542))(set (reg:SI 108)(unspec_volatile:SI [(match_dup 0)(match_dup 1)] 2544))(set (reg:SI 107)(unspec_volatile:SI [(match_dup 0)(match_dup 1)] 2546))(set (reg:SI 106)(unspec_volatile:SI [(match_dup 0)(match_dup 1)] 2548))(set (reg:SI 105)(unspec_volatile:SI [(match_dup 0)(match_dup 1)] 2550))(set (reg:SI 104)(unspec_volatile:SI [(match_dup 0)(match_dup 1)] 2552))]"CGEN_ENABLE_INSN_P (66)""cpmada1u.b\\t%0,%1"[(set_attr "may_trap" "no")(set_attr "latency" "0")(set_attr "length" "4")(set_attr "slot" "cop")(set_attr "slots" "c3")(set_attr "stall" "none")])(define_insn "cgen_intrinsic_cpmada1u_b_P1"[(set (reg:SI 87)(unspec_volatile:SI [(match_operand:DI 0 "general_operand" "x")(match_operand:DI 1 "general_operand" "x")] 2536))(set (reg:SI 111)(unspec_volatile:SI [(match_dup 0)(match_dup 1)] 2538))(set (reg:SI 110)(unspec_volatile:SI [(match_dup 0)(match_dup 1)] 2540))(set (reg:SI 109)(unspec_volatile:SI [(match_dup 0)(match_dup 1)] 2542))(set (reg:SI 108)(unspec_volatile:SI [(match_dup 0)(match_dup 1)] 2544))(set (reg:SI 107)(unspec_volatile:SI [(match_dup 0)(match_dup 1)] 2546))(set (reg:SI 106)(unspec_volatile:SI [(match_dup 0)(match_dup 1)] 2548))(set (reg:SI 105)(unspec_volatile:SI [(match_dup 0)(match_dup 1)] 2550))(set (reg:SI 104)(unspec_volatile:SI [(match_dup 0)(match_dup 1)] 2552))]"CGEN_ENABLE_INSN_P (67)""cpmada1u.b\\t%0,%1"[(set_attr "may_trap" "no")(set_attr "latency" "0")(set_attr "length" "4")(set_attr "slot" "cop")(set_attr "slots" "p1")(set_attr "stall" "none")])(define_insn "cgen_intrinsic_cpmulla1_w_C3"[(set (reg:SI 107)(unspec_volatile:SI [(match_operand:DI 0 "general_operand" "x")(match_operand:DI 1 "general_operand" "x")] 2554))(set (reg:SI 106)(unspec_volatile:SI [(match_dup 0)(match_dup 1)] 2556))(set (reg:SI 105)(unspec_volatile:SI [(match_dup 0)(match_dup 1)] 2558))(set (reg:SI 104)(unspec_volatile:SI [(match_dup 0)(match_dup 1)] 2560))]"CGEN_ENABLE_INSN_P (68)""cpmulla1.w\\t%0,%1"[(set_attr "may_trap" "no")(set_attr "latency" "0")(set_attr "length" "4")(set_attr "slot" "cop")(set_attr "slots" "c3")(set_attr "stall" "none")])(define_insn "cgen_intrinsic_cpmulla1_w_P1"[(set (reg:SI 107)(unspec_volatile:SI [(match_operand:DI 0 "general_operand" "x")(match_operand:DI 1 "general_operand" "x")] 2554))(set (reg:SI 106)(unspec_volatile:SI [(match_dup 0)(match_dup 1)] 2556))(set (reg:SI 105)(unspec_volatile:SI [(match_dup 0)(match_dup 1)] 2558))(set (reg:SI 104)(unspec_volatile:SI [(match_dup 0)(match_dup 1)] 2560))]"CGEN_ENABLE_INSN_P (69)""cpmulla1.w\\t%0,%1"[(set_attr "may_trap" "no")(set_attr "latency" "0")(set_attr "length" "4")(set_attr "slot" "cop")(set_attr "slots" "p1")(set_attr "stall" "none")])(define_insn "cgen_intrinsic_cpmulua1_w_C3"[(set (reg:SI 111)(unspec_volatile:SI [(match_operand:DI 0 "general_operand" "x")(match_operand:DI 1 "general_operand" "x")] 2562))(set (reg:SI 110)(unspec_volatile:SI [(match_dup 0)(match_dup 1)] 2564))(set (reg:SI 109)(unspec_volatile:SI [(match_dup 0)(match_dup 1)] 2566))(set (reg:SI 108)(unspec_volatile:SI [(match_dup 0)(match_dup 1)] 2568))]"CGEN_ENABLE_INSN_P (70)""cpmulua1.w\\t%0,%1"[(set_attr "may_trap" "no")(set_attr "latency" "0")(set_attr "length" "4")(set_attr "slot" "cop")(set_attr "slots" "c3")(set_attr "stall" "none")])(define_insn "cgen_intrinsic_cpmulua1_w_P1"[(set (reg:SI 111)(unspec_volatile:SI [(match_operand:DI 0 "general_operand" "x")(match_operand:DI 1 "general_operand" "x")] 2562))(set (reg:SI 110)(unspec_volatile:SI [(match_dup 0)(match_dup 1)] 2564))(set (reg:SI 109)(unspec_volatile:SI [(match_dup 0)(match_dup 1)] 2566))(set (reg:SI 108)(unspec_volatile:SI [(match_dup 0)(match_dup 1)] 2568))]"CGEN_ENABLE_INSN_P (71)""cpmulua1.w\\t%0,%1"[(set_attr "may_trap" "no")(set_attr "latency" "0")(set_attr "length" "4")(set_attr "slot" "cop")(set_attr "slots" "p1")(set_attr "stall" "none")])(define_insn "cgen_intrinsic_cpmulla1u_w_C3"[(set (reg:SI 107)(unspec_volatile:SI [(match_operand:DI 0 "general_operand" "x")(match_operand:DI 1 "general_operand" "x")] 2570))(set (reg:SI 106)(unspec_volatile:SI [(match_dup 0)(match_dup 1)] 2572))(set (reg:SI 105)(unspec_volatile:SI [(match_dup 0)(match_dup 1)] 2574))(set (reg:SI 104)(unspec_volatile:SI [(match_dup 0)(match_dup 1)] 2576))]"CGEN_ENABLE_INSN_P (72)""cpmulla1u.w\\t%0,%1"[(set_attr "may_trap" "no")(set_attr "latency" "0")(set_attr "length" "4")(set_attr "slot" "cop")(set_attr "slots" "c3")(set_attr "stall" "none")])(define_insn "cgen_intrinsic_cpmulla1u_w_P1"[(set (reg:SI 107)(unspec_volatile:SI [(match_operand:DI 0 "general_operand" "x")(match_operand:DI 1 "general_operand" "x")] 2570))(set (reg:SI 106)(unspec_volatile:SI [(match_dup 0)(match_dup 1)] 2572))(set (reg:SI 105)(unspec_volatile:SI [(match_dup 0)(match_dup 1)] 2574))(set (reg:SI 104)(unspec_volatile:SI [(match_dup 0)(match_dup 1)] 2576))]"CGEN_ENABLE_INSN_P (73)""cpmulla1u.w\\t%0,%1"[(set_attr "may_trap" "no")(set_attr "latency" "0")(set_attr "length" "4")(set_attr "slot" "cop")(set_attr "slots" "p1")(set_attr "stall" "none")])(define_insn "cgen_intrinsic_cpmulua1u_w_C3"[(set (reg:SI 111)(unspec_volatile:SI [(match_operand:DI 0 "general_operand" "x")(match_operand:DI 1 "general_operand" "x")] 2578))(set (reg:SI 110)(unspec_volatile:SI [(match_dup 0)(match_dup 1)] 2580))(set (reg:SI 109)(unspec_volatile:SI [(match_dup 0)(match_dup 1)] 2582))(set (reg:SI 108)(unspec_volatile:SI [(match_dup 0)(match_dup 1)] 2584))]"CGEN_ENABLE_INSN_P (74)""cpmulua1u.w\\t%0,%1"[(set_attr "may_trap" "no")(set_attr "latency" "0")(set_attr "length" "4")(set_attr "slot" "cop")(set_attr "slots" "c3")(set_attr "stall" "none")])(define_insn "cgen_intrinsic_cpmulua1u_w_P1"[(set (reg:SI 111)(unspec_volatile:SI [(match_operand:DI 0 "general_operand" "x")(match_operand:DI 1 "general_operand" "x")] 2578))(set (reg:SI 110)(unspec_volatile:SI [(match_dup 0)(match_dup 1)] 2580))(set (reg:SI 109)(unspec_volatile:SI [(match_dup 0)(match_dup 1)] 2582))(set (reg:SI 108)(unspec_volatile:SI [(match_dup 0)(match_dup 1)] 2584))]"CGEN_ENABLE_INSN_P (75)""cpmulua1u.w\\t%0,%1"[(set_attr "may_trap" "no")(set_attr "latency" "0")(set_attr "length" "4")(set_attr "slot" "cop")(set_attr "slots" "p1")(set_attr "stall" "none")])(define_insn "cgen_intrinsic_cpmulla1_h_C3"[(set (reg:SI 107)(unspec_volatile:SI [(match_operand:DI 0 "general_operand" "x")(match_operand:DI 1 "general_operand" "x")] 2586))(set (reg:SI 106)(unspec_volatile:SI [(match_dup 0)(match_dup 1)] 2588))(set (reg:SI 105)(unspec_volatile:SI [(match_dup 0)(match_dup 1)] 2590))(set (reg:SI 104)(unspec_volatile:SI [(match_dup 0)(match_dup 1)] 2592))]"CGEN_ENABLE_INSN_P (76)""cpmulla1.h\\t%0,%1"[(set_attr "may_trap" "no")(set_attr "latency" "0")(set_attr "length" "4")(set_attr "slot" "cop")(set_attr "slots" "c3")(set_attr "stall" "none")])(define_insn "cgen_intrinsic_cpmulla1_h_P1"[(set (reg:SI 107)(unspec_volatile:SI [(match_operand:DI 0 "general_operand" "x")(match_operand:DI 1 "general_operand" "x")] 2586))(set (reg:SI 106)(unspec_volatile:SI [(match_dup 0)(match_dup 1)] 2588))(set (reg:SI 105)(unspec_volatile:SI [(match_dup 0)(match_dup 1)] 2590))(set (reg:SI 104)(unspec_volatile:SI [(match_dup 0)(match_dup 1)] 2592))]"CGEN_ENABLE_INSN_P (77)""cpmulla1.h\\t%0,%1"[(set_attr "may_trap" "no")(set_attr "latency" "0")(set_attr "length" "4")(set_attr "slot" "cop")(set_attr "slots" "p1")(set_attr "stall" "none")])(define_insn "cgen_intrinsic_cpmulua1_h_C3"[(set (reg:SI 111)(unspec_volatile:SI [(match_operand:DI 0 "general_operand" "x")(match_operand:DI 1 "general_operand" "x")] 2594))(set (reg:SI 110)(unspec_volatile:SI [(match_dup 0)(match_dup 1)] 2596))(set (reg:SI 109)(unspec_volatile:SI [(match_dup 0)(match_dup 1)] 2598))(set (reg:SI 108)(unspec_volatile:SI [(match_dup 0)(match_dup 1)] 2600))]"CGEN_ENABLE_INSN_P (78)""cpmulua1.h\\t%0,%1"[(set_attr "may_trap" "no")(set_attr "latency" "0")(set_attr "length" "4")(set_attr "slot" "cop")(set_attr "slots" "c3")(set_attr "stall" "none")])(define_insn "cgen_intrinsic_cpmulua1_h_P1"[(set (reg:SI 111)(unspec_volatile:SI [(match_operand:DI 0 "general_operand" "x")(match_operand:DI 1 "general_operand" "x")] 2594))(set (reg:SI 110)(unspec_volatile:SI [(match_dup 0)(match_dup 1)] 2596))(set (reg:SI 109)(unspec_volatile:SI [(match_dup 0)(match_dup 1)] 2598))(set (reg:SI 108)(unspec_volatile:SI [(match_dup 0)(match_dup 1)] 2600))]"CGEN_ENABLE_INSN_P (79)""cpmulua1.h\\t%0,%1"[(set_attr "may_trap" "no")(set_attr "latency" "0")(set_attr "length" "4")(set_attr "slot" "cop")(set_attr "slots" "p1")(set_attr "stall" "none")])(define_insn "cgen_intrinsic_cpmula1_b_C3"[(set (reg:SI 111)(unspec_volatile:SI [(match_operand:DI 0 "general_operand" "x")(match_operand:DI 1 "general_operand" "x")] 2602))(set (reg:SI 110)(unspec_volatile:SI [(match_dup 0)(match_dup 1)] 2604))(set (reg:SI 109)(unspec_volatile:SI [(match_dup 0)(match_dup 1)] 2606))(set (reg:SI 108)(unspec_volatile:SI [(match_dup 0)(match_dup 1)] 2608))(set (reg:SI 107)(unspec_volatile:SI [(match_dup 0)(match_dup 1)] 2610))(set (reg:SI 106)(unspec_volatile:SI [(match_dup 0)(match_dup 1)] 2612))(set (reg:SI 105)(unspec_volatile:SI [(match_dup 0)(match_dup 1)] 2614))(set (reg:SI 104)(unspec_volatile:SI [(match_dup 0)(match_dup 1)] 2616))]"CGEN_ENABLE_INSN_P (80)""cpmula1.b\\t%0,%1"[(set_attr "may_trap" "no")(set_attr "latency" "0")(set_attr "length" "4")(set_attr "slot" "cop")(set_attr "slots" "c3")(set_attr "stall" "none")])(define_insn "cgen_intrinsic_cpmula1_b_P1"[(set (reg:SI 111)(unspec_volatile:SI [(match_operand:DI 0 "general_operand" "x")(match_operand:DI 1 "general_operand" "x")] 2602))(set (reg:SI 110)(unspec_volatile:SI [(match_dup 0)(match_dup 1)] 2604))(set (reg:SI 109)(unspec_volatile:SI [(match_dup 0)(match_dup 1)] 2606))(set (reg:SI 108)(unspec_volatile:SI [(match_dup 0)(match_dup 1)] 2608))(set (reg:SI 107)(unspec_volatile:SI [(match_dup 0)(match_dup 1)] 2610))(set (reg:SI 106)(unspec_volatile:SI [(match_dup 0)(match_dup 1)] 2612))(set (reg:SI 105)(unspec_volatile:SI [(match_dup 0)(match_dup 1)] 2614))(set (reg:SI 104)(unspec_volatile:SI [(match_dup 0)(match_dup 1)] 2616))]"CGEN_ENABLE_INSN_P (81)""cpmula1.b\\t%0,%1"[(set_attr "may_trap" "no")(set_attr "latency" "0")(set_attr "length" "4")(set_attr "slot" "cop")(set_attr "slots" "p1")(set_attr "stall" "none")])(define_insn "cgen_intrinsic_cpmula1u_b_C3"[(set (reg:SI 111)(unspec_volatile:SI [(match_operand:DI 0 "general_operand" "x")(match_operand:DI 1 "general_operand" "x")] 2618))(set (reg:SI 110)(unspec_volatile:SI [(match_dup 0)(match_dup 1)] 2620))(set (reg:SI 109)(unspec_volatile:SI [(match_dup 0)(match_dup 1)] 2622))(set (reg:SI 108)(unspec_volatile:SI [(match_dup 0)(match_dup 1)] 2624))(set (reg:SI 107)(unspec_volatile:SI [(match_dup 0)(match_dup 1)] 2626))(set (reg:SI 106)(unspec_volatile:SI [(match_dup 0)(match_dup 1)] 2628))(set (reg:SI 105)(unspec_volatile:SI [(match_dup 0)(match_dup 1)] 2630))(set (reg:SI 104)(unspec_volatile:SI [(match_dup 0)(match_dup 1)] 2632))]"CGEN_ENABLE_INSN_P (82)""cpmula1u.b\\t%0,%1"[(set_attr "may_trap" "no")(set_attr "latency" "0")(set_attr "length" "4")(set_attr "slot" "cop")(set_attr "slots" "c3")(set_attr "stall" "none")])(define_insn "cgen_intrinsic_cpmula1u_b_P1"[(set (reg:SI 111)(unspec_volatile:SI [(match_operand:DI 0 "general_operand" "x")(match_operand:DI 1 "general_operand" "x")] 2618))(set (reg:SI 110)(unspec_volatile:SI [(match_dup 0)(match_dup 1)] 2620))(set (reg:SI 109)(unspec_volatile:SI [(match_dup 0)(match_dup 1)] 2622))(set (reg:SI 108)(unspec_volatile:SI [(match_dup 0)(match_dup 1)] 2624))(set (reg:SI 107)(unspec_volatile:SI [(match_dup 0)(match_dup 1)] 2626))(set (reg:SI 106)(unspec_volatile:SI [(match_dup 0)(match_dup 1)] 2628))(set (reg:SI 105)(unspec_volatile:SI [(match_dup 0)(match_dup 1)] 2630))(set (reg:SI 104)(unspec_volatile:SI [(match_dup 0)(match_dup 1)] 2632))]"CGEN_ENABLE_INSN_P (83)""cpmula1u.b\\t%0,%1"[(set_attr "may_trap" "no")(set_attr "latency" "0")(set_attr "length" "4")(set_attr "slot" "cop")(set_attr "slots" "p1")(set_attr "stall" "none")])(define_insn "cgen_intrinsic_cpssda1_b_C3"[(set (reg:SI 87)(unspec_volatile:SI [(match_operand:DI 0 "general_operand" "x")(match_operand:DI 1 "general_operand" "x")] 2634))(set (reg:SI 111)(unspec_volatile:SI [(match_dup 0)(match_dup 1)] 2636))(set (reg:SI 110)(unspec_volatile:SI [(match_dup 0)(match_dup 1)] 2638))(set (reg:SI 109)(unspec_volatile:SI [(match_dup 0)(match_dup 1)] 2640))(set (reg:SI 108)(unspec_volatile:SI [(match_dup 0)(match_dup 1)] 2642))(set (reg:SI 107)(unspec_volatile:SI [(match_dup 0)(match_dup 1)] 2644))(set (reg:SI 106)(unspec_volatile:SI [(match_dup 0)(match_dup 1)] 2646))(set (reg:SI 105)(unspec_volatile:SI [(match_dup 0)(match_dup 1)] 2648))(set (reg:SI 104)(unspec_volatile:SI [(match_dup 0)(match_dup 1)] 2650))]"CGEN_ENABLE_INSN_P (84)""cpssda1.b\\t%0,%1"[(set_attr "may_trap" "no")(set_attr "latency" "0")(set_attr "length" "4")(set_attr "slot" "cop")(set_attr "slots" "c3")(set_attr "stall" "none")])(define_insn "cgen_intrinsic_cpssda1_b_P1"[(set (reg:SI 111)(unspec_volatile:SI [(match_operand:DI 0 "general_operand" "x")(match_operand:DI 1 "general_operand" "x")] 2634))(set (reg:SI 110)(unspec_volatile:SI [(match_dup 0)(match_dup 1)] 2636))(set (reg:SI 109)(unspec_volatile:SI [(match_dup 0)(match_dup 1)] 2638))(set (reg:SI 108)(unspec_volatile:SI [(match_dup 0)(match_dup 1)] 2640))(set (reg:SI 107)(unspec_volatile:SI [(match_dup 0)(match_dup 1)] 2642))(set (reg:SI 106)(unspec_volatile:SI [(match_dup 0)(match_dup 1)] 2644))(set (reg:SI 105)(unspec_volatile:SI [(match_dup 0)(match_dup 1)] 2646))(set (reg:SI 104)(unspec_volatile:SI [(match_dup 0)(match_dup 1)] 2648))]"CGEN_ENABLE_INSN_P (85)""cpssda1.b\\t%0,%1"[(set_attr "may_trap" "no")(set_attr "latency" "0")(set_attr "length" "4")(set_attr "slot" "cop")(set_attr "slots" "p1")(set_attr "stall" "none")])(define_insn "cgen_intrinsic_cpssda1u_b_C3"[(set (reg:SI 87)(unspec_volatile:SI [(match_operand:DI 0 "general_operand" "x")(match_operand:DI 1 "general_operand" "x")] 2650))(set (reg:SI 111)(unspec_volatile:SI [(match_dup 0)(match_dup 1)] 2652))(set (reg:SI 110)(unspec_volatile:SI [(match_dup 0)(match_dup 1)] 2654))(set (reg:SI 109)(unspec_volatile:SI [(match_dup 0)(match_dup 1)] 2656))(set (reg:SI 108)(unspec_volatile:SI [(match_dup 0)(match_dup 1)] 2658))(set (reg:SI 107)(unspec_volatile:SI [(match_dup 0)(match_dup 1)] 2660))(set (reg:SI 106)(unspec_volatile:SI [(match_dup 0)(match_dup 1)] 2662))(set (reg:SI 105)(unspec_volatile:SI [(match_dup 0)(match_dup 1)] 2664))(set (reg:SI 104)(unspec_volatile:SI [(match_dup 0)(match_dup 1)] 2666))]"CGEN_ENABLE_INSN_P (86)""cpssda1u.b\\t%0,%1"[(set_attr "may_trap" "no")(set_attr "latency" "0")(set_attr "length" "4")(set_attr "slot" "cop")(set_attr "slots" "c3")(set_attr "stall" "none")])(define_insn "cgen_intrinsic_cpssda1u_b_P1"[(set (reg:SI 111)(unspec_volatile:SI [(match_operand:DI 0 "general_operand" "x")(match_operand:DI 1 "general_operand" "x")] 2650))(set (reg:SI 110)(unspec_volatile:SI [(match_dup 0)(match_dup 1)] 2652))(set (reg:SI 109)(unspec_volatile:SI [(match_dup 0)(match_dup 1)] 2654))(set (reg:SI 108)(unspec_volatile:SI [(match_dup 0)(match_dup 1)] 2656))(set (reg:SI 107)(unspec_volatile:SI [(match_dup 0)(match_dup 1)] 2658))(set (reg:SI 106)(unspec_volatile:SI [(match_dup 0)(match_dup 1)] 2660))(set (reg:SI 105)(unspec_volatile:SI [(match_dup 0)(match_dup 1)] 2662))(set (reg:SI 104)(unspec_volatile:SI [(match_dup 0)(match_dup 1)] 2664))]"CGEN_ENABLE_INSN_P (87)""cpssda1u.b\\t%0,%1"[(set_attr "may_trap" "no")(set_attr "latency" "0")(set_attr "length" "4")(set_attr "slot" "cop")(set_attr "slots" "p1")(set_attr "stall" "none")])(define_insn "cgen_intrinsic_cpssqa1_b_C3"[(set (reg:SI 111)(unspec_volatile:SI [(match_operand:DI 0 "general_operand" "x")(match_operand:DI 1 "general_operand" "x")] 2666))(set (reg:SI 110)(unspec_volatile:SI [(match_dup 0)(match_dup 1)] 2668))(set (reg:SI 109)(unspec_volatile:SI [(match_dup 0)(match_dup 1)] 2670))(set (reg:SI 108)(unspec_volatile:SI [(match_dup 0)(match_dup 1)] 2672))(set (reg:SI 107)(unspec_volatile:SI [(match_dup 0)(match_dup 1)] 2674))(set (reg:SI 106)(unspec_volatile:SI [(match_dup 0)(match_dup 1)] 2676))(set (reg:SI 105)(unspec_volatile:SI [(match_dup 0)(match_dup 1)] 2678))(set (reg:SI 104)(unspec_volatile:SI [(match_dup 0)(match_dup 1)] 2680))]"CGEN_ENABLE_INSN_P (88)""cpssqa1.b\\t%0,%1"[(set_attr "may_trap" "no")(set_attr "latency" "0")(set_attr "length" "4")(set_attr "slot" "cop")(set_attr "slots" "c3")(set_attr "stall" "none")])(define_insn "cgen_intrinsic_cpssqa1_b_P1"[(set (reg:SI 111)(unspec_volatile:SI [(match_operand:DI 0 "general_operand" "x")(match_operand:DI 1 "general_operand" "x")] 2666))(set (reg:SI 110)(unspec_volatile:SI [(match_dup 0)(match_dup 1)] 2668))(set (reg:SI 109)(unspec_volatile:SI [(match_dup 0)(match_dup 1)] 2670))(set (reg:SI 108)(unspec_volatile:SI [(match_dup 0)(match_dup 1)] 2672))(set (reg:SI 107)(unspec_volatile:SI [(match_dup 0)(match_dup 1)] 2674))(set (reg:SI 106)(unspec_volatile:SI [(match_dup 0)(match_dup 1)] 2676))(set (reg:SI 105)(unspec_volatile:SI [(match_dup 0)(match_dup 1)] 2678))(set (reg:SI 104)(unspec_volatile:SI [(match_dup 0)(match_dup 1)] 2680))]"CGEN_ENABLE_INSN_P (89)""cpssqa1.b\\t%0,%1"[(set_attr "may_trap" "no")(set_attr "latency" "0")(set_attr "length" "4")(set_attr "slot" "cop")(set_attr "slots" "p1")(set_attr "stall" "none")])(define_insn "cgen_intrinsic_cpssqa1u_b_C3"[(set (reg:SI 111)(unspec_volatile:SI [(match_operand:DI 0 "general_operand" "x")(match_operand:DI 1 "general_operand" "x")] 2682))(set (reg:SI 110)(unspec_volatile:SI [(match_dup 0)(match_dup 1)] 2684))(set (reg:SI 109)(unspec_volatile:SI [(match_dup 0)(match_dup 1)] 2686))(set (reg:SI 108)(unspec_volatile:SI [(match_dup 0)(match_dup 1)] 2688))(set (reg:SI 107)(unspec_volatile:SI [(match_dup 0)(match_dup 1)] 2690))(set (reg:SI 106)(unspec_volatile:SI [(match_dup 0)(match_dup 1)] 2692))(set (reg:SI 105)(unspec_volatile:SI [(match_dup 0)(match_dup 1)] 2694))(set (reg:SI 104)(unspec_volatile:SI [(match_dup 0)(match_dup 1)] 2696))]"CGEN_ENABLE_INSN_P (90)""cpssqa1u.b\\t%0,%1"[(set_attr "may_trap" "no")(set_attr "latency" "0")(set_attr "length" "4")(set_attr "slot" "cop")(set_attr "slots" "c3")(set_attr "stall" "none")])(define_insn "cgen_intrinsic_cpssqa1u_b_P1"[(set (reg:SI 111)(unspec_volatile:SI [(match_operand:DI 0 "general_operand" "x")(match_operand:DI 1 "general_operand" "x")] 2682))(set (reg:SI 110)(unspec_volatile:SI [(match_dup 0)(match_dup 1)] 2684))(set (reg:SI 109)(unspec_volatile:SI [(match_dup 0)(match_dup 1)] 2686))(set (reg:SI 108)(unspec_volatile:SI [(match_dup 0)(match_dup 1)] 2688))(set (reg:SI 107)(unspec_volatile:SI [(match_dup 0)(match_dup 1)] 2690))(set (reg:SI 106)(unspec_volatile:SI [(match_dup 0)(match_dup 1)] 2692))(set (reg:SI 105)(unspec_volatile:SI [(match_dup 0)(match_dup 1)] 2694))(set (reg:SI 104)(unspec_volatile:SI [(match_dup 0)(match_dup 1)] 2696))]"CGEN_ENABLE_INSN_P (91)""cpssqa1u.b\\t%0,%1"[(set_attr "may_trap" "no")(set_attr "latency" "0")(set_attr "length" "4")(set_attr "slot" "cop")(set_attr "slots" "p1")(set_attr "stall" "none")])(define_insn "cgen_intrinsic_cpfmadila1_h_P1"[(set (reg:SI 87)(unspec_volatile:SI [(match_operand:DI 0 "general_operand" "x")(match_operand:DI 1 "general_operand" "x")(match_operand:SI 2 "cgen_h_uint_3a1_immediate" "")(match_operand:SI 3 "cgen_h_sint_8a1_immediate" "")] 1000))(set (reg:SI 107)(unspec_volatile:SI [(match_dup 0)(match_dup 1)(match_dup 2)(match_dup 3)] 1002))(set (reg:SI 106)(unspec_volatile:SI [(match_dup 0)(match_dup 1)(match_dup 2)(match_dup 3)] 1004))(set (reg:SI 105)(unspec_volatile:SI [(match_dup 0)(match_dup 1)(match_dup 2)(match_dup 3)] 1006))(set (reg:SI 104)(unspec_volatile:SI [(match_dup 0)(match_dup 1)(match_dup 2)(match_dup 3)] 1008))]"CGEN_ENABLE_INSN_P (92)""cpfmadila1.h\\t%0,%1,%2,%3"[(set_attr "may_trap" "no")(set_attr "latency" "0")(set_attr "length" "4")(set_attr "slot" "cop")(set_attr "slots" "p1")(set_attr "stall" "none")])(define_insn "cgen_intrinsic_cpfmadiua1_h_P1"[(set (reg:SI 87)(unspec_volatile:SI [(match_operand:DI 0 "general_operand" "x")(match_operand:DI 1 "general_operand" "x")(match_operand:SI 2 "cgen_h_uint_3a1_immediate" "")(match_operand:SI 3 "cgen_h_sint_8a1_immediate" "")] 1010))(set (reg:SI 111)(unspec_volatile:SI [(match_dup 0)(match_dup 1)(match_dup 2)(match_dup 3)] 1012))(set (reg:SI 110)(unspec_volatile:SI [(match_dup 0)(match_dup 1)(match_dup 2)(match_dup 3)] 1014))(set (reg:SI 109)(unspec_volatile:SI [(match_dup 0)(match_dup 1)(match_dup 2)(match_dup 3)] 1016))(set (reg:SI 108)(unspec_volatile:SI [(match_dup 0)(match_dup 1)(match_dup 2)(match_dup 3)] 1018))]"CGEN_ENABLE_INSN_P (93)""cpfmadiua1.h\\t%0,%1,%2,%3"[(set_attr "may_trap" "no")(set_attr "latency" "0")(set_attr "length" "4")(set_attr "slot" "cop")(set_attr "slots" "p1")(set_attr "stall" "none")])(define_insn "cgen_intrinsic_cpfmadia1_b_P1"[(set (reg:SI 87)(unspec_volatile:SI [(match_operand:DI 0 "general_operand" "x")(match_operand:DI 1 "general_operand" "x")(match_operand:SI 2 "cgen_h_uint_3a1_immediate" "")(match_operand:SI 3 "cgen_h_sint_8a1_immediate" "")] 1020))(set (reg:SI 111)(unspec_volatile:SI [(match_dup 0)(match_dup 1)(match_dup 2)(match_dup 3)] 1022))(set (reg:SI 110)(unspec_volatile:SI [(match_dup 0)(match_dup 1)(match_dup 2)(match_dup 3)] 1024))(set (reg:SI 109)(unspec_volatile:SI [(match_dup 0)(match_dup 1)(match_dup 2)(match_dup 3)] 1026))(set (reg:SI 108)(unspec_volatile:SI [(match_dup 0)(match_dup 1)(match_dup 2)(match_dup 3)] 1028))(set (reg:SI 107)(unspec_volatile:SI [(match_dup 0)(match_dup 1)(match_dup 2)(match_dup 3)] 1030))(set (reg:SI 106)(unspec_volatile:SI [(match_dup 0)(match_dup 1)(match_dup 2)(match_dup 3)] 1032))(set (reg:SI 105)(unspec_volatile:SI [(match_dup 0)(match_dup 1)(match_dup 2)(match_dup 3)] 1034))(set (reg:SI 104)(unspec_volatile:SI [(match_dup 0)(match_dup 1)(match_dup 2)(match_dup 3)] 1036))]"CGEN_ENABLE_INSN_P (94)""cpfmadia1.b\\t%0,%1,%2,%3"[(set_attr "may_trap" "no")(set_attr "latency" "0")(set_attr "length" "4")(set_attr "slot" "cop")(set_attr "slots" "p1")(set_attr "stall" "none")])(define_insn "cgen_intrinsic_cpfmadia1u_b_P1"[(set (reg:SI 87)(unspec_volatile:SI [(match_operand:DI 0 "general_operand" "x")(match_operand:DI 1 "general_operand" "x")(match_operand:SI 2 "cgen_h_uint_3a1_immediate" "")(match_operand:SI 3 "cgen_h_sint_8a1_immediate" "")] 1038))(set (reg:SI 111)(unspec_volatile:SI [(match_dup 0)(match_dup 1)(match_dup 2)(match_dup 3)] 1040))(set (reg:SI 110)(unspec_volatile:SI [(match_dup 0)(match_dup 1)(match_dup 2)(match_dup 3)] 1042))(set (reg:SI 109)(unspec_volatile:SI [(match_dup 0)(match_dup 1)(match_dup 2)(match_dup 3)] 1044))(set (reg:SI 108)(unspec_volatile:SI [(match_dup 0)(match_dup 1)(match_dup 2)(match_dup 3)] 1046))(set (reg:SI 107)(unspec_volatile:SI [(match_dup 0)(match_dup 1)(match_dup 2)(match_dup 3)] 1048))(set (reg:SI 106)(unspec_volatile:SI [(match_dup 0)(match_dup 1)(match_dup 2)(match_dup 3)] 1050))(set (reg:SI 105)(unspec_volatile:SI [(match_dup 0)(match_dup 1)(match_dup 2)(match_dup 3)] 1052))(set (reg:SI 104)(unspec_volatile:SI [(match_dup 0)(match_dup 1)(match_dup 2)(match_dup 3)] 1054))]"CGEN_ENABLE_INSN_P (95)""cpfmadia1u.b\\t%0,%1,%2,%3"[(set_attr "may_trap" "no")(set_attr "latency" "0")(set_attr "length" "4")(set_attr "slot" "cop")(set_attr "slots" "p1")(set_attr "stall" "none")])(define_insn "cgen_intrinsic_cpfmulila1_h_P1"[(set (reg:SI 107)(unspec_volatile:SI [(match_operand:DI 0 "general_operand" "x")(match_operand:DI 1 "general_operand" "x")(match_operand:SI 2 "cgen_h_uint_3a1_immediate" "")(match_operand:SI 3 "cgen_h_sint_8a1_immediate" "")] 1056))(set (reg:SI 106)(unspec_volatile:SI [(match_dup 0)(match_dup 1)(match_dup 2)(match_dup 3)] 1058))(set (reg:SI 105)(unspec_volatile:SI [(match_dup 0)(match_dup 1)(match_dup 2)(match_dup 3)] 1060))(set (reg:SI 104)(unspec_volatile:SI [(match_dup 0)(match_dup 1)(match_dup 2)(match_dup 3)] 1062))]"CGEN_ENABLE_INSN_P (96)""cpfmulila1.h\\t%0,%1,%2,%3"[(set_attr "may_trap" "no")(set_attr "latency" "0")(set_attr "length" "4")(set_attr "slot" "cop")(set_attr "slots" "p1")(set_attr "stall" "none")])(define_insn "cgen_intrinsic_cpfmuliua1_h_P1"[(set (reg:SI 111)(unspec_volatile:SI [(match_operand:DI 0 "general_operand" "x")(match_operand:DI 1 "general_operand" "x")(match_operand:SI 2 "cgen_h_uint_3a1_immediate" "")(match_operand:SI 3 "cgen_h_sint_8a1_immediate" "")] 1064))(set (reg:SI 110)(unspec_volatile:SI [(match_dup 0)(match_dup 1)(match_dup 2)(match_dup 3)] 1066))(set (reg:SI 109)(unspec_volatile:SI [(match_dup 0)(match_dup 1)(match_dup 2)(match_dup 3)] 1068))(set (reg:SI 108)(unspec_volatile:SI [(match_dup 0)(match_dup 1)(match_dup 2)(match_dup 3)] 1070))]"CGEN_ENABLE_INSN_P (97)""cpfmuliua1.h\\t%0,%1,%2,%3"[(set_attr "may_trap" "no")(set_attr "latency" "0")(set_attr "length" "4")(set_attr "slot" "cop")(set_attr "slots" "p1")(set_attr "stall" "none")])(define_insn "cgen_intrinsic_cpfmulia1_b_P1"[(set (reg:SI 111)(unspec_volatile:SI [(match_operand:DI 0 "general_operand" "x")(match_operand:DI 1 "general_operand" "x")(match_operand:SI 2 "cgen_h_uint_3a1_immediate" "")(match_operand:SI 3 "cgen_h_sint_8a1_immediate" "")] 1072))(set (reg:SI 110)(unspec_volatile:SI [(match_dup 0)(match_dup 1)(match_dup 2)(match_dup 3)] 1074))(set (reg:SI 109)(unspec_volatile:SI [(match_dup 0)(match_dup 1)(match_dup 2)(match_dup 3)] 1076))(set (reg:SI 108)(unspec_volatile:SI [(match_dup 0)(match_dup 1)(match_dup 2)(match_dup 3)] 1078))(set (reg:SI 107)(unspec_volatile:SI [(match_dup 0)(match_dup 1)(match_dup 2)(match_dup 3)] 1080))(set (reg:SI 106)(unspec_volatile:SI [(match_dup 0)(match_dup 1)(match_dup 2)(match_dup 3)] 1082))(set (reg:SI 105)(unspec_volatile:SI [(match_dup 0)(match_dup 1)(match_dup 2)(match_dup 3)] 1084))(set (reg:SI 104)(unspec_volatile:SI [(match_dup 0)(match_dup 1)(match_dup 2)(match_dup 3)] 1086))]"CGEN_ENABLE_INSN_P (98)""cpfmulia1.b\\t%0,%1,%2,%3"[(set_attr "may_trap" "no")(set_attr "latency" "0")(set_attr "length" "4")(set_attr "slot" "cop")(set_attr "slots" "p1")(set_attr "stall" "none")])(define_insn "cgen_intrinsic_cpfmulia1u_b_P1"[(set (reg:SI 111)(unspec_volatile:SI [(match_operand:DI 0 "general_operand" "x")(match_operand:DI 1 "general_operand" "x")(match_operand:SI 2 "cgen_h_uint_3a1_immediate" "")(match_operand:SI 3 "cgen_h_sint_8a1_immediate" "")] 1088))(set (reg:SI 110)(unspec_volatile:SI [(match_dup 0)(match_dup 1)(match_dup 2)(match_dup 3)] 1090))(set (reg:SI 109)(unspec_volatile:SI [(match_dup 0)(match_dup 1)(match_dup 2)(match_dup 3)] 1092))(set (reg:SI 108)(unspec_volatile:SI [(match_dup 0)(match_dup 1)(match_dup 2)(match_dup 3)] 1094))(set (reg:SI 107)(unspec_volatile:SI [(match_dup 0)(match_dup 1)(match_dup 2)(match_dup 3)] 1096))(set (reg:SI 106)(unspec_volatile:SI [(match_dup 0)(match_dup 1)(match_dup 2)(match_dup 3)] 1098))(set (reg:SI 105)(unspec_volatile:SI [(match_dup 0)(match_dup 1)(match_dup 2)(match_dup 3)] 1100))(set (reg:SI 104)(unspec_volatile:SI [(match_dup 0)(match_dup 1)(match_dup 2)(match_dup 3)] 1102))]"CGEN_ENABLE_INSN_P (99)""cpfmulia1u.b\\t%0,%1,%2,%3"[(set_attr "may_trap" "no")(set_attr "latency" "0")(set_attr "length" "4")(set_attr "slot" "cop")(set_attr "slots" "p1")(set_attr "stall" "none")])(define_insn "cgen_intrinsic_cpamadila1_h_P1"[(set (reg:SI 87)(unspec_volatile:SI [(match_operand:DI 0 "general_operand" "x")(match_operand:DI 1 "general_operand" "x")(match_operand:SI 2 "cgen_h_sint_8a1_immediate" "")] 1104))(set (reg:SI 107)(unspec_volatile:SI [(match_dup 0)(match_dup 1)(match_dup 2)] 1106))(set (reg:SI 106)(unspec_volatile:SI [(match_dup 0)(match_dup 1)(match_dup 2)] 1108))(set (reg:SI 105)(unspec_volatile:SI [(match_dup 0)(match_dup 1)(match_dup 2)] 1110))(set (reg:SI 104)(unspec_volatile:SI [(match_dup 0)(match_dup 1)(match_dup 2)] 1112))]"CGEN_ENABLE_INSN_P (100)""cpamadila1.h\\t%0,%1,%2"[(set_attr "may_trap" "no")(set_attr "latency" "0")(set_attr "length" "4")(set_attr "slot" "cop")(set_attr "slots" "p1")(set_attr "stall" "none")])(define_insn "cgen_intrinsic_cpamadiua1_h_P1"[(set (reg:SI 87)(unspec_volatile:SI [(match_operand:DI 0 "general_operand" "x")(match_operand:DI 1 "general_operand" "x")(match_operand:SI 2 "cgen_h_sint_8a1_immediate" "")] 1114))(set (reg:SI 111)(unspec_volatile:SI [(match_dup 0)(match_dup 1)(match_dup 2)] 1116))(set (reg:SI 110)(unspec_volatile:SI [(match_dup 0)(match_dup 1)(match_dup 2)] 1118))(set (reg:SI 109)(unspec_volatile:SI [(match_dup 0)(match_dup 1)(match_dup 2)] 1120))(set (reg:SI 108)(unspec_volatile:SI [(match_dup 0)(match_dup 1)(match_dup 2)] 1122))]"CGEN_ENABLE_INSN_P (101)""cpamadiua1.h\\t%0,%1,%2"[(set_attr "may_trap" "no")(set_attr "latency" "0")(set_attr "length" "4")(set_attr "slot" "cop")(set_attr "slots" "p1")(set_attr "stall" "none")])(define_insn "cgen_intrinsic_cpamadia1_b_P1"[(set (reg:SI 87)(unspec_volatile:SI [(match_operand:DI 0 "general_operand" "x")(match_operand:DI 1 "general_operand" "x")(match_operand:SI 2 "cgen_h_sint_8a1_immediate" "")] 1124))(set (reg:SI 111)(unspec_volatile:SI [(match_dup 0)(match_dup 1)(match_dup 2)] 1126))(set (reg:SI 110)(unspec_volatile:SI [(match_dup 0)(match_dup 1)(match_dup 2)] 1128))(set (reg:SI 109)(unspec_volatile:SI [(match_dup 0)(match_dup 1)(match_dup 2)] 1130))(set (reg:SI 108)(unspec_volatile:SI [(match_dup 0)(match_dup 1)(match_dup 2)] 1132))(set (reg:SI 107)(unspec_volatile:SI [(match_dup 0)(match_dup 1)(match_dup 2)] 1134))(set (reg:SI 106)(unspec_volatile:SI [(match_dup 0)(match_dup 1)(match_dup 2)] 1136))(set (reg:SI 105)(unspec_volatile:SI [(match_dup 0)(match_dup 1)(match_dup 2)] 1138))(set (reg:SI 104)(unspec_volatile:SI [(match_dup 0)(match_dup 1)(match_dup 2)] 1140))]"CGEN_ENABLE_INSN_P (102)""cpamadia1.b\\t%0,%1,%2"[(set_attr "may_trap" "no")(set_attr "latency" "0")(set_attr "length" "4")(set_attr "slot" "cop")(set_attr "slots" "p1")(set_attr "stall" "none")])(define_insn "cgen_intrinsic_cpamadia1u_b_P1"[(set (reg:SI 87)(unspec_volatile:SI [(match_operand:DI 0 "general_operand" "x")(match_operand:DI 1 "general_operand" "x")(match_operand:SI 2 "cgen_h_sint_8a1_immediate" "")] 1142))(set (reg:SI 111)(unspec_volatile:SI [(match_dup 0)(match_dup 1)(match_dup 2)] 1144))(set (reg:SI 110)(unspec_volatile:SI [(match_dup 0)(match_dup 1)(match_dup 2)] 1146))(set (reg:SI 109)(unspec_volatile:SI [(match_dup 0)(match_dup 1)(match_dup 2)] 1148))(set (reg:SI 108)(unspec_volatile:SI [(match_dup 0)(match_dup 1)(match_dup 2)] 1150))(set (reg:SI 107)(unspec_volatile:SI [(match_dup 0)(match_dup 1)(match_dup 2)] 1152))(set (reg:SI 106)(unspec_volatile:SI [(match_dup 0)(match_dup 1)(match_dup 2)] 1154))(set (reg:SI 105)(unspec_volatile:SI [(match_dup 0)(match_dup 1)(match_dup 2)] 1156))(set (reg:SI 104)(unspec_volatile:SI [(match_dup 0)(match_dup 1)(match_dup 2)] 1158))]"CGEN_ENABLE_INSN_P (103)""cpamadia1u.b\\t%0,%1,%2"[(set_attr "may_trap" "no")(set_attr "latency" "0")(set_attr "length" "4")(set_attr "slot" "cop")(set_attr "slots" "p1")(set_attr "stall" "none")])(define_insn "cgen_intrinsic_cpamulila1_h_P1"[(set (reg:SI 107)(unspec_volatile:SI [(match_operand:DI 0 "general_operand" "x")(match_operand:DI 1 "general_operand" "x")(match_operand:SI 2 "cgen_h_sint_8a1_immediate" "")] 1160))(set (reg:SI 106)(unspec_volatile:SI [(match_dup 0)(match_dup 1)(match_dup 2)] 1162))(set (reg:SI 105)(unspec_volatile:SI [(match_dup 0)(match_dup 1)(match_dup 2)] 1164))(set (reg:SI 104)(unspec_volatile:SI [(match_dup 0)(match_dup 1)(match_dup 2)] 1166))]"CGEN_ENABLE_INSN_P (104)""cpamulila1.h\\t%0,%1,%2"[(set_attr "may_trap" "no")(set_attr "latency" "0")(set_attr "length" "4")(set_attr "slot" "cop")(set_attr "slots" "p1")(set_attr "stall" "none")])(define_insn "cgen_intrinsic_cpamuliua1_h_P1"[(set (reg:SI 111)(unspec_volatile:SI [(match_operand:DI 0 "general_operand" "x")(match_operand:DI 1 "general_operand" "x")(match_operand:SI 2 "cgen_h_sint_8a1_immediate" "")] 1168))(set (reg:SI 110)(unspec_volatile:SI [(match_dup 0)(match_dup 1)(match_dup 2)] 1170))(set (reg:SI 109)(unspec_volatile:SI [(match_dup 0)(match_dup 1)(match_dup 2)] 1172))(set (reg:SI 108)(unspec_volatile:SI [(match_dup 0)(match_dup 1)(match_dup 2)] 1174))]"CGEN_ENABLE_INSN_P (105)""cpamuliua1.h\\t%0,%1,%2"[(set_attr "may_trap" "no")(set_attr "latency" "0")(set_attr "length" "4")(set_attr "slot" "cop")(set_attr "slots" "p1")(set_attr "stall" "none")])(define_insn "cgen_intrinsic_cpamulia1_b_P1"[(set (reg:SI 111)(unspec_volatile:SI [(match_operand:DI 0 "general_operand" "x")(match_operand:DI 1 "general_operand" "x")(match_operand:SI 2 "cgen_h_sint_8a1_immediate" "")] 1176))(set (reg:SI 110)(unspec_volatile:SI [(match_dup 0)(match_dup 1)(match_dup 2)] 1178))(set (reg:SI 109)(unspec_volatile:SI [(match_dup 0)(match_dup 1)(match_dup 2)] 1180))(set (reg:SI 108)(unspec_volatile:SI [(match_dup 0)(match_dup 1)(match_dup 2)] 1182))(set (reg:SI 107)(unspec_volatile:SI [(match_dup 0)(match_dup 1)(match_dup 2)] 1184))(set (reg:SI 106)(unspec_volatile:SI [(match_dup 0)(match_dup 1)(match_dup 2)] 1186))(set (reg:SI 105)(unspec_volatile:SI [(match_dup 0)(match_dup 1)(match_dup 2)] 1188))(set (reg:SI 104)(unspec_volatile:SI [(match_dup 0)(match_dup 1)(match_dup 2)] 1190))]"CGEN_ENABLE_INSN_P (106)""cpamulia1.b\\t%0,%1,%2"[(set_attr "may_trap" "no")(set_attr "latency" "0")(set_attr "length" "4")(set_attr "slot" "cop")(set_attr "slots" "p1")(set_attr "stall" "none")])(define_insn "cgen_intrinsic_cpamulia1u_b_P1"[(set (reg:SI 111)(unspec_volatile:SI [(match_operand:DI 0 "general_operand" "x")(match_operand:DI 1 "general_operand" "x")(match_operand:SI 2 "cgen_h_sint_8a1_immediate" "")] 1192))(set (reg:SI 110)(unspec_volatile:SI [(match_dup 0)(match_dup 1)(match_dup 2)] 1194))(set (reg:SI 109)(unspec_volatile:SI [(match_dup 0)(match_dup 1)(match_dup 2)] 1196))(set (reg:SI 108)(unspec_volatile:SI [(match_dup 0)(match_dup 1)(match_dup 2)] 1198))(set (reg:SI 107)(unspec_volatile:SI [(match_dup 0)(match_dup 1)(match_dup 2)] 1200))(set (reg:SI 106)(unspec_volatile:SI [(match_dup 0)(match_dup 1)(match_dup 2)] 1202))(set (reg:SI 105)(unspec_volatile:SI [(match_dup 0)(match_dup 1)(match_dup 2)] 1204))(set (reg:SI 104)(unspec_volatile:SI [(match_dup 0)(match_dup 1)(match_dup 2)] 1206))]"CGEN_ENABLE_INSN_P (107)""cpamulia1u.b\\t%0,%1,%2"[(set_attr "may_trap" "no")(set_attr "latency" "0")(set_attr "length" "4")(set_attr "slot" "cop")(set_attr "slots" "p1")(set_attr "stall" "none")])(define_insn "cgen_intrinsic_cpfmadila1s1_h_P1"[(set (reg:SI 87)(unspec_volatile:SI [(match_operand:DI 0 "general_operand" "x")(match_operand:DI 1 "general_operand" "x")(match_operand:SI 2 "cgen_h_sint_8a1_immediate" "")] 1208))(set (reg:SI 107)(unspec_volatile:SI [(match_dup 0)(match_dup 1)(match_dup 2)] 1210))(set (reg:SI 106)(unspec_volatile:SI [(match_dup 0)(match_dup 1)(match_dup 2)] 1212))(set (reg:SI 105)(unspec_volatile:SI [(match_dup 0)(match_dup 1)(match_dup 2)] 1214))(set (reg:SI 104)(unspec_volatile:SI [(match_dup 0)(match_dup 1)(match_dup 2)] 1216))]"CGEN_ENABLE_INSN_P (108)""cpfmadila1s1.h\\t%0,%1,%2"[(set_attr "may_trap" "no")(set_attr "latency" "0")(set_attr "length" "4")(set_attr "slot" "cop")(set_attr "slots" "p1")(set_attr "stall" "none")])(define_insn "cgen_intrinsic_cpfmadiua1s1_h_P1"[(set (reg:SI 87)(unspec_volatile:SI [(match_operand:DI 0 "general_operand" "x")(match_operand:DI 1 "general_operand" "x")(match_operand:SI 2 "cgen_h_sint_8a1_immediate" "")] 1218))(set (reg:SI 111)(unspec_volatile:SI [(match_dup 0)(match_dup 1)(match_dup 2)] 1220))(set (reg:SI 110)(unspec_volatile:SI [(match_dup 0)(match_dup 1)(match_dup 2)] 1222))(set (reg:SI 109)(unspec_volatile:SI [(match_dup 0)(match_dup 1)(match_dup 2)] 1224))(set (reg:SI 108)(unspec_volatile:SI [(match_dup 0)(match_dup 1)(match_dup 2)] 1226))]"CGEN_ENABLE_INSN_P (109)""cpfmadiua1s1.h\\t%0,%1,%2"[(set_attr "may_trap" "no")(set_attr "latency" "0")(set_attr "length" "4")(set_attr "slot" "cop")(set_attr "slots" "p1")(set_attr "stall" "none")])(define_insn "cgen_intrinsic_cpfmadia1s1_b_P1"[(set (reg:SI 87)(unspec_volatile:SI [(match_operand:DI 0 "general_operand" "x")(match_operand:DI 1 "general_operand" "x")(match_operand:SI 2 "cgen_h_sint_8a1_immediate" "")] 1228))(set (reg:SI 111)(unspec_volatile:SI [(match_dup 0)(match_dup 1)(match_dup 2)] 1230))(set (reg:SI 110)(unspec_volatile:SI [(match_dup 0)(match_dup 1)(match_dup 2)] 1232))(set (reg:SI 109)(unspec_volatile:SI [(match_dup 0)(match_dup 1)(match_dup 2)] 1234))(set (reg:SI 108)(unspec_volatile:SI [(match_dup 0)(match_dup 1)(match_dup 2)] 1236))(set (reg:SI 107)(unspec_volatile:SI [(match_dup 0)(match_dup 1)(match_dup 2)] 1238))(set (reg:SI 106)(unspec_volatile:SI [(match_dup 0)(match_dup 1)(match_dup 2)] 1240))(set (reg:SI 105)(unspec_volatile:SI [(match_dup 0)(match_dup 1)(match_dup 2)] 1242))(set (reg:SI 104)(unspec_volatile:SI [(match_dup 0)(match_dup 1)(match_dup 2)] 1244))]"CGEN_ENABLE_INSN_P (110)""cpfmadia1s1.b\\t%0,%1,%2"[(set_attr "may_trap" "no")(set_attr "latency" "0")(set_attr "length" "4")(set_attr "slot" "cop")(set_attr "slots" "p1")(set_attr "stall" "none")])(define_insn "cgen_intrinsic_cpfmadia1s1u_b_P1"[(set (reg:SI 87)(unspec_volatile:SI [(match_operand:DI 0 "general_operand" "x")(match_operand:DI 1 "general_operand" "x")(match_operand:SI 2 "cgen_h_sint_8a1_immediate" "")] 1246))(set (reg:SI 111)(unspec_volatile:SI [(match_dup 0)(match_dup 1)(match_dup 2)] 1248))(set (reg:SI 110)(unspec_volatile:SI [(match_dup 0)(match_dup 1)(match_dup 2)] 1250))(set (reg:SI 109)(unspec_volatile:SI [(match_dup 0)(match_dup 1)(match_dup 2)] 1252))(set (reg:SI 108)(unspec_volatile:SI [(match_dup 0)(match_dup 1)(match_dup 2)] 1254))(set (reg:SI 107)(unspec_volatile:SI [(match_dup 0)(match_dup 1)(match_dup 2)] 1256))(set (reg:SI 106)(unspec_volatile:SI [(match_dup 0)(match_dup 1)(match_dup 2)] 1258))(set (reg:SI 105)(unspec_volatile:SI [(match_dup 0)(match_dup 1)(match_dup 2)] 1260))(set (reg:SI 104)(unspec_volatile:SI [(match_dup 0)(match_dup 1)(match_dup 2)] 1262))]"CGEN_ENABLE_INSN_P (111)""cpfmadia1s1u.b\\t%0,%1,%2"[(set_attr "may_trap" "no")(set_attr "latency" "0")(set_attr "length" "4")(set_attr "slot" "cop")(set_attr "slots" "p1")(set_attr "stall" "none")])(define_insn "cgen_intrinsic_cpfmulila1s1_h_P1"[(set (reg:SI 107)(unspec_volatile:SI [(match_operand:DI 0 "general_operand" "x")(match_operand:DI 1 "general_operand" "x")(match_operand:SI 2 "cgen_h_sint_8a1_immediate" "")] 1264))(set (reg:SI 106)(unspec_volatile:SI [(match_dup 0)(match_dup 1)(match_dup 2)] 1266))(set (reg:SI 105)(unspec_volatile:SI [(match_dup 0)(match_dup 1)(match_dup 2)] 1268))(set (reg:SI 104)(unspec_volatile:SI [(match_dup 0)(match_dup 1)(match_dup 2)] 1270))]"CGEN_ENABLE_INSN_P (112)""cpfmulila1s1.h\\t%0,%1,%2"[(set_attr "may_trap" "no")(set_attr "latency" "0")(set_attr "length" "4")(set_attr "slot" "cop")(set_attr "slots" "p1")(set_attr "stall" "none")])(define_insn "cgen_intrinsic_cpfmuliua1s1_h_P1"[(set (reg:SI 111)(unspec_volatile:SI [(match_operand:DI 0 "general_operand" "x")(match_operand:DI 1 "general_operand" "x")(match_operand:SI 2 "cgen_h_sint_8a1_immediate" "")] 1272))(set (reg:SI 110)(unspec_volatile:SI [(match_dup 0)(match_dup 1)(match_dup 2)] 1274))(set (reg:SI 109)(unspec_volatile:SI [(match_dup 0)(match_dup 1)(match_dup 2)] 1276))(set (reg:SI 108)(unspec_volatile:SI [(match_dup 0)(match_dup 1)(match_dup 2)] 1278))]"CGEN_ENABLE_INSN_P (113)""cpfmuliua1s1.h\\t%0,%1,%2"[(set_attr "may_trap" "no")(set_attr "latency" "0")(set_attr "length" "4")(set_attr "slot" "cop")(set_attr "slots" "p1")(set_attr "stall" "none")])(define_insn "cgen_intrinsic_cpfmulia1s1_b_P1"[(set (reg:SI 111)(unspec_volatile:SI [(match_operand:DI 0 "general_operand" "x")(match_operand:DI 1 "general_operand" "x")(match_operand:SI 2 "cgen_h_sint_8a1_immediate" "")] 1280))(set (reg:SI 110)(unspec_volatile:SI [(match_dup 0)(match_dup 1)(match_dup 2)] 1282))(set (reg:SI 109)(unspec_volatile:SI [(match_dup 0)(match_dup 1)(match_dup 2)] 1284))(set (reg:SI 108)(unspec_volatile:SI [(match_dup 0)(match_dup 1)(match_dup 2)] 1286))(set (reg:SI 107)(unspec_volatile:SI [(match_dup 0)(match_dup 1)(match_dup 2)] 1288))(set (reg:SI 106)(unspec_volatile:SI [(match_dup 0)(match_dup 1)(match_dup 2)] 1290))(set (reg:SI 105)(unspec_volatile:SI [(match_dup 0)(match_dup 1)(match_dup 2)] 1292))(set (reg:SI 104)(unspec_volatile:SI [(match_dup 0)(match_dup 1)(match_dup 2)] 1294))]"CGEN_ENABLE_INSN_P (114)""cpfmulia1s1.b\\t%0,%1,%2"[(set_attr "may_trap" "no")(set_attr "latency" "0")(set_attr "length" "4")(set_attr "slot" "cop")(set_attr "slots" "p1")(set_attr "stall" "none")])(define_insn "cgen_intrinsic_cpfmulia1s1u_b_P1"[(set (reg:SI 111)(unspec_volatile:SI [(match_operand:DI 0 "general_operand" "x")(match_operand:DI 1 "general_operand" "x")(match_operand:SI 2 "cgen_h_sint_8a1_immediate" "")] 1296))(set (reg:SI 110)(unspec_volatile:SI [(match_dup 0)(match_dup 1)(match_dup 2)] 1298))(set (reg:SI 109)(unspec_volatile:SI [(match_dup 0)(match_dup 1)(match_dup 2)] 1300))(set (reg:SI 108)(unspec_volatile:SI [(match_dup 0)(match_dup 1)(match_dup 2)] 1302))(set (reg:SI 107)(unspec_volatile:SI [(match_dup 0)(match_dup 1)(match_dup 2)] 1304))(set (reg:SI 106)(unspec_volatile:SI [(match_dup 0)(match_dup 1)(match_dup 2)] 1306))(set (reg:SI 105)(unspec_volatile:SI [(match_dup 0)(match_dup 1)(match_dup 2)] 1308))(set (reg:SI 104)(unspec_volatile:SI [(match_dup 0)(match_dup 1)(match_dup 2)] 1310))]"CGEN_ENABLE_INSN_P (115)""cpfmulia1s1u.b\\t%0,%1,%2"[(set_attr "may_trap" "no")(set_attr "latency" "0")(set_attr "length" "4")(set_attr "slot" "cop")(set_attr "slots" "p1")(set_attr "stall" "none")])(define_insn "cgen_intrinsic_cpfmadila1s0_h_P1"[(set (reg:SI 87)(unspec_volatile:SI [(match_operand:DI 0 "general_operand" "x")(match_operand:DI 1 "general_operand" "x")(match_operand:SI 2 "cgen_h_sint_8a1_immediate" "")] 1312))(set (reg:SI 107)(unspec_volatile:SI [(match_dup 0)(match_dup 1)(match_dup 2)] 1314))(set (reg:SI 106)(unspec_volatile:SI [(match_dup 0)(match_dup 1)(match_dup 2)] 1316))(set (reg:SI 105)(unspec_volatile:SI [(match_dup 0)(match_dup 1)(match_dup 2)] 1318))(set (reg:SI 104)(unspec_volatile:SI [(match_dup 0)(match_dup 1)(match_dup 2)] 1320))]"CGEN_ENABLE_INSN_P (116)""cpfmadila1s0.h\\t%0,%1,%2"[(set_attr "may_trap" "no")(set_attr "latency" "0")(set_attr "length" "4")(set_attr "slot" "cop")(set_attr "slots" "p1")(set_attr "stall" "none")])(define_insn "cgen_intrinsic_cpfmadiua1s0_h_P1"[(set (reg:SI 87)(unspec_volatile:SI [(match_operand:DI 0 "general_operand" "x")(match_operand:DI 1 "general_operand" "x")(match_operand:SI 2 "cgen_h_sint_8a1_immediate" "")] 1322))(set (reg:SI 111)(unspec_volatile:SI [(match_dup 0)(match_dup 1)(match_dup 2)] 1324))(set (reg:SI 110)(unspec_volatile:SI [(match_dup 0)(match_dup 1)(match_dup 2)] 1326))(set (reg:SI 109)(unspec_volatile:SI [(match_dup 0)(match_dup 1)(match_dup 2)] 1328))(set (reg:SI 108)(unspec_volatile:SI [(match_dup 0)(match_dup 1)(match_dup 2)] 1330))]"CGEN_ENABLE_INSN_P (117)""cpfmadiua1s0.h\\t%0,%1,%2"[(set_attr "may_trap" "no")(set_attr "latency" "0")(set_attr "length" "4")(set_attr "slot" "cop")(set_attr "slots" "p1")(set_attr "stall" "none")])(define_insn "cgen_intrinsic_cpfmadia1s0_b_P1"[(set (reg:SI 87)(unspec_volatile:SI [(match_operand:DI 0 "general_operand" "x")(match_operand:DI 1 "general_operand" "x")(match_operand:SI 2 "cgen_h_sint_8a1_immediate" "")] 1332))(set (reg:SI 111)(unspec_volatile:SI [(match_dup 0)(match_dup 1)(match_dup 2)] 1334))(set (reg:SI 110)(unspec_volatile:SI [(match_dup 0)(match_dup 1)(match_dup 2)] 1336))(set (reg:SI 109)(unspec_volatile:SI [(match_dup 0)(match_dup 1)(match_dup 2)] 1338))(set (reg:SI 108)(unspec_volatile:SI [(match_dup 0)(match_dup 1)(match_dup 2)] 1340))(set (reg:SI 107)(unspec_volatile:SI [(match_dup 0)(match_dup 1)(match_dup 2)] 1342))(set (reg:SI 106)(unspec_volatile:SI [(match_dup 0)(match_dup 1)(match_dup 2)] 1344))(set (reg:SI 105)(unspec_volatile:SI [(match_dup 0)(match_dup 1)(match_dup 2)] 1346))(set (reg:SI 104)(unspec_volatile:SI [(match_dup 0)(match_dup 1)(match_dup 2)] 1348))]"CGEN_ENABLE_INSN_P (118)""cpfmadia1s0.b\\t%0,%1,%2"[(set_attr "may_trap" "no")(set_attr "latency" "0")(set_attr "length" "4")(set_attr "slot" "cop")(set_attr "slots" "p1")(set_attr "stall" "none")])(define_insn "cgen_intrinsic_cpfmadia1s0u_b_P1"[(set (reg:SI 87)(unspec_volatile:SI [(match_operand:DI 0 "general_operand" "x")(match_operand:DI 1 "general_operand" "x")(match_operand:SI 2 "cgen_h_sint_8a1_immediate" "")] 1350))(set (reg:SI 111)(unspec_volatile:SI [(match_dup 0)(match_dup 1)(match_dup 2)] 1352))(set (reg:SI 110)(unspec_volatile:SI [(match_dup 0)(match_dup 1)(match_dup 2)] 1354))(set (reg:SI 109)(unspec_volatile:SI [(match_dup 0)(match_dup 1)(match_dup 2)] 1356))(set (reg:SI 108)(unspec_volatile:SI [(match_dup 0)(match_dup 1)(match_dup 2)] 1358))(set (reg:SI 107)(unspec_volatile:SI [(match_dup 0)(match_dup 1)(match_dup 2)] 1360))(set (reg:SI 106)(unspec_volatile:SI [(match_dup 0)(match_dup 1)(match_dup 2)] 1362))(set (reg:SI 105)(unspec_volatile:SI [(match_dup 0)(match_dup 1)(match_dup 2)] 1364))(set (reg:SI 104)(unspec_volatile:SI [(match_dup 0)(match_dup 1)(match_dup 2)] 1366))]"CGEN_ENABLE_INSN_P (119)""cpfmadia1s0u.b\\t%0,%1,%2"[(set_attr "may_trap" "no")(set_attr "latency" "0")(set_attr "length" "4")(set_attr "slot" "cop")(set_attr "slots" "p1")(set_attr "stall" "none")])(define_insn "cgen_intrinsic_cpfmulila1s0_h_P1"[(set (reg:SI 107)(unspec_volatile:SI [(match_operand:DI 0 "general_operand" "x")(match_operand:DI 1 "general_operand" "x")(match_operand:SI 2 "cgen_h_sint_8a1_immediate" "")] 1368))(set (reg:SI 106)(unspec_volatile:SI [(match_dup 0)(match_dup 1)(match_dup 2)] 1370))(set (reg:SI 105)(unspec_volatile:SI [(match_dup 0)(match_dup 1)(match_dup 2)] 1372))(set (reg:SI 104)(unspec_volatile:SI [(match_dup 0)(match_dup 1)(match_dup 2)] 1374))]"CGEN_ENABLE_INSN_P (120)""cpfmulila1s0.h\\t%0,%1,%2"[(set_attr "may_trap" "no")(set_attr "latency" "0")(set_attr "length" "4")(set_attr "slot" "cop")(set_attr "slots" "p1")(set_attr "stall" "none")])(define_insn "cgen_intrinsic_cpfmuliua1s0_h_P1"[(set (reg:SI 111)(unspec_volatile:SI [(match_operand:DI 0 "general_operand" "x")(match_operand:DI 1 "general_operand" "x")(match_operand:SI 2 "cgen_h_sint_8a1_immediate" "")] 1376))(set (reg:SI 110)(unspec_volatile:SI [(match_dup 0)(match_dup 1)(match_dup 2)] 1378))(set (reg:SI 109)(unspec_volatile:SI [(match_dup 0)(match_dup 1)(match_dup 2)] 1380))(set (reg:SI 108)(unspec_volatile:SI [(match_dup 0)(match_dup 1)(match_dup 2)] 1382))]"CGEN_ENABLE_INSN_P (121)""cpfmuliua1s0.h\\t%0,%1,%2"[(set_attr "may_trap" "no")(set_attr "latency" "0")(set_attr "length" "4")(set_attr "slot" "cop")(set_attr "slots" "p1")(set_attr "stall" "none")])(define_insn "cgen_intrinsic_cpfmulia1s0_b_P1"[(set (reg:SI 111)(unspec_volatile:SI [(match_operand:DI 0 "general_operand" "x")(match_operand:DI 1 "general_operand" "x")(match_operand:SI 2 "cgen_h_sint_8a1_immediate" "")] 1384))(set (reg:SI 110)(unspec_volatile:SI [(match_dup 0)(match_dup 1)(match_dup 2)] 1386))(set (reg:SI 109)(unspec_volatile:SI [(match_dup 0)(match_dup 1)(match_dup 2)] 1388))(set (reg:SI 108)(unspec_volatile:SI [(match_dup 0)(match_dup 1)(match_dup 2)] 1390))(set (reg:SI 107)(unspec_volatile:SI [(match_dup 0)(match_dup 1)(match_dup 2)] 1392))(set (reg:SI 106)(unspec_volatile:SI [(match_dup 0)(match_dup 1)(match_dup 2)] 1394))(set (reg:SI 105)(unspec_volatile:SI [(match_dup 0)(match_dup 1)(match_dup 2)] 1396))(set (reg:SI 104)(unspec_volatile:SI [(match_dup 0)(match_dup 1)(match_dup 2)] 1398))]"CGEN_ENABLE_INSN_P (122)""cpfmulia1s0.b\\t%0,%1,%2"[(set_attr "may_trap" "no")(set_attr "latency" "0")(set_attr "length" "4")(set_attr "slot" "cop")(set_attr "slots" "p1")(set_attr "stall" "none")])(define_insn "cgen_intrinsic_cpfmulia1s0u_b_P1"[(set (reg:SI 111)(unspec_volatile:SI [(match_operand:DI 0 "general_operand" "x")(match_operand:DI 1 "general_operand" "x")(match_operand:SI 2 "cgen_h_sint_8a1_immediate" "")] 1400))(set (reg:SI 110)(unspec_volatile:SI [(match_dup 0)(match_dup 1)(match_dup 2)] 1402))(set (reg:SI 109)(unspec_volatile:SI [(match_dup 0)(match_dup 1)(match_dup 2)] 1404))(set (reg:SI 108)(unspec_volatile:SI [(match_dup 0)(match_dup 1)(match_dup 2)] 1406))(set (reg:SI 107)(unspec_volatile:SI [(match_dup 0)(match_dup 1)(match_dup 2)] 1408))(set (reg:SI 106)(unspec_volatile:SI [(match_dup 0)(match_dup 1)(match_dup 2)] 1410))(set (reg:SI 105)(unspec_volatile:SI [(match_dup 0)(match_dup 1)(match_dup 2)] 1412))(set (reg:SI 104)(unspec_volatile:SI [(match_dup 0)(match_dup 1)(match_dup 2)] 1414))]"CGEN_ENABLE_INSN_P (123)""cpfmulia1s0u.b\\t%0,%1,%2"[(set_attr "may_trap" "no")(set_attr "latency" "0")(set_attr "length" "4")(set_attr "slot" "cop")(set_attr "slots" "p1")(set_attr "stall" "none")])(define_insn "cgen_intrinsic_cpsllia1_P1"[(set (reg:SI 111)(unspec_volatile:SI [(match_operand:SI 0 "cgen_h_uint_5a1_immediate" "")] 2698))(set (reg:SI 110)(unspec_volatile:SI [(match_dup 0)] 2700))(set (reg:SI 109)(unspec_volatile:SI [(match_dup 0)] 2702))(set (reg:SI 108)(unspec_volatile:SI [(match_dup 0)] 2704))(set (reg:SI 107)(unspec_volatile:SI [(match_dup 0)] 2706))(set (reg:SI 106)(unspec_volatile:SI [(match_dup 0)] 2708))(set (reg:SI 105)(unspec_volatile:SI [(match_dup 0)] 2710))(set (reg:SI 104)(unspec_volatile:SI [(match_dup 0)] 2712))]"CGEN_ENABLE_INSN_P (124)""cpsllia1\\t%0"[(set_attr "may_trap" "no")(set_attr "latency" "0")(set_attr "length" "4")(set_attr "slot" "cop")(set_attr "slots" "c3")(set_attr "stall" "none")])(define_insn "cgen_intrinsic_cpsllia1_1_p1"[(set (reg:SI 111)(unspec_volatile:SI [(match_operand:SI 0 "cgen_h_uint_5a1_immediate" "")] 2698))(set (reg:SI 110)(unspec_volatile:SI [(match_dup 0)] 2700))(set (reg:SI 109)(unspec_volatile:SI [(match_dup 0)] 2702))(set (reg:SI 108)(unspec_volatile:SI [(match_dup 0)] 2704))(set (reg:SI 107)(unspec_volatile:SI [(match_dup 0)] 2706))(set (reg:SI 106)(unspec_volatile:SI [(match_dup 0)] 2708))(set (reg:SI 105)(unspec_volatile:SI [(match_dup 0)] 2710))(set (reg:SI 104)(unspec_volatile:SI [(match_dup 0)] 2712))]"CGEN_ENABLE_INSN_P (125)""cpsllia1\\t%0"[(set_attr "may_trap" "no")(set_attr "latency" "0")(set_attr "length" "4")(set_attr "slot" "cop")(set_attr "slots" "p1")(set_attr "stall" "none")])(define_insn "cgen_intrinsic_cpsraia1_P1"[(set (reg:SI 111)(unspec_volatile:SI [(match_operand:SI 0 "cgen_h_uint_5a1_immediate" "")] 2714))(set (reg:SI 110)(unspec_volatile:SI [(match_dup 0)] 2716))(set (reg:SI 109)(unspec_volatile:SI [(match_dup 0)] 2718))(set (reg:SI 108)(unspec_volatile:SI [(match_dup 0)] 2720))(set (reg:SI 107)(unspec_volatile:SI [(match_dup 0)] 2722))(set (reg:SI 106)(unspec_volatile:SI [(match_dup 0)] 2724))(set (reg:SI 105)(unspec_volatile:SI [(match_dup 0)] 2726))(set (reg:SI 104)(unspec_volatile:SI [(match_dup 0)] 2728))]"CGEN_ENABLE_INSN_P (126)""cpsraia1\\t%0"[(set_attr "may_trap" "no")(set_attr "latency" "0")(set_attr "length" "4")(set_attr "slot" "cop")(set_attr "slots" "c3")(set_attr "stall" "none")])(define_insn "cgen_intrinsic_cpsraia1_1_p1"[(set (reg:SI 111)(unspec_volatile:SI [(match_operand:SI 0 "cgen_h_uint_5a1_immediate" "")] 2714))(set (reg:SI 110)(unspec_volatile:SI [(match_dup 0)] 2716))(set (reg:SI 109)(unspec_volatile:SI [(match_dup 0)] 2718))(set (reg:SI 108)(unspec_volatile:SI [(match_dup 0)] 2720))(set (reg:SI 107)(unspec_volatile:SI [(match_dup 0)] 2722))(set (reg:SI 106)(unspec_volatile:SI [(match_dup 0)] 2724))(set (reg:SI 105)(unspec_volatile:SI [(match_dup 0)] 2726))(set (reg:SI 104)(unspec_volatile:SI [(match_dup 0)] 2728))]"CGEN_ENABLE_INSN_P (127)""cpsraia1\\t%0"[(set_attr "may_trap" "no")(set_attr "latency" "0")(set_attr "length" "4")(set_attr "slot" "cop")(set_attr "slots" "p1")(set_attr "stall" "none")])(define_insn "cgen_intrinsic_cpsrlia1_P1"[(set (reg:SI 111)(unspec_volatile:SI [(match_operand:SI 0 "cgen_h_uint_5a1_immediate" "")] 2730))(set (reg:SI 110)(unspec_volatile:SI [(match_dup 0)] 2732))(set (reg:SI 109)(unspec_volatile:SI [(match_dup 0)] 2734))(set (reg:SI 108)(unspec_volatile:SI [(match_dup 0)] 2736))(set (reg:SI 107)(unspec_volatile:SI [(match_dup 0)] 2738))(set (reg:SI 106)(unspec_volatile:SI [(match_dup 0)] 2740))(set (reg:SI 105)(unspec_volatile:SI [(match_dup 0)] 2742))(set (reg:SI 104)(unspec_volatile:SI [(match_dup 0)] 2744))]"CGEN_ENABLE_INSN_P (128)""cpsrlia1\\t%0"[(set_attr "may_trap" "no")(set_attr "latency" "0")(set_attr "length" "4")(set_attr "slot" "cop")(set_attr "slots" "c3")(set_attr "stall" "none")])(define_insn "cgen_intrinsic_cpsrlia1_1_p1"[(set (reg:SI 111)(unspec_volatile:SI [(match_operand:SI 0 "cgen_h_uint_5a1_immediate" "")] 2730))(set (reg:SI 110)(unspec_volatile:SI [(match_dup 0)] 2732))(set (reg:SI 109)(unspec_volatile:SI [(match_dup 0)] 2734))(set (reg:SI 108)(unspec_volatile:SI [(match_dup 0)] 2736))(set (reg:SI 107)(unspec_volatile:SI [(match_dup 0)] 2738))(set (reg:SI 106)(unspec_volatile:SI [(match_dup 0)] 2740))(set (reg:SI 105)(unspec_volatile:SI [(match_dup 0)] 2742))(set (reg:SI 104)(unspec_volatile:SI [(match_dup 0)] 2744))]"CGEN_ENABLE_INSN_P (129)""cpsrlia1\\t%0"[(set_attr "may_trap" "no")(set_attr "latency" "0")(set_attr "length" "4")(set_attr "slot" "cop")(set_attr "slots" "p1")(set_attr "stall" "none")])(define_insn "cgen_intrinsic_cpslla1_C3"[(set (reg:SI 111)(unspec_volatile:SI [(match_operand:DI 0 "general_operand" "x")] 2746))(set (reg:SI 110)(unspec_volatile:SI [(match_dup 0)] 2748))(set (reg:SI 109)(unspec_volatile:SI [(match_dup 0)] 2750))(set (reg:SI 108)(unspec_volatile:SI [(match_dup 0)] 2752))(set (reg:SI 107)(unspec_volatile:SI [(match_dup 0)] 2754))(set (reg:SI 106)(unspec_volatile:SI [(match_dup 0)] 2756))(set (reg:SI 105)(unspec_volatile:SI [(match_dup 0)] 2758))(set (reg:SI 104)(unspec_volatile:SI [(match_dup 0)] 2760))]"CGEN_ENABLE_INSN_P (130)""cpslla1\\t%0"[(set_attr "may_trap" "no")(set_attr "latency" "0")(set_attr "length" "4")(set_attr "slot" "cop")(set_attr "slots" "c3")(set_attr "stall" "none")])(define_insn "cgen_intrinsic_cpslla1_P1"[(set (reg:SI 111)(unspec_volatile:SI [(match_operand:DI 0 "general_operand" "x")] 2746))(set (reg:SI 110)(unspec_volatile:SI [(match_dup 0)] 2748))(set (reg:SI 109)(unspec_volatile:SI [(match_dup 0)] 2750))(set (reg:SI 108)(unspec_volatile:SI [(match_dup 0)] 2752))(set (reg:SI 107)(unspec_volatile:SI [(match_dup 0)] 2754))(set (reg:SI 106)(unspec_volatile:SI [(match_dup 0)] 2756))(set (reg:SI 105)(unspec_volatile:SI [(match_dup 0)] 2758))(set (reg:SI 104)(unspec_volatile:SI [(match_dup 0)] 2760))]"CGEN_ENABLE_INSN_P (131)""cpslla1\\t%0"[(set_attr "may_trap" "no")(set_attr "latency" "0")(set_attr "length" "4")(set_attr "slot" "cop")(set_attr "slots" "p1")(set_attr "stall" "none")])(define_insn "cgen_intrinsic_cpsraa1_C3"[(set (reg:SI 111)(unspec_volatile:SI [(match_operand:DI 0 "general_operand" "x")] 2762))(set (reg:SI 110)(unspec_volatile:SI [(match_dup 0)] 2764))(set (reg:SI 109)(unspec_volatile:SI [(match_dup 0)] 2766))(set (reg:SI 108)(unspec_volatile:SI [(match_dup 0)] 2768))(set (reg:SI 107)(unspec_volatile:SI [(match_dup 0)] 2770))(set (reg:SI 106)(unspec_volatile:SI [(match_dup 0)] 2772))(set (reg:SI 105)(unspec_volatile:SI [(match_dup 0)] 2774))(set (reg:SI 104)(unspec_volatile:SI [(match_dup 0)] 2776))]"CGEN_ENABLE_INSN_P (132)""cpsraa1\\t%0"[(set_attr "may_trap" "no")(set_attr "latency" "0")(set_attr "length" "4")(set_attr "slot" "cop")(set_attr "slots" "c3")(set_attr "stall" "none")])(define_insn "cgen_intrinsic_cpsraa1_P1"[(set (reg:SI 111)(unspec_volatile:SI [(match_operand:DI 0 "general_operand" "x")] 2762))(set (reg:SI 110)(unspec_volatile:SI [(match_dup 0)] 2764))(set (reg:SI 109)(unspec_volatile:SI [(match_dup 0)] 2766))(set (reg:SI 108)(unspec_volatile:SI [(match_dup 0)] 2768))(set (reg:SI 107)(unspec_volatile:SI [(match_dup 0)] 2770))(set (reg:SI 106)(unspec_volatile:SI [(match_dup 0)] 2772))(set (reg:SI 105)(unspec_volatile:SI [(match_dup 0)] 2774))(set (reg:SI 104)(unspec_volatile:SI [(match_dup 0)] 2776))]"CGEN_ENABLE_INSN_P (133)""cpsraa1\\t%0"[(set_attr "may_trap" "no")(set_attr "latency" "0")(set_attr "length" "4")(set_attr "slot" "cop")(set_attr "slots" "p1")(set_attr "stall" "none")])(define_insn "cgen_intrinsic_cpsrla1_C3"[(set (reg:SI 111)(unspec_volatile:SI [(match_operand:DI 0 "general_operand" "x")] 2778))(set (reg:SI 110)(unspec_volatile:SI [(match_dup 0)] 2780))(set (reg:SI 109)(unspec_volatile:SI [(match_dup 0)] 2782))(set (reg:SI 108)(unspec_volatile:SI [(match_dup 0)] 2784))(set (reg:SI 107)(unspec_volatile:SI [(match_dup 0)] 2786))(set (reg:SI 106)(unspec_volatile:SI [(match_dup 0)] 2788))(set (reg:SI 105)(unspec_volatile:SI [(match_dup 0)] 2790))(set (reg:SI 104)(unspec_volatile:SI [(match_dup 0)] 2792))]"CGEN_ENABLE_INSN_P (134)""cpsrla1\\t%0"[(set_attr "may_trap" "no")(set_attr "latency" "0")(set_attr "length" "4")(set_attr "slot" "cop")(set_attr "slots" "c3")(set_attr "stall" "none")])(define_insn "cgen_intrinsic_cpsrla1_P1"[(set (reg:SI 111)(unspec_volatile:SI [(match_operand:DI 0 "general_operand" "x")] 2778))(set (reg:SI 110)(unspec_volatile:SI [(match_dup 0)] 2780))(set (reg:SI 109)(unspec_volatile:SI [(match_dup 0)] 2782))(set (reg:SI 108)(unspec_volatile:SI [(match_dup 0)] 2784))(set (reg:SI 107)(unspec_volatile:SI [(match_dup 0)] 2786))(set (reg:SI 106)(unspec_volatile:SI [(match_dup 0)] 2788))(set (reg:SI 105)(unspec_volatile:SI [(match_dup 0)] 2790))(set (reg:SI 104)(unspec_volatile:SI [(match_dup 0)] 2792))]"CGEN_ENABLE_INSN_P (135)""cpsrla1\\t%0"[(set_attr "may_trap" "no")(set_attr "latency" "0")(set_attr "length" "4")(set_attr "slot" "cop")(set_attr "slots" "p1")(set_attr "stall" "none")])(define_insn "cgen_intrinsic_cpacswp_P1"[(set (reg:SI 111)(unspec_volatile:SI [(const_int 0)] 1416))(set (reg:SI 110)(unspec_volatile:SI [(const_int 0)] 1418))(set (reg:SI 109)(unspec_volatile:SI [(const_int 0)] 1420))(set (reg:SI 108)(unspec_volatile:SI [(const_int 0)] 1422))(set (reg:SI 107)(unspec_volatile:SI [(const_int 0)] 1424))(set (reg:SI 106)(unspec_volatile:SI [(const_int 0)] 1426))(set (reg:SI 105)(unspec_volatile:SI [(const_int 0)] 1428))(set (reg:SI 104)(unspec_volatile:SI [(const_int 0)] 1430))(set (reg:SI 103)(unspec_volatile:SI [(const_int 0)] 1432))(set (reg:SI 102)(unspec_volatile:SI [(const_int 0)] 1434))(set (reg:SI 101)(unspec_volatile:SI [(const_int 0)] 1436))(set (reg:SI 100)(unspec_volatile:SI [(const_int 0)] 1438))(set (reg:SI 99)(unspec_volatile:SI [(const_int 0)] 1440))(set (reg:SI 98)(unspec_volatile:SI [(const_int 0)] 1442))(set (reg:SI 97)(unspec_volatile:SI [(const_int 0)] 1444))(set (reg:SI 96)(unspec_volatile:SI [(const_int 0)] 1446))]"CGEN_ENABLE_INSN_P (136)""cpacswp"[(set_attr "may_trap" "no")(set_attr "latency" "0")(set_attr "length" "4")(set_attr "slot" "cop")(set_attr "slots" "p1")(set_attr "stall" "none")])(define_insn "cgen_intrinsic_cpaccpa1_P1"[(set (reg:SI 111)(unspec_volatile:SI [(const_int 0)] 1448))(set (reg:SI 110)(unspec_volatile:SI [(const_int 0)] 1450))(set (reg:SI 109)(unspec_volatile:SI [(const_int 0)] 1452))(set (reg:SI 108)(unspec_volatile:SI [(const_int 0)] 1454))(set (reg:SI 107)(unspec_volatile:SI [(const_int 0)] 1456))(set (reg:SI 106)(unspec_volatile:SI [(const_int 0)] 1458))(set (reg:SI 105)(unspec_volatile:SI [(const_int 0)] 1460))(set (reg:SI 104)(unspec_volatile:SI [(const_int 0)] 1462))]"CGEN_ENABLE_INSN_P (137)""cpaccpa1"[(set_attr "may_trap" "no")(set_attr "latency" "0")(set_attr "length" "4")(set_attr "slot" "cop")(set_attr "slots" "p1")(set_attr "stall" "none")])(define_insn "cgen_intrinsic_cpacsuma1_P1"[(set (reg:SI 87)(unspec_volatile:SI [(const_int 0)] 1464))(set (reg:SI 111)(unspec_volatile:SI [(const_int 0)] 1466))(set (reg:SI 110)(unspec_volatile:SI [(const_int 0)] 1468))(set (reg:SI 109)(unspec_volatile:SI [(const_int 0)] 1470))(set (reg:SI 108)(unspec_volatile:SI [(const_int 0)] 1472))(set (reg:SI 107)(unspec_volatile:SI [(const_int 0)] 1474))(set (reg:SI 106)(unspec_volatile:SI [(const_int 0)] 1476))(set (reg:SI 105)(unspec_volatile:SI [(const_int 0)] 1478))(set (reg:SI 104)(unspec_volatile:SI [(const_int 0)] 1480))]"CGEN_ENABLE_INSN_P (138)""cpacsuma1"[(set_attr "may_trap" "no")(set_attr "latency" "0")(set_attr "length" "4")(set_attr "slot" "cop")(set_attr "slots" "p1")(set_attr "stall" "none")])(define_insn "cgen_intrinsic_cpmovhla1_w_C3"[(set (match_operand:DI 0 "nonimmediate_operand" "=x")(unspec_volatile:DI [(const_int 0)] 2794))]"CGEN_ENABLE_INSN_P (139)""cpmovhla1.w\\t%0"[(set_attr "may_trap" "no")(set_attr "latency" "0")(set_attr "length" "4")(set_attr "slot" "cop")(set_attr "slots" "c3")(set_attr "stall" "none")])(define_insn "cgen_intrinsic_cpmovhla1_w_P1"[(set (match_operand:DI 0 "nonimmediate_operand" "=x")(unspec_volatile:DI [(const_int 0)] 2794))]"CGEN_ENABLE_INSN_P (140)""cpmovhla1.w\\t%0"[(set_attr "may_trap" "no")(set_attr "latency" "0")(set_attr "length" "4")(set_attr "slot" "cop")(set_attr "slots" "p1")(set_attr "stall" "none")])(define_insn "cgen_intrinsic_cpmovhua1_w_C3"[(set (match_operand:DI 0 "nonimmediate_operand" "=x")(unspec_volatile:DI [(const_int 0)] 2796))]"CGEN_ENABLE_INSN_P (141)""cpmovhua1.w\\t%0"[(set_attr "may_trap" "no")(set_attr "latency" "0")(set_attr "length" "4")(set_attr "slot" "cop")(set_attr "slots" "c3")(set_attr "stall" "none")])(define_insn "cgen_intrinsic_cpmovhua1_w_P1"[(set (match_operand:DI 0 "nonimmediate_operand" "=x")(unspec_volatile:DI [(const_int 0)] 2796))]"CGEN_ENABLE_INSN_P (142)""cpmovhua1.w\\t%0"[(set_attr "may_trap" "no")(set_attr "latency" "0")(set_attr "length" "4")(set_attr "slot" "cop")(set_attr "slots" "p1")(set_attr "stall" "none")])(define_insn "cgen_intrinsic_cppackla1_w_C3"[(set (match_operand:DI 0 "nonimmediate_operand" "=x")(unspec_volatile:DI [(const_int 0)] 2798))]"CGEN_ENABLE_INSN_P (143)""cppackla1.w\\t%0"[(set_attr "may_trap" "no")(set_attr "latency" "0")(set_attr "length" "4")(set_attr "slot" "cop")(set_attr "slots" "c3")(set_attr "stall" "none")])(define_insn "cgen_intrinsic_cppackla1_w_P1"[(set (match_operand:DI 0 "nonimmediate_operand" "=x")(unspec_volatile:DI [(const_int 0)] 2798))]"CGEN_ENABLE_INSN_P (144)""cppackla1.w\\t%0"[(set_attr "may_trap" "no")(set_attr "latency" "0")(set_attr "length" "4")(set_attr "slot" "cop")(set_attr "slots" "p1")(set_attr "stall" "none")])(define_insn "cgen_intrinsic_cppackua1_w_C3"[(set (match_operand:DI 0 "nonimmediate_operand" "=x")(unspec_volatile:DI [(const_int 0)] 2800))]"CGEN_ENABLE_INSN_P (145)""cppackua1.w\\t%0"[(set_attr "may_trap" "no")(set_attr "latency" "0")(set_attr "length" "4")(set_attr "slot" "cop")(set_attr "slots" "c3")(set_attr "stall" "none")])(define_insn "cgen_intrinsic_cppackua1_w_P1"[(set (match_operand:DI 0 "nonimmediate_operand" "=x")(unspec_volatile:DI [(const_int 0)] 2800))]"CGEN_ENABLE_INSN_P (146)""cppackua1.w\\t%0"[(set_attr "may_trap" "no")(set_attr "latency" "0")(set_attr "length" "4")(set_attr "slot" "cop")(set_attr "slots" "p1")(set_attr "stall" "none")])(define_insn "cgen_intrinsic_cppackla1_h_C3"[(set (match_operand:DI 0 "nonimmediate_operand" "=x")(unspec_volatile:DI [(const_int 0)] 2802))]"CGEN_ENABLE_INSN_P (147)""cppackla1.h\\t%0"[(set_attr "may_trap" "no")(set_attr "latency" "0")(set_attr "length" "4")(set_attr "slot" "cop")(set_attr "slots" "c3")(set_attr "stall" "none")])(define_insn "cgen_intrinsic_cppackla1_h_P1"[(set (match_operand:DI 0 "nonimmediate_operand" "=x")(unspec_volatile:DI [(const_int 0)] 2802))]"CGEN_ENABLE_INSN_P (148)""cppackla1.h\\t%0"[(set_attr "may_trap" "no")(set_attr "latency" "0")(set_attr "length" "4")(set_attr "slot" "cop")(set_attr "slots" "p1")(set_attr "stall" "none")])(define_insn "cgen_intrinsic_cppackua1_h_C3"[(set (match_operand:DI 0 "nonimmediate_operand" "=x")(unspec_volatile:DI [(const_int 0)] 2804))]"CGEN_ENABLE_INSN_P (149)""cppackua1.h\\t%0"[(set_attr "may_trap" "no")(set_attr "latency" "0")(set_attr "length" "4")(set_attr "slot" "cop")(set_attr "slots" "c3")(set_attr "stall" "none")])(define_insn "cgen_intrinsic_cppackua1_h_P1"[(set (match_operand:DI 0 "nonimmediate_operand" "=x")(unspec_volatile:DI [(const_int 0)] 2804))]"CGEN_ENABLE_INSN_P (150)""cppackua1.h\\t%0"[(set_attr "may_trap" "no")(set_attr "latency" "0")(set_attr "length" "4")(set_attr "slot" "cop")(set_attr "slots" "p1")(set_attr "stall" "none")])(define_insn "cgen_intrinsic_cppacka1_b_C3"[(set (match_operand:DI 0 "nonimmediate_operand" "=x")(unspec_volatile:DI [(const_int 0)] 2806))]"CGEN_ENABLE_INSN_P (151)""cppacka1.b\\t%0"[(set_attr "may_trap" "no")(set_attr "latency" "0")(set_attr "length" "4")(set_attr "slot" "cop")(set_attr "slots" "c3")(set_attr "stall" "none")])(define_insn "cgen_intrinsic_cppacka1_b_P1"[(set (match_operand:DI 0 "nonimmediate_operand" "=x")(unspec_volatile:DI [(const_int 0)] 2806))]"CGEN_ENABLE_INSN_P (152)""cppacka1.b\\t%0"[(set_attr "may_trap" "no")(set_attr "latency" "0")(set_attr "length" "4")(set_attr "slot" "cop")(set_attr "slots" "p1")(set_attr "stall" "none")])(define_insn "cgen_intrinsic_cppacka1u_b_C3"[(set (match_operand:DI 0 "nonimmediate_operand" "=x")(unspec_volatile:DI [(const_int 0)] 2808))]"CGEN_ENABLE_INSN_P (153)""cppacka1u.b\\t%0"[(set_attr "may_trap" "no")(set_attr "latency" "0")(set_attr "length" "4")(set_attr "slot" "cop")(set_attr "slots" "c3")(set_attr "stall" "none")])(define_insn "cgen_intrinsic_cppacka1u_b_P1"[(set (match_operand:DI 0 "nonimmediate_operand" "=x")(unspec_volatile:DI [(const_int 0)] 2808))]"CGEN_ENABLE_INSN_P (154)""cppacka1u.b\\t%0"[(set_attr "may_trap" "no")(set_attr "latency" "0")(set_attr "length" "4")(set_attr "slot" "cop")(set_attr "slots" "p1")(set_attr "stall" "none")])(define_insn "cgen_intrinsic_cpmovlla1_w_C3"[(set (match_operand:DI 0 "nonimmediate_operand" "=x")(unspec_volatile:DI [(const_int 0)] 2810))]"CGEN_ENABLE_INSN_P (155)""cpmovlla1.w\\t%0"[(set_attr "may_trap" "no")(set_attr "latency" "0")(set_attr "length" "4")(set_attr "slot" "cop")(set_attr "slots" "c3")(set_attr "stall" "none")])(define_insn "cgen_intrinsic_cpmovlla1_w_P1"[(set (match_operand:DI 0 "nonimmediate_operand" "=x")(unspec_volatile:DI [(const_int 0)] 2810))]"CGEN_ENABLE_INSN_P (156)""cpmovlla1.w\\t%0"[(set_attr "may_trap" "no")(set_attr "latency" "0")(set_attr "length" "4")(set_attr "slot" "cop")(set_attr "slots" "p1")(set_attr "stall" "none")])(define_insn "cgen_intrinsic_cpmovlua1_w_C3"[(set (match_operand:DI 0 "nonimmediate_operand" "=x")(unspec_volatile:DI [(const_int 0)] 2812))]"CGEN_ENABLE_INSN_P (157)""cpmovlua1.w\\t%0"[(set_attr "may_trap" "no")(set_attr "latency" "0")(set_attr "length" "4")(set_attr "slot" "cop")(set_attr "slots" "c3")(set_attr "stall" "none")])(define_insn "cgen_intrinsic_cpmovlua1_w_P1"[(set (match_operand:DI 0 "nonimmediate_operand" "=x")(unspec_volatile:DI [(const_int 0)] 2812))]"CGEN_ENABLE_INSN_P (158)""cpmovlua1.w\\t%0"[(set_attr "may_trap" "no")(set_attr "latency" "0")(set_attr "length" "4")(set_attr "slot" "cop")(set_attr "slots" "p1")(set_attr "stall" "none")])(define_insn "cgen_intrinsic_cpmovula1_w_C3"[(set (match_operand:DI 0 "nonimmediate_operand" "=x")(unspec_volatile:DI [(const_int 0)] 2814))]"CGEN_ENABLE_INSN_P (159)""cpmovula1.w\\t%0"[(set_attr "may_trap" "no")(set_attr "latency" "0")(set_attr "length" "4")(set_attr "slot" "cop")(set_attr "slots" "c3")(set_attr "stall" "none")])(define_insn "cgen_intrinsic_cpmovula1_w_P1"[(set (match_operand:DI 0 "nonimmediate_operand" "=x")(unspec_volatile:DI [(const_int 0)] 2814))]"CGEN_ENABLE_INSN_P (160)""cpmovula1.w\\t%0"[(set_attr "may_trap" "no")(set_attr "latency" "0")(set_attr "length" "4")(set_attr "slot" "cop")(set_attr "slots" "p1")(set_attr "stall" "none")])(define_insn "cgen_intrinsic_cpmovuua1_w_C3"[(set (match_operand:DI 0 "nonimmediate_operand" "=x")(unspec_volatile:DI [(const_int 0)] 2816))]"CGEN_ENABLE_INSN_P (161)""cpmovuua1.w\\t%0"[(set_attr "may_trap" "no")(set_attr "latency" "0")(set_attr "length" "4")(set_attr "slot" "cop")(set_attr "slots" "c3")(set_attr "stall" "none")])(define_insn "cgen_intrinsic_cpmovuua1_w_P1"[(set (match_operand:DI 0 "nonimmediate_operand" "=x")(unspec_volatile:DI [(const_int 0)] 2816))]"CGEN_ENABLE_INSN_P (162)""cpmovuua1.w\\t%0"[(set_attr "may_trap" "no")(set_attr "latency" "0")(set_attr "length" "4")(set_attr "slot" "cop")(set_attr "slots" "p1")(set_attr "stall" "none")])(define_insn "cgen_intrinsic_cpmovla1_h_C3"[(set (match_operand:DI 0 "nonimmediate_operand" "=x")(unspec_volatile:DI [(const_int 0)] 2818))]"CGEN_ENABLE_INSN_P (163)""cpmovla1.h\\t%0"[(set_attr "may_trap" "no")(set_attr "latency" "0")(set_attr "length" "4")(set_attr "slot" "cop")(set_attr "slots" "c3")(set_attr "stall" "none")])(define_insn "cgen_intrinsic_cpmovla1_h_P1"[(set (match_operand:DI 0 "nonimmediate_operand" "=x")(unspec_volatile:DI [(const_int 0)] 2818))]"CGEN_ENABLE_INSN_P (164)""cpmovla1.h\\t%0"[(set_attr "may_trap" "no")(set_attr "latency" "0")(set_attr "length" "4")(set_attr "slot" "cop")(set_attr "slots" "p1")(set_attr "stall" "none")])(define_insn "cgen_intrinsic_cpmovua1_h_C3"[(set (match_operand:DI 0 "nonimmediate_operand" "=x")(unspec_volatile:DI [(const_int 0)] 2820))]"CGEN_ENABLE_INSN_P (165)""cpmovua1.h\\t%0"[(set_attr "may_trap" "no")(set_attr "latency" "0")(set_attr "length" "4")(set_attr "slot" "cop")(set_attr "slots" "c3")(set_attr "stall" "none")])(define_insn "cgen_intrinsic_cpmovua1_h_P1"[(set (match_operand:DI 0 "nonimmediate_operand" "=x")(unspec_volatile:DI [(const_int 0)] 2820))]"CGEN_ENABLE_INSN_P (166)""cpmovua1.h\\t%0"[(set_attr "may_trap" "no")(set_attr "latency" "0")(set_attr "length" "4")(set_attr "slot" "cop")(set_attr "slots" "p1")(set_attr "stall" "none")])(define_insn "cgen_intrinsic_cpmova1_b_C3"[(set (match_operand:DI 0 "nonimmediate_operand" "=x")(unspec_volatile:DI [(const_int 0)] 2822))]"CGEN_ENABLE_INSN_P (167)""cpmova1.b\\t%0"[(set_attr "may_trap" "no")(set_attr "latency" "0")(set_attr "length" "4")(set_attr "slot" "cop")(set_attr "slots" "c3")(set_attr "stall" "none")])(define_insn "cgen_intrinsic_cpmova1_b_P1"[(set (match_operand:DI 0 "nonimmediate_operand" "=x")(unspec_volatile:DI [(const_int 0)] 2822))]"CGEN_ENABLE_INSN_P (168)""cpmova1.b\\t%0"[(set_attr "may_trap" "no")(set_attr "latency" "0")(set_attr "length" "4")(set_attr "slot" "cop")(set_attr "slots" "p1")(set_attr "stall" "none")])(define_insn "cgen_intrinsic_cpsetla1_w_C3"[(set (reg:SI 107)(unspec_volatile:SI [(match_operand:DI 0 "general_operand" "x")(match_operand:DI 1 "general_operand" "x")] 2824))(set (reg:SI 106)(unspec_volatile:SI [(match_dup 0)(match_dup 1)] 2826))(set (reg:SI 105)(unspec_volatile:SI [(match_dup 0)(match_dup 1)] 2828))(set (reg:SI 104)(unspec_volatile:SI [(match_dup 0)(match_dup 1)] 2830))]"CGEN_ENABLE_INSN_P (169)""cpsetla1.w\\t%0,%1"[(set_attr "may_trap" "no")(set_attr "latency" "0")(set_attr "length" "4")(set_attr "slot" "cop")(set_attr "slots" "c3")(set_attr "stall" "none")])(define_insn "cgen_intrinsic_cpsetla1_w_P1"[(set (reg:SI 107)(unspec_volatile:SI [(match_operand:DI 0 "general_operand" "x")(match_operand:DI 1 "general_operand" "x")] 2824))(set (reg:SI 106)(unspec_volatile:SI [(match_dup 0)(match_dup 1)] 2826))(set (reg:SI 105)(unspec_volatile:SI [(match_dup 0)(match_dup 1)] 2828))(set (reg:SI 104)(unspec_volatile:SI [(match_dup 0)(match_dup 1)] 2830))]"CGEN_ENABLE_INSN_P (170)""cpsetla1.w\\t%0,%1"[(set_attr "may_trap" "no")(set_attr "latency" "0")(set_attr "length" "4")(set_attr "slot" "cop")(set_attr "slots" "p1")(set_attr "stall" "none")])(define_insn "cgen_intrinsic_cpsetua1_w_C3"[(set (reg:SI 111)(unspec_volatile:SI [(match_operand:DI 0 "general_operand" "x")(match_operand:DI 1 "general_operand" "x")] 2832))(set (reg:SI 110)(unspec_volatile:SI [(match_dup 0)(match_dup 1)] 2834))(set (reg:SI 109)(unspec_volatile:SI [(match_dup 0)(match_dup 1)] 2836))(set (reg:SI 108)(unspec_volatile:SI [(match_dup 0)(match_dup 1)] 2838))]"CGEN_ENABLE_INSN_P (171)""cpsetua1.w\\t%0,%1"[(set_attr "may_trap" "no")(set_attr "latency" "0")(set_attr "length" "4")(set_attr "slot" "cop")(set_attr "slots" "c3")(set_attr "stall" "none")])(define_insn "cgen_intrinsic_cpsetua1_w_P1"[(set (reg:SI 111)(unspec_volatile:SI [(match_operand:DI 0 "general_operand" "x")(match_operand:DI 1 "general_operand" "x")] 2832))(set (reg:SI 110)(unspec_volatile:SI [(match_dup 0)(match_dup 1)] 2834))(set (reg:SI 109)(unspec_volatile:SI [(match_dup 0)(match_dup 1)] 2836))(set (reg:SI 108)(unspec_volatile:SI [(match_dup 0)(match_dup 1)] 2838))]"CGEN_ENABLE_INSN_P (172)""cpsetua1.w\\t%0,%1"[(set_attr "may_trap" "no")(set_attr "latency" "0")(set_attr "length" "4")(set_attr "slot" "cop")(set_attr "slots" "p1")(set_attr "stall" "none")])(define_insn "cgen_intrinsic_cpseta1_h_C3"[(set (reg:SI 111)(unspec_volatile:SI [(match_operand:DI 0 "general_operand" "x")(match_operand:DI 1 "general_operand" "x")] 2840))(set (reg:SI 110)(unspec_volatile:SI [(match_dup 0)(match_dup 1)] 2842))(set (reg:SI 109)(unspec_volatile:SI [(match_dup 0)(match_dup 1)] 2844))(set (reg:SI 108)(unspec_volatile:SI [(match_dup 0)(match_dup 1)] 2846))(set (reg:SI 107)(unspec_volatile:SI [(match_dup 0)(match_dup 1)] 2848))(set (reg:SI 106)(unspec_volatile:SI [(match_dup 0)(match_dup 1)] 2850))(set (reg:SI 105)(unspec_volatile:SI [(match_dup 0)(match_dup 1)] 2852))(set (reg:SI 104)(unspec_volatile:SI [(match_dup 0)(match_dup 1)] 2854))]"CGEN_ENABLE_INSN_P (173)""cpseta1.h\\t%0,%1"[(set_attr "may_trap" "no")(set_attr "latency" "0")(set_attr "length" "4")(set_attr "slot" "cop")(set_attr "slots" "c3")(set_attr "stall" "none")])(define_insn "cgen_intrinsic_cpseta1_h_P1"[(set (reg:SI 111)(unspec_volatile:SI [(match_operand:DI 0 "general_operand" "x")(match_operand:DI 1 "general_operand" "x")] 2840))(set (reg:SI 110)(unspec_volatile:SI [(match_dup 0)(match_dup 1)] 2842))(set (reg:SI 109)(unspec_volatile:SI [(match_dup 0)(match_dup 1)] 2844))(set (reg:SI 108)(unspec_volatile:SI [(match_dup 0)(match_dup 1)] 2846))(set (reg:SI 107)(unspec_volatile:SI [(match_dup 0)(match_dup 1)] 2848))(set (reg:SI 106)(unspec_volatile:SI [(match_dup 0)(match_dup 1)] 2850))(set (reg:SI 105)(unspec_volatile:SI [(match_dup 0)(match_dup 1)] 2852))(set (reg:SI 104)(unspec_volatile:SI [(match_dup 0)(match_dup 1)] 2854))]"CGEN_ENABLE_INSN_P (174)""cpseta1.h\\t%0,%1"[(set_attr "may_trap" "no")(set_attr "latency" "0")(set_attr "length" "4")(set_attr "slot" "cop")(set_attr "slots" "p1")(set_attr "stall" "none")])(define_insn "cgen_intrinsic_cpsadla1_h_C3"[(set (reg:SI 87)(unspec_volatile:SI [(match_operand:DI 0 "general_operand" "x")(match_operand:DI 1 "general_operand" "x")] 2856))(set (reg:SI 107)(unspec_volatile:SI [(match_dup 0)(match_dup 1)] 2858))(set (reg:SI 106)(unspec_volatile:SI [(match_dup 0)(match_dup 1)] 2860))(set (reg:SI 105)(unspec_volatile:SI [(match_dup 0)(match_dup 1)] 2862))(set (reg:SI 104)(unspec_volatile:SI [(match_dup 0)(match_dup 1)] 2864))]"CGEN_ENABLE_INSN_P (175)""cpsadla1.h\\t%0,%1"[(set_attr "may_trap" "no")(set_attr "latency" "0")(set_attr "length" "4")(set_attr "slot" "cop")(set_attr "slots" "c3")(set_attr "stall" "none")])(define_insn "cgen_intrinsic_cpsadla1_h_P1"[(set (reg:SI 87)(unspec_volatile:SI [(match_operand:DI 0 "general_operand" "x")(match_operand:DI 1 "general_operand" "x")] 2856))(set (reg:SI 107)(unspec_volatile:SI [(match_dup 0)(match_dup 1)] 2858))(set (reg:SI 106)(unspec_volatile:SI [(match_dup 0)(match_dup 1)] 2860))(set (reg:SI 105)(unspec_volatile:SI [(match_dup 0)(match_dup 1)] 2862))(set (reg:SI 104)(unspec_volatile:SI [(match_dup 0)(match_dup 1)] 2864))]"CGEN_ENABLE_INSN_P (176)""cpsadla1.h\\t%0,%1"[(set_attr "may_trap" "no")(set_attr "latency" "0")(set_attr "length" "4")(set_attr "slot" "cop")(set_attr "slots" "p1")(set_attr "stall" "none")])(define_insn "cgen_intrinsic_cpsadua1_h_C3"[(set (reg:SI 87)(unspec_volatile:SI [(match_operand:DI 0 "general_operand" "x")(match_operand:DI 1 "general_operand" "x")] 2866))(set (reg:SI 111)(unspec_volatile:SI [(match_dup 0)(match_dup 1)] 2868))(set (reg:SI 110)(unspec_volatile:SI [(match_dup 0)(match_dup 1)] 2870))(set (reg:SI 109)(unspec_volatile:SI [(match_dup 0)(match_dup 1)] 2872))(set (reg:SI 108)(unspec_volatile:SI [(match_dup 0)(match_dup 1)] 2874))]"CGEN_ENABLE_INSN_P (177)""cpsadua1.h\\t%0,%1"[(set_attr "may_trap" "no")(set_attr "latency" "0")(set_attr "length" "4")(set_attr "slot" "cop")(set_attr "slots" "c3")(set_attr "stall" "none")])(define_insn "cgen_intrinsic_cpsadua1_h_P1"[(set (reg:SI 87)(unspec_volatile:SI [(match_operand:DI 0 "general_operand" "x")(match_operand:DI 1 "general_operand" "x")] 2866))(set (reg:SI 111)(unspec_volatile:SI [(match_dup 0)(match_dup 1)] 2868))(set (reg:SI 110)(unspec_volatile:SI [(match_dup 0)(match_dup 1)] 2870))(set (reg:SI 109)(unspec_volatile:SI [(match_dup 0)(match_dup 1)] 2872))(set (reg:SI 108)(unspec_volatile:SI [(match_dup 0)(match_dup 1)] 2874))]"CGEN_ENABLE_INSN_P (178)""cpsadua1.h\\t%0,%1"[(set_attr "may_trap" "no")(set_attr "latency" "0")(set_attr "length" "4")(set_attr "slot" "cop")(set_attr "slots" "p1")(set_attr "stall" "none")])(define_insn "cgen_intrinsic_cpsada1_b_C3"[(set (reg:SI 87)(unspec_volatile:SI [(match_operand:DI 0 "general_operand" "x")(match_operand:DI 1 "general_operand" "x")] 2876))(set (reg:SI 111)(unspec_volatile:SI [(match_dup 0)(match_dup 1)] 2878))(set (reg:SI 110)(unspec_volatile:SI [(match_dup 0)(match_dup 1)] 2880))(set (reg:SI 109)(unspec_volatile:SI [(match_dup 0)(match_dup 1)] 2882))(set (reg:SI 108)(unspec_volatile:SI [(match_dup 0)(match_dup 1)] 2884))(set (reg:SI 107)(unspec_volatile:SI [(match_dup 0)(match_dup 1)] 2886))(set (reg:SI 106)(unspec_volatile:SI [(match_dup 0)(match_dup 1)] 2888))(set (reg:SI 105)(unspec_volatile:SI [(match_dup 0)(match_dup 1)] 2890))(set (reg:SI 104)(unspec_volatile:SI [(match_dup 0)(match_dup 1)] 2892))]"CGEN_ENABLE_INSN_P (179)""cpsada1.b\\t%0,%1"[(set_attr "may_trap" "no")(set_attr "latency" "0")(set_attr "length" "4")(set_attr "slot" "cop")(set_attr "slots" "c3")(set_attr "stall" "none")])(define_insn "cgen_intrinsic_cpsada1_b_P1"[(set (reg:SI 87)(unspec_volatile:SI [(match_operand:DI 0 "general_operand" "x")(match_operand:DI 1 "general_operand" "x")] 2876))(set (reg:SI 111)(unspec_volatile:SI [(match_dup 0)(match_dup 1)] 2878))(set (reg:SI 110)(unspec_volatile:SI [(match_dup 0)(match_dup 1)] 2880))(set (reg:SI 109)(unspec_volatile:SI [(match_dup 0)(match_dup 1)] 2882))(set (reg:SI 108)(unspec_volatile:SI [(match_dup 0)(match_dup 1)] 2884))(set (reg:SI 107)(unspec_volatile:SI [(match_dup 0)(match_dup 1)] 2886))(set (reg:SI 106)(unspec_volatile:SI [(match_dup 0)(match_dup 1)] 2888))(set (reg:SI 105)(unspec_volatile:SI [(match_dup 0)(match_dup 1)] 2890))(set (reg:SI 104)(unspec_volatile:SI [(match_dup 0)(match_dup 1)] 2892))]"CGEN_ENABLE_INSN_P (180)""cpsada1.b\\t%0,%1"[(set_attr "may_trap" "no")(set_attr "latency" "0")(set_attr "length" "4")(set_attr "slot" "cop")(set_attr "slots" "p1")(set_attr "stall" "none")])(define_insn "cgen_intrinsic_cpsada1u_b_C3"[(set (reg:SI 87)(unspec_volatile:SI [(match_operand:DI 0 "general_operand" "x")(match_operand:DI 1 "general_operand" "x")] 2894))(set (reg:SI 111)(unspec_volatile:SI [(match_dup 0)(match_dup 1)] 2896))(set (reg:SI 110)(unspec_volatile:SI [(match_dup 0)(match_dup 1)] 2898))(set (reg:SI 109)(unspec_volatile:SI [(match_dup 0)(match_dup 1)] 2900))(set (reg:SI 108)(unspec_volatile:SI [(match_dup 0)(match_dup 1)] 2902))(set (reg:SI 107)(unspec_volatile:SI [(match_dup 0)(match_dup 1)] 2904))(set (reg:SI 106)(unspec_volatile:SI [(match_dup 0)(match_dup 1)] 2906))(set (reg:SI 105)(unspec_volatile:SI [(match_dup 0)(match_dup 1)] 2908))(set (reg:SI 104)(unspec_volatile:SI [(match_dup 0)(match_dup 1)] 2910))]"CGEN_ENABLE_INSN_P (181)""cpsada1u.b\\t%0,%1"[(set_attr "may_trap" "no")(set_attr "latency" "0")(set_attr "length" "4")(set_attr "slot" "cop")(set_attr "slots" "c3")(set_attr "stall" "none")])(define_insn "cgen_intrinsic_cpsada1u_b_P1"[(set (reg:SI 87)(unspec_volatile:SI [(match_operand:DI 0 "general_operand" "x")(match_operand:DI 1 "general_operand" "x")] 2894))(set (reg:SI 111)(unspec_volatile:SI [(match_dup 0)(match_dup 1)] 2896))(set (reg:SI 110)(unspec_volatile:SI [(match_dup 0)(match_dup 1)] 2898))(set (reg:SI 109)(unspec_volatile:SI [(match_dup 0)(match_dup 1)] 2900))(set (reg:SI 108)(unspec_volatile:SI [(match_dup 0)(match_dup 1)] 2902))(set (reg:SI 107)(unspec_volatile:SI [(match_dup 0)(match_dup 1)] 2904))(set (reg:SI 106)(unspec_volatile:SI [(match_dup 0)(match_dup 1)] 2906))(set (reg:SI 105)(unspec_volatile:SI [(match_dup 0)(match_dup 1)] 2908))(set (reg:SI 104)(unspec_volatile:SI [(match_dup 0)(match_dup 1)] 2910))]"CGEN_ENABLE_INSN_P (182)""cpsada1u.b\\t%0,%1"[(set_attr "may_trap" "no")(set_attr "latency" "0")(set_attr "length" "4")(set_attr "slot" "cop")(set_attr "slots" "p1")(set_attr "stall" "none")])(define_insn "cgen_intrinsic_cpabsla1_h_C3"[(set (reg:SI 107)(unspec_volatile:SI [(match_operand:DI 0 "general_operand" "x")(match_operand:DI 1 "general_operand" "x")] 2912))(set (reg:SI 106)(unspec_volatile:SI [(match_dup 0)(match_dup 1)] 2914))(set (reg:SI 105)(unspec_volatile:SI [(match_dup 0)(match_dup 1)] 2916))(set (reg:SI 104)(unspec_volatile:SI [(match_dup 0)(match_dup 1)] 2918))]"CGEN_ENABLE_INSN_P (183)""cpabsla1.h\\t%0,%1"[(set_attr "may_trap" "no")(set_attr "latency" "0")(set_attr "length" "4")(set_attr "slot" "cop")(set_attr "slots" "c3")(set_attr "stall" "none")])(define_insn "cgen_intrinsic_cpabsla1_h_P1"[(set (reg:SI 107)(unspec_volatile:SI [(match_operand:DI 0 "general_operand" "x")(match_operand:DI 1 "general_operand" "x")] 2912))(set (reg:SI 106)(unspec_volatile:SI [(match_dup 0)(match_dup 1)] 2914))(set (reg:SI 105)(unspec_volatile:SI [(match_dup 0)(match_dup 1)] 2916))(set (reg:SI 104)(unspec_volatile:SI [(match_dup 0)(match_dup 1)] 2918))]"CGEN_ENABLE_INSN_P (184)""cpabsla1.h\\t%0,%1"[(set_attr "may_trap" "no")(set_attr "latency" "0")(set_attr "length" "4")(set_attr "slot" "cop")(set_attr "slots" "p1")(set_attr "stall" "none")])(define_insn "cgen_intrinsic_cpabsua1_h_C3"[(set (reg:SI 111)(unspec_volatile:SI [(match_operand:DI 0 "general_operand" "x")(match_operand:DI 1 "general_operand" "x")] 2920))(set (reg:SI 110)(unspec_volatile:SI [(match_dup 0)(match_dup 1)] 2922))(set (reg:SI 109)(unspec_volatile:SI [(match_dup 0)(match_dup 1)] 2924))(set (reg:SI 108)(unspec_volatile:SI [(match_dup 0)(match_dup 1)] 2926))]"CGEN_ENABLE_INSN_P (185)""cpabsua1.h\\t%0,%1"[(set_attr "may_trap" "no")(set_attr "latency" "0")(set_attr "length" "4")(set_attr "slot" "cop")(set_attr "slots" "c3")(set_attr "stall" "none")])(define_insn "cgen_intrinsic_cpabsua1_h_P1"[(set (reg:SI 111)(unspec_volatile:SI [(match_operand:DI 0 "general_operand" "x")(match_operand:DI 1 "general_operand" "x")] 2920))(set (reg:SI 110)(unspec_volatile:SI [(match_dup 0)(match_dup 1)] 2922))(set (reg:SI 109)(unspec_volatile:SI [(match_dup 0)(match_dup 1)] 2924))(set (reg:SI 108)(unspec_volatile:SI [(match_dup 0)(match_dup 1)] 2926))]"CGEN_ENABLE_INSN_P (186)""cpabsua1.h\\t%0,%1"[(set_attr "may_trap" "no")(set_attr "latency" "0")(set_attr "length" "4")(set_attr "slot" "cop")(set_attr "slots" "p1")(set_attr "stall" "none")])(define_insn "cgen_intrinsic_cpabsa1_b_C3"[(set (reg:SI 111)(unspec_volatile:SI [(match_operand:DI 0 "general_operand" "x")(match_operand:DI 1 "general_operand" "x")] 2928))(set (reg:SI 110)(unspec_volatile:SI [(match_dup 0)(match_dup 1)] 2930))(set (reg:SI 109)(unspec_volatile:SI [(match_dup 0)(match_dup 1)] 2932))(set (reg:SI 108)(unspec_volatile:SI [(match_dup 0)(match_dup 1)] 2934))(set (reg:SI 107)(unspec_volatile:SI [(match_dup 0)(match_dup 1)] 2936))(set (reg:SI 106)(unspec_volatile:SI [(match_dup 0)(match_dup 1)] 2938))(set (reg:SI 105)(unspec_volatile:SI [(match_dup 0)(match_dup 1)] 2940))(set (reg:SI 104)(unspec_volatile:SI [(match_dup 0)(match_dup 1)] 2942))]"CGEN_ENABLE_INSN_P (187)""cpabsa1.b\\t%0,%1"[(set_attr "may_trap" "no")(set_attr "latency" "0")(set_attr "length" "4")(set_attr "slot" "cop")(set_attr "slots" "c3")(set_attr "stall" "none")])(define_insn "cgen_intrinsic_cpabsa1_b_P1"[(set (reg:SI 111)(unspec_volatile:SI [(match_operand:DI 0 "general_operand" "x")(match_operand:DI 1 "general_operand" "x")] 2928))(set (reg:SI 110)(unspec_volatile:SI [(match_dup 0)(match_dup 1)] 2930))(set (reg:SI 109)(unspec_volatile:SI [(match_dup 0)(match_dup 1)] 2932))(set (reg:SI 108)(unspec_volatile:SI [(match_dup 0)(match_dup 1)] 2934))(set (reg:SI 107)(unspec_volatile:SI [(match_dup 0)(match_dup 1)] 2936))(set (reg:SI 106)(unspec_volatile:SI [(match_dup 0)(match_dup 1)] 2938))(set (reg:SI 105)(unspec_volatile:SI [(match_dup 0)(match_dup 1)] 2940))(set (reg:SI 104)(unspec_volatile:SI [(match_dup 0)(match_dup 1)] 2942))]"CGEN_ENABLE_INSN_P (188)""cpabsa1.b\\t%0,%1"[(set_attr "may_trap" "no")(set_attr "latency" "0")(set_attr "length" "4")(set_attr "slot" "cop")(set_attr "slots" "p1")(set_attr "stall" "none")])(define_insn "cgen_intrinsic_cpabsa1u_b_C3"[(set (reg:SI 111)(unspec_volatile:SI [(match_operand:DI 0 "general_operand" "x")(match_operand:DI 1 "general_operand" "x")] 2944))(set (reg:SI 110)(unspec_volatile:SI [(match_dup 0)(match_dup 1)] 2946))(set (reg:SI 109)(unspec_volatile:SI [(match_dup 0)(match_dup 1)] 2948))(set (reg:SI 108)(unspec_volatile:SI [(match_dup 0)(match_dup 1)] 2950))(set (reg:SI 107)(unspec_volatile:SI [(match_dup 0)(match_dup 1)] 2952))(set (reg:SI 106)(unspec_volatile:SI [(match_dup 0)(match_dup 1)] 2954))(set (reg:SI 105)(unspec_volatile:SI [(match_dup 0)(match_dup 1)] 2956))(set (reg:SI 104)(unspec_volatile:SI [(match_dup 0)(match_dup 1)] 2958))]"CGEN_ENABLE_INSN_P (189)""cpabsa1u.b\\t%0,%1"[(set_attr "may_trap" "no")(set_attr "latency" "0")(set_attr "length" "4")(set_attr "slot" "cop")(set_attr "slots" "c3")(set_attr "stall" "none")])(define_insn "cgen_intrinsic_cpabsa1u_b_P1"[(set (reg:SI 111)(unspec_volatile:SI [(match_operand:DI 0 "general_operand" "x")(match_operand:DI 1 "general_operand" "x")] 2944))(set (reg:SI 110)(unspec_volatile:SI [(match_dup 0)(match_dup 1)] 2946))(set (reg:SI 109)(unspec_volatile:SI [(match_dup 0)(match_dup 1)] 2948))(set (reg:SI 108)(unspec_volatile:SI [(match_dup 0)(match_dup 1)] 2950))(set (reg:SI 107)(unspec_volatile:SI [(match_dup 0)(match_dup 1)] 2952))(set (reg:SI 106)(unspec_volatile:SI [(match_dup 0)(match_dup 1)] 2954))(set (reg:SI 105)(unspec_volatile:SI [(match_dup 0)(match_dup 1)] 2956))(set (reg:SI 104)(unspec_volatile:SI [(match_dup 0)(match_dup 1)] 2958))]"CGEN_ENABLE_INSN_P (190)""cpabsa1u.b\\t%0,%1"[(set_attr "may_trap" "no")(set_attr "latency" "0")(set_attr "length" "4")(set_attr "slot" "cop")(set_attr "slots" "p1")(set_attr "stall" "none")])(define_insn "cgen_intrinsic_cpsubacla1_h_C3"[(set (reg:SI 87)(unspec_volatile:SI [(match_operand:DI 0 "general_operand" "x")(match_operand:DI 1 "general_operand" "x")] 2960))(set (reg:SI 107)(unspec_volatile:SI [(match_dup 0)(match_dup 1)] 2962))(set (reg:SI 106)(unspec_volatile:SI [(match_dup 0)(match_dup 1)] 2964))(set (reg:SI 105)(unspec_volatile:SI [(match_dup 0)(match_dup 1)] 2966))(set (reg:SI 104)(unspec_volatile:SI [(match_dup 0)(match_dup 1)] 2968))]"CGEN_ENABLE_INSN_P (191)""cpsubacla1.h\\t%0,%1"[(set_attr "may_trap" "no")(set_attr "latency" "0")(set_attr "length" "4")(set_attr "slot" "cop")(set_attr "slots" "c3")(set_attr "stall" "none")])(define_insn "cgen_intrinsic_cpsubacla1_h_P1"[(set (reg:SI 87)(unspec_volatile:SI [(match_operand:DI 0 "general_operand" "x")(match_operand:DI 1 "general_operand" "x")] 2960))(set (reg:SI 107)(unspec_volatile:SI [(match_dup 0)(match_dup 1)] 2962))(set (reg:SI 106)(unspec_volatile:SI [(match_dup 0)(match_dup 1)] 2964))(set (reg:SI 105)(unspec_volatile:SI [(match_dup 0)(match_dup 1)] 2966))(set (reg:SI 104)(unspec_volatile:SI [(match_dup 0)(match_dup 1)] 2968))]"CGEN_ENABLE_INSN_P (192)""cpsubacla1.h\\t%0,%1"[(set_attr "may_trap" "no")(set_attr "latency" "0")(set_attr "length" "4")(set_attr "slot" "cop")(set_attr "slots" "p1")(set_attr "stall" "none")])(define_insn "cgen_intrinsic_cpsubacua1_h_C3"[(set (reg:SI 87)(unspec_volatile:SI [(match_operand:DI 0 "general_operand" "x")(match_operand:DI 1 "general_operand" "x")] 2970))(set (reg:SI 111)(unspec_volatile:SI [(match_dup 0)(match_dup 1)] 2972))(set (reg:SI 110)(unspec_volatile:SI [(match_dup 0)(match_dup 1)] 2974))(set (reg:SI 109)(unspec_volatile:SI [(match_dup 0)(match_dup 1)] 2976))(set (reg:SI 108)(unspec_volatile:SI [(match_dup 0)(match_dup 1)] 2978))]"CGEN_ENABLE_INSN_P (193)""cpsubacua1.h\\t%0,%1"[(set_attr "may_trap" "no")(set_attr "latency" "0")(set_attr "length" "4")(set_attr "slot" "cop")(set_attr "slots" "c3")(set_attr "stall" "none")])(define_insn "cgen_intrinsic_cpsubacua1_h_P1"[(set (reg:SI 87)(unspec_volatile:SI [(match_operand:DI 0 "general_operand" "x")(match_operand:DI 1 "general_operand" "x")] 2970))(set (reg:SI 111)(unspec_volatile:SI [(match_dup 0)(match_dup 1)] 2972))(set (reg:SI 110)(unspec_volatile:SI [(match_dup 0)(match_dup 1)] 2974))(set (reg:SI 109)(unspec_volatile:SI [(match_dup 0)(match_dup 1)] 2976))(set (reg:SI 108)(unspec_volatile:SI [(match_dup 0)(match_dup 1)] 2978))]"CGEN_ENABLE_INSN_P (194)""cpsubacua1.h\\t%0,%1"[(set_attr "may_trap" "no")(set_attr "latency" "0")(set_attr "length" "4")(set_attr "slot" "cop")(set_attr "slots" "p1")(set_attr "stall" "none")])(define_insn "cgen_intrinsic_cpsubaca1_b_C3"[(set (reg:SI 87)(unspec_volatile:SI [(match_operand:DI 0 "general_operand" "x")(match_operand:DI 1 "general_operand" "x")] 2980))(set (reg:SI 111)(unspec_volatile:SI [(match_dup 0)(match_dup 1)] 2982))(set (reg:SI 110)(unspec_volatile:SI [(match_dup 0)(match_dup 1)] 2984))(set (reg:SI 109)(unspec_volatile:SI [(match_dup 0)(match_dup 1)] 2986))(set (reg:SI 108)(unspec_volatile:SI [(match_dup 0)(match_dup 1)] 2988))(set (reg:SI 107)(unspec_volatile:SI [(match_dup 0)(match_dup 1)] 2990))(set (reg:SI 106)(unspec_volatile:SI [(match_dup 0)(match_dup 1)] 2992))(set (reg:SI 105)(unspec_volatile:SI [(match_dup 0)(match_dup 1)] 2994))(set (reg:SI 104)(unspec_volatile:SI [(match_dup 0)(match_dup 1)] 2996))]"CGEN_ENABLE_INSN_P (195)""cpsubaca1.b\\t%0,%1"[(set_attr "may_trap" "no")(set_attr "latency" "0")(set_attr "length" "4")(set_attr "slot" "cop")(set_attr "slots" "c3")(set_attr "stall" "none")])(define_insn "cgen_intrinsic_cpsubaca1_b_P1"[(set (reg:SI 87)(unspec_volatile:SI [(match_operand:DI 0 "general_operand" "x")(match_operand:DI 1 "general_operand" "x")] 2980))(set (reg:SI 111)(unspec_volatile:SI [(match_dup 0)(match_dup 1)] 2982))(set (reg:SI 110)(unspec_volatile:SI [(match_dup 0)(match_dup 1)] 2984))(set (reg:SI 109)(unspec_volatile:SI [(match_dup 0)(match_dup 1)] 2986))(set (reg:SI 108)(unspec_volatile:SI [(match_dup 0)(match_dup 1)] 2988))(set (reg:SI 107)(unspec_volatile:SI [(match_dup 0)(match_dup 1)] 2990))(set (reg:SI 106)(unspec_volatile:SI [(match_dup 0)(match_dup 1)] 2992))(set (reg:SI 105)(unspec_volatile:SI [(match_dup 0)(match_dup 1)] 2994))(set (reg:SI 104)(unspec_volatile:SI [(match_dup 0)(match_dup 1)] 2996))]"CGEN_ENABLE_INSN_P (196)""cpsubaca1.b\\t%0,%1"[(set_attr "may_trap" "no")(set_attr "latency" "0")(set_attr "length" "4")(set_attr "slot" "cop")(set_attr "slots" "p1")(set_attr "stall" "none")])(define_insn "cgen_intrinsic_cpsubaca1u_b_C3"[(set (reg:SI 87)(unspec_volatile:SI [(match_operand:DI 0 "general_operand" "x")(match_operand:DI 1 "general_operand" "x")] 2998))(set (reg:SI 111)(unspec_volatile:SI [(match_dup 0)(match_dup 1)] 3000))(set (reg:SI 110)(unspec_volatile:SI [(match_dup 0)(match_dup 1)] 3002))(set (reg:SI 109)(unspec_volatile:SI [(match_dup 0)(match_dup 1)] 3004))(set (reg:SI 108)(unspec_volatile:SI [(match_dup 0)(match_dup 1)] 3006))(set (reg:SI 107)(unspec_volatile:SI [(match_dup 0)(match_dup 1)] 3008))(set (reg:SI 106)(unspec_volatile:SI [(match_dup 0)(match_dup 1)] 3010))(set (reg:SI 105)(unspec_volatile:SI [(match_dup 0)(match_dup 1)] 3012))(set (reg:SI 104)(unspec_volatile:SI [(match_dup 0)(match_dup 1)] 3014))]"CGEN_ENABLE_INSN_P (197)""cpsubaca1u.b\\t%0,%1"[(set_attr "may_trap" "no")(set_attr "latency" "0")(set_attr "length" "4")(set_attr "slot" "cop")(set_attr "slots" "c3")(set_attr "stall" "none")])(define_insn "cgen_intrinsic_cpsubaca1u_b_P1"[(set (reg:SI 87)(unspec_volatile:SI [(match_operand:DI 0 "general_operand" "x")(match_operand:DI 1 "general_operand" "x")] 2998))(set (reg:SI 111)(unspec_volatile:SI [(match_dup 0)(match_dup 1)] 3000))(set (reg:SI 110)(unspec_volatile:SI [(match_dup 0)(match_dup 1)] 3002))(set (reg:SI 109)(unspec_volatile:SI [(match_dup 0)(match_dup 1)] 3004))(set (reg:SI 108)(unspec_volatile:SI [(match_dup 0)(match_dup 1)] 3006))(set (reg:SI 107)(unspec_volatile:SI [(match_dup 0)(match_dup 1)] 3008))(set (reg:SI 106)(unspec_volatile:SI [(match_dup 0)(match_dup 1)] 3010))(set (reg:SI 105)(unspec_volatile:SI [(match_dup 0)(match_dup 1)] 3012))(set (reg:SI 104)(unspec_volatile:SI [(match_dup 0)(match_dup 1)] 3014))]"CGEN_ENABLE_INSN_P (198)""cpsubaca1u.b\\t%0,%1"[(set_attr "may_trap" "no")(set_attr "latency" "0")(set_attr "length" "4")(set_attr "slot" "cop")(set_attr "slots" "p1")(set_attr "stall" "none")])(define_insn "cgen_intrinsic_cpsubla1_h_C3"[(set (reg:SI 107)(unspec_volatile:SI [(match_operand:DI 0 "general_operand" "x")(match_operand:DI 1 "general_operand" "x")] 3016))(set (reg:SI 106)(unspec_volatile:SI [(match_dup 0)(match_dup 1)] 3018))(set (reg:SI 105)(unspec_volatile:SI [(match_dup 0)(match_dup 1)] 3020))(set (reg:SI 104)(unspec_volatile:SI [(match_dup 0)(match_dup 1)] 3022))]"CGEN_ENABLE_INSN_P (199)""cpsubla1.h\\t%0,%1"[(set_attr "may_trap" "no")(set_attr "latency" "0")(set_attr "length" "4")(set_attr "slot" "cop")(set_attr "slots" "c3")(set_attr "stall" "none")])(define_insn "cgen_intrinsic_cpsubla1_h_P1"[(set (reg:SI 107)(unspec_volatile:SI [(match_operand:DI 0 "general_operand" "x")(match_operand:DI 1 "general_operand" "x")] 3016))(set (reg:SI 106)(unspec_volatile:SI [(match_dup 0)(match_dup 1)] 3018))(set (reg:SI 105)(unspec_volatile:SI [(match_dup 0)(match_dup 1)] 3020))(set (reg:SI 104)(unspec_volatile:SI [(match_dup 0)(match_dup 1)] 3022))]"CGEN_ENABLE_INSN_P (200)""cpsubla1.h\\t%0,%1"[(set_attr "may_trap" "no")(set_attr "latency" "0")(set_attr "length" "4")(set_attr "slot" "cop")(set_attr "slots" "p1")(set_attr "stall" "none")])(define_insn "cgen_intrinsic_cpsubua1_h_C3"[(set (reg:SI 111)(unspec_volatile:SI [(match_operand:DI 0 "general_operand" "x")(match_operand:DI 1 "general_operand" "x")] 3024))(set (reg:SI 110)(unspec_volatile:SI [(match_dup 0)(match_dup 1)] 3026))(set (reg:SI 109)(unspec_volatile:SI [(match_dup 0)(match_dup 1)] 3028))(set (reg:SI 108)(unspec_volatile:SI [(match_dup 0)(match_dup 1)] 3030))]"CGEN_ENABLE_INSN_P (201)""cpsubua1.h\\t%0,%1"[(set_attr "may_trap" "no")(set_attr "latency" "0")(set_attr "length" "4")(set_attr "slot" "cop")(set_attr "slots" "c3")(set_attr "stall" "none")])(define_insn "cgen_intrinsic_cpsubua1_h_P1"[(set (reg:SI 111)(unspec_volatile:SI [(match_operand:DI 0 "general_operand" "x")(match_operand:DI 1 "general_operand" "x")] 3024))(set (reg:SI 110)(unspec_volatile:SI [(match_dup 0)(match_dup 1)] 3026))(set (reg:SI 109)(unspec_volatile:SI [(match_dup 0)(match_dup 1)] 3028))(set (reg:SI 108)(unspec_volatile:SI [(match_dup 0)(match_dup 1)] 3030))]"CGEN_ENABLE_INSN_P (202)""cpsubua1.h\\t%0,%1"[(set_attr "may_trap" "no")(set_attr "latency" "0")(set_attr "length" "4")(set_attr "slot" "cop")(set_attr "slots" "p1")(set_attr "stall" "none")])(define_insn "cgen_intrinsic_cpsuba1_b_C3"[(set (reg:SI 111)(unspec_volatile:SI [(match_operand:DI 0 "general_operand" "x")(match_operand:DI 1 "general_operand" "x")] 3032))(set (reg:SI 110)(unspec_volatile:SI [(match_dup 0)(match_dup 1)] 3034))(set (reg:SI 109)(unspec_volatile:SI [(match_dup 0)(match_dup 1)] 3036))(set (reg:SI 108)(unspec_volatile:SI [(match_dup 0)(match_dup 1)] 3038))(set (reg:SI 107)(unspec_volatile:SI [(match_dup 0)(match_dup 1)] 3040))(set (reg:SI 106)(unspec_volatile:SI [(match_dup 0)(match_dup 1)] 3042))(set (reg:SI 105)(unspec_volatile:SI [(match_dup 0)(match_dup 1)] 3044))(set (reg:SI 104)(unspec_volatile:SI [(match_dup 0)(match_dup 1)] 3046))]"CGEN_ENABLE_INSN_P (203)""cpsuba1.b\\t%0,%1"[(set_attr "may_trap" "no")(set_attr "latency" "0")(set_attr "length" "4")(set_attr "slot" "cop")(set_attr "slots" "c3")(set_attr "stall" "none")])(define_insn "cgen_intrinsic_cpsuba1_b_P1"[(set (reg:SI 111)(unspec_volatile:SI [(match_operand:DI 0 "general_operand" "x")(match_operand:DI 1 "general_operand" "x")] 3032))(set (reg:SI 110)(unspec_volatile:SI [(match_dup 0)(match_dup 1)] 3034))(set (reg:SI 109)(unspec_volatile:SI [(match_dup 0)(match_dup 1)] 3036))(set (reg:SI 108)(unspec_volatile:SI [(match_dup 0)(match_dup 1)] 3038))(set (reg:SI 107)(unspec_volatile:SI [(match_dup 0)(match_dup 1)] 3040))(set (reg:SI 106)(unspec_volatile:SI [(match_dup 0)(match_dup 1)] 3042))(set (reg:SI 105)(unspec_volatile:SI [(match_dup 0)(match_dup 1)] 3044))(set (reg:SI 104)(unspec_volatile:SI [(match_dup 0)(match_dup 1)] 3046))]"CGEN_ENABLE_INSN_P (204)""cpsuba1.b\\t%0,%1"[(set_attr "may_trap" "no")(set_attr "latency" "0")(set_attr "length" "4")(set_attr "slot" "cop")(set_attr "slots" "p1")(set_attr "stall" "none")])(define_insn "cgen_intrinsic_cpsuba1u_b_C3"[(set (reg:SI 111)(unspec_volatile:SI [(match_operand:DI 0 "general_operand" "x")(match_operand:DI 1 "general_operand" "x")] 3048))(set (reg:SI 110)(unspec_volatile:SI [(match_dup 0)(match_dup 1)] 3050))(set (reg:SI 109)(unspec_volatile:SI [(match_dup 0)(match_dup 1)] 3052))(set (reg:SI 108)(unspec_volatile:SI [(match_dup 0)(match_dup 1)] 3054))(set (reg:SI 107)(unspec_volatile:SI [(match_dup 0)(match_dup 1)] 3056))(set (reg:SI 106)(unspec_volatile:SI [(match_dup 0)(match_dup 1)] 3058))(set (reg:SI 105)(unspec_volatile:SI [(match_dup 0)(match_dup 1)] 3060))(set (reg:SI 104)(unspec_volatile:SI [(match_dup 0)(match_dup 1)] 3062))]"CGEN_ENABLE_INSN_P (205)""cpsuba1u.b\\t%0,%1"[(set_attr "may_trap" "no")(set_attr "latency" "0")(set_attr "length" "4")(set_attr "slot" "cop")(set_attr "slots" "c3")(set_attr "stall" "none")])(define_insn "cgen_intrinsic_cpsuba1u_b_P1"[(set (reg:SI 111)(unspec_volatile:SI [(match_operand:DI 0 "general_operand" "x")(match_operand:DI 1 "general_operand" "x")] 3048))(set (reg:SI 110)(unspec_volatile:SI [(match_dup 0)(match_dup 1)] 3050))(set (reg:SI 109)(unspec_volatile:SI [(match_dup 0)(match_dup 1)] 3052))(set (reg:SI 108)(unspec_volatile:SI [(match_dup 0)(match_dup 1)] 3054))(set (reg:SI 107)(unspec_volatile:SI [(match_dup 0)(match_dup 1)] 3056))(set (reg:SI 106)(unspec_volatile:SI [(match_dup 0)(match_dup 1)] 3058))(set (reg:SI 105)(unspec_volatile:SI [(match_dup 0)(match_dup 1)] 3060))(set (reg:SI 104)(unspec_volatile:SI [(match_dup 0)(match_dup 1)] 3062))]"CGEN_ENABLE_INSN_P (206)""cpsuba1u.b\\t%0,%1"[(set_attr "may_trap" "no")(set_attr "latency" "0")(set_attr "length" "4")(set_attr "slot" "cop")(set_attr "slots" "p1")(set_attr "stall" "none")])(define_insn "cgen_intrinsic_cpaddacla1_h_C3"[(set (reg:SI 87)(unspec_volatile:SI [(match_operand:DI 0 "general_operand" "x")(match_operand:DI 1 "general_operand" "x")] 3064))(set (reg:SI 107)(unspec_volatile:SI [(match_dup 0)(match_dup 1)] 3066))(set (reg:SI 106)(unspec_volatile:SI [(match_dup 0)(match_dup 1)] 3068))(set (reg:SI 105)(unspec_volatile:SI [(match_dup 0)(match_dup 1)] 3070))(set (reg:SI 104)(unspec_volatile:SI [(match_dup 0)(match_dup 1)] 3072))]"CGEN_ENABLE_INSN_P (207)""cpaddacla1.h\\t%0,%1"[(set_attr "may_trap" "no")(set_attr "latency" "0")(set_attr "length" "4")(set_attr "slot" "cop")(set_attr "slots" "c3")(set_attr "stall" "none")])(define_insn "cgen_intrinsic_cpaddacla1_h_P1"[(set (reg:SI 87)(unspec_volatile:SI [(match_operand:DI 0 "general_operand" "x")(match_operand:DI 1 "general_operand" "x")] 3064))(set (reg:SI 107)(unspec_volatile:SI [(match_dup 0)(match_dup 1)] 3066))(set (reg:SI 106)(unspec_volatile:SI [(match_dup 0)(match_dup 1)] 3068))(set (reg:SI 105)(unspec_volatile:SI [(match_dup 0)(match_dup 1)] 3070))(set (reg:SI 104)(unspec_volatile:SI [(match_dup 0)(match_dup 1)] 3072))]"CGEN_ENABLE_INSN_P (208)""cpaddacla1.h\\t%0,%1"[(set_attr "may_trap" "no")(set_attr "latency" "0")(set_attr "length" "4")(set_attr "slot" "cop")(set_attr "slots" "p1")(set_attr "stall" "none")])(define_insn "cgen_intrinsic_cpaddacua1_h_C3"[(set (reg:SI 87)(unspec_volatile:SI [(match_operand:DI 0 "general_operand" "x")(match_operand:DI 1 "general_operand" "x")] 3074))(set (reg:SI 111)(unspec_volatile:SI [(match_dup 0)(match_dup 1)] 3076))(set (reg:SI 110)(unspec_volatile:SI [(match_dup 0)(match_dup 1)] 3078))(set (reg:SI 109)(unspec_volatile:SI [(match_dup 0)(match_dup 1)] 3080))(set (reg:SI 108)(unspec_volatile:SI [(match_dup 0)(match_dup 1)] 3082))]"CGEN_ENABLE_INSN_P (209)""cpaddacua1.h\\t%0,%1"[(set_attr "may_trap" "no")(set_attr "latency" "0")(set_attr "length" "4")(set_attr "slot" "cop")(set_attr "slots" "c3")(set_attr "stall" "none")])(define_insn "cgen_intrinsic_cpaddacua1_h_P1"[(set (reg:SI 87)(unspec_volatile:SI [(match_operand:DI 0 "general_operand" "x")(match_operand:DI 1 "general_operand" "x")] 3074))(set (reg:SI 111)(unspec_volatile:SI [(match_dup 0)(match_dup 1)] 3076))(set (reg:SI 110)(unspec_volatile:SI [(match_dup 0)(match_dup 1)] 3078))(set (reg:SI 109)(unspec_volatile:SI [(match_dup 0)(match_dup 1)] 3080))(set (reg:SI 108)(unspec_volatile:SI [(match_dup 0)(match_dup 1)] 3082))]"CGEN_ENABLE_INSN_P (210)""cpaddacua1.h\\t%0,%1"[(set_attr "may_trap" "no")(set_attr "latency" "0")(set_attr "length" "4")(set_attr "slot" "cop")(set_attr "slots" "p1")(set_attr "stall" "none")])(define_insn "cgen_intrinsic_cpaddaca1_b_C3"[(set (reg:SI 87)(unspec_volatile:SI [(match_operand:DI 0 "general_operand" "x")(match_operand:DI 1 "general_operand" "x")] 3084))(set (reg:SI 111)(unspec_volatile:SI [(match_dup 0)(match_dup 1)] 3086))(set (reg:SI 110)(unspec_volatile:SI [(match_dup 0)(match_dup 1)] 3088))(set (reg:SI 109)(unspec_volatile:SI [(match_dup 0)(match_dup 1)] 3090))(set (reg:SI 108)(unspec_volatile:SI [(match_dup 0)(match_dup 1)] 3092))(set (reg:SI 107)(unspec_volatile:SI [(match_dup 0)(match_dup 1)] 3094))(set (reg:SI 106)(unspec_volatile:SI [(match_dup 0)(match_dup 1)] 3096))(set (reg:SI 105)(unspec_volatile:SI [(match_dup 0)(match_dup 1)] 3098))(set (reg:SI 104)(unspec_volatile:SI [(match_dup 0)(match_dup 1)] 3100))]"CGEN_ENABLE_INSN_P (211)""cpaddaca1.b\\t%0,%1"[(set_attr "may_trap" "no")(set_attr "latency" "0")(set_attr "length" "4")(set_attr "slot" "cop")(set_attr "slots" "c3")(set_attr "stall" "none")])(define_insn "cgen_intrinsic_cpaddaca1_b_P1"[(set (reg:SI 87)(unspec_volatile:SI [(match_operand:DI 0 "general_operand" "x")(match_operand:DI 1 "general_operand" "x")] 3084))(set (reg:SI 111)(unspec_volatile:SI [(match_dup 0)(match_dup 1)] 3086))(set (reg:SI 110)(unspec_volatile:SI [(match_dup 0)(match_dup 1)] 3088))(set (reg:SI 109)(unspec_volatile:SI [(match_dup 0)(match_dup 1)] 3090))(set (reg:SI 108)(unspec_volatile:SI [(match_dup 0)(match_dup 1)] 3092))(set (reg:SI 107)(unspec_volatile:SI [(match_dup 0)(match_dup 1)] 3094))(set (reg:SI 106)(unspec_volatile:SI [(match_dup 0)(match_dup 1)] 3096))(set (reg:SI 105)(unspec_volatile:SI [(match_dup 0)(match_dup 1)] 3098))(set (reg:SI 104)(unspec_volatile:SI [(match_dup 0)(match_dup 1)] 3100))]"CGEN_ENABLE_INSN_P (212)""cpaddaca1.b\\t%0,%1"[(set_attr "may_trap" "no")(set_attr "latency" "0")(set_attr "length" "4")(set_attr "slot" "cop")(set_attr "slots" "p1")(set_attr "stall" "none")])(define_insn "cgen_intrinsic_cpaddaca1u_b_C3"[(set (reg:SI 87)(unspec_volatile:SI [(match_operand:DI 0 "general_operand" "x")(match_operand:DI 1 "general_operand" "x")] 3102))(set (reg:SI 111)(unspec_volatile:SI [(match_dup 0)(match_dup 1)] 3104))(set (reg:SI 110)(unspec_volatile:SI [(match_dup 0)(match_dup 1)] 3106))(set (reg:SI 109)(unspec_volatile:SI [(match_dup 0)(match_dup 1)] 3108))(set (reg:SI 108)(unspec_volatile:SI [(match_dup 0)(match_dup 1)] 3110))(set (reg:SI 107)(unspec_volatile:SI [(match_dup 0)(match_dup 1)] 3112))(set (reg:SI 106)(unspec_volatile:SI [(match_dup 0)(match_dup 1)] 3114))(set (reg:SI 105)(unspec_volatile:SI [(match_dup 0)(match_dup 1)] 3116))(set (reg:SI 104)(unspec_volatile:SI [(match_dup 0)(match_dup 1)] 3118))]"CGEN_ENABLE_INSN_P (213)""cpaddaca1u.b\\t%0,%1"[(set_attr "may_trap" "no")(set_attr "latency" "0")(set_attr "length" "4")(set_attr "slot" "cop")(set_attr "slots" "c3")(set_attr "stall" "none")])(define_insn "cgen_intrinsic_cpaddaca1u_b_P1"[(set (reg:SI 87)(unspec_volatile:SI [(match_operand:DI 0 "general_operand" "x")(match_operand:DI 1 "general_operand" "x")] 3102))(set (reg:SI 111)(unspec_volatile:SI [(match_dup 0)(match_dup 1)] 3104))(set (reg:SI 110)(unspec_volatile:SI [(match_dup 0)(match_dup 1)] 3106))(set (reg:SI 109)(unspec_volatile:SI [(match_dup 0)(match_dup 1)] 3108))(set (reg:SI 108)(unspec_volatile:SI [(match_dup 0)(match_dup 1)] 3110))(set (reg:SI 107)(unspec_volatile:SI [(match_dup 0)(match_dup 1)] 3112))(set (reg:SI 106)(unspec_volatile:SI [(match_dup 0)(match_dup 1)] 3114))(set (reg:SI 105)(unspec_volatile:SI [(match_dup 0)(match_dup 1)] 3116))(set (reg:SI 104)(unspec_volatile:SI [(match_dup 0)(match_dup 1)] 3118))]"CGEN_ENABLE_INSN_P (214)""cpaddaca1u.b\\t%0,%1"[(set_attr "may_trap" "no")(set_attr "latency" "0")(set_attr "length" "4")(set_attr "slot" "cop")(set_attr "slots" "p1")(set_attr "stall" "none")])(define_insn "cgen_intrinsic_cpaddla1_h_C3"[(set (reg:SI 107)(unspec_volatile:SI [(match_operand:DI 0 "general_operand" "x")(match_operand:DI 1 "general_operand" "x")] 3120))(set (reg:SI 106)(unspec_volatile:SI [(match_dup 0)(match_dup 1)] 3122))(set (reg:SI 105)(unspec_volatile:SI [(match_dup 0)(match_dup 1)] 3124))(set (reg:SI 104)(unspec_volatile:SI [(match_dup 0)(match_dup 1)] 3126))]"CGEN_ENABLE_INSN_P (215)""cpaddla1.h\\t%0,%1"[(set_attr "may_trap" "no")(set_attr "latency" "0")(set_attr "length" "4")(set_attr "slot" "cop")(set_attr "slots" "c3")(set_attr "stall" "none")])(define_insn "cgen_intrinsic_cpaddla1_h_P1"[(set (reg:SI 107)(unspec_volatile:SI [(match_operand:DI 0 "general_operand" "x")(match_operand:DI 1 "general_operand" "x")] 3120))(set (reg:SI 106)(unspec_volatile:SI [(match_dup 0)(match_dup 1)] 3122))(set (reg:SI 105)(unspec_volatile:SI [(match_dup 0)(match_dup 1)] 3124))(set (reg:SI 104)(unspec_volatile:SI [(match_dup 0)(match_dup 1)] 3126))]"CGEN_ENABLE_INSN_P (216)""cpaddla1.h\\t%0,%1"[(set_attr "may_trap" "no")(set_attr "latency" "0")(set_attr "length" "4")(set_attr "slot" "cop")(set_attr "slots" "p1")(set_attr "stall" "none")])(define_insn "cgen_intrinsic_cpaddua1_h_C3"[(set (reg:SI 111)(unspec_volatile:SI [(match_operand:DI 0 "general_operand" "x")(match_operand:DI 1 "general_operand" "x")] 3128))(set (reg:SI 110)(unspec_volatile:SI [(match_dup 0)(match_dup 1)] 3130))(set (reg:SI 109)(unspec_volatile:SI [(match_dup 0)(match_dup 1)] 3132))(set (reg:SI 108)(unspec_volatile:SI [(match_dup 0)(match_dup 1)] 3134))]"CGEN_ENABLE_INSN_P (217)""cpaddua1.h\\t%0,%1"[(set_attr "may_trap" "no")(set_attr "latency" "0")(set_attr "length" "4")(set_attr "slot" "cop")(set_attr "slots" "c3")(set_attr "stall" "none")])(define_insn "cgen_intrinsic_cpaddua1_h_P1"[(set (reg:SI 111)(unspec_volatile:SI [(match_operand:DI 0 "general_operand" "x")(match_operand:DI 1 "general_operand" "x")] 3128))(set (reg:SI 110)(unspec_volatile:SI [(match_dup 0)(match_dup 1)] 3130))(set (reg:SI 109)(unspec_volatile:SI [(match_dup 0)(match_dup 1)] 3132))(set (reg:SI 108)(unspec_volatile:SI [(match_dup 0)(match_dup 1)] 3134))]"CGEN_ENABLE_INSN_P (218)""cpaddua1.h\\t%0,%1"[(set_attr "may_trap" "no")(set_attr "latency" "0")(set_attr "length" "4")(set_attr "slot" "cop")(set_attr "slots" "p1")(set_attr "stall" "none")])(define_insn "cgen_intrinsic_cpadda1_b_C3"[(set (reg:SI 111)(unspec_volatile:SI [(match_operand:DI 0 "general_operand" "x")(match_operand:DI 1 "general_operand" "x")] 3136))(set (reg:SI 110)(unspec_volatile:SI [(match_dup 0)(match_dup 1)] 3138))(set (reg:SI 109)(unspec_volatile:SI [(match_dup 0)(match_dup 1)] 3140))(set (reg:SI 108)(unspec_volatile:SI [(match_dup 0)(match_dup 1)] 3142))(set (reg:SI 107)(unspec_volatile:SI [(match_dup 0)(match_dup 1)] 3144))(set (reg:SI 106)(unspec_volatile:SI [(match_dup 0)(match_dup 1)] 3146))(set (reg:SI 105)(unspec_volatile:SI [(match_dup 0)(match_dup 1)] 3148))(set (reg:SI 104)(unspec_volatile:SI [(match_dup 0)(match_dup 1)] 3150))]"CGEN_ENABLE_INSN_P (219)""cpadda1.b\\t%0,%1"[(set_attr "may_trap" "no")(set_attr "latency" "0")(set_attr "length" "4")(set_attr "slot" "cop")(set_attr "slots" "c3")(set_attr "stall" "none")])(define_insn "cgen_intrinsic_cpadda1_b_P1"[(set (reg:SI 111)(unspec_volatile:SI [(match_operand:DI 0 "general_operand" "x")(match_operand:DI 1 "general_operand" "x")] 3136))(set (reg:SI 110)(unspec_volatile:SI [(match_dup 0)(match_dup 1)] 3138))(set (reg:SI 109)(unspec_volatile:SI [(match_dup 0)(match_dup 1)] 3140))(set (reg:SI 108)(unspec_volatile:SI [(match_dup 0)(match_dup 1)] 3142))(set (reg:SI 107)(unspec_volatile:SI [(match_dup 0)(match_dup 1)] 3144))(set (reg:SI 106)(unspec_volatile:SI [(match_dup 0)(match_dup 1)] 3146))(set (reg:SI 105)(unspec_volatile:SI [(match_dup 0)(match_dup 1)] 3148))(set (reg:SI 104)(unspec_volatile:SI [(match_dup 0)(match_dup 1)] 3150))]"CGEN_ENABLE_INSN_P (220)""cpadda1.b\\t%0,%1"[(set_attr "may_trap" "no")(set_attr "latency" "0")(set_attr "length" "4")(set_attr "slot" "cop")(set_attr "slots" "p1")(set_attr "stall" "none")])(define_insn "cgen_intrinsic_cpadda1u_b_C3"[(set (reg:SI 111)(unspec_volatile:SI [(match_operand:DI 0 "general_operand" "x")(match_operand:DI 1 "general_operand" "x")] 3152))(set (reg:SI 110)(unspec_volatile:SI [(match_dup 0)(match_dup 1)] 3154))(set (reg:SI 109)(unspec_volatile:SI [(match_dup 0)(match_dup 1)] 3156))(set (reg:SI 108)(unspec_volatile:SI [(match_dup 0)(match_dup 1)] 3158))(set (reg:SI 107)(unspec_volatile:SI [(match_dup 0)(match_dup 1)] 3160))(set (reg:SI 106)(unspec_volatile:SI [(match_dup 0)(match_dup 1)] 3162))(set (reg:SI 105)(unspec_volatile:SI [(match_dup 0)(match_dup 1)] 3164))(set (reg:SI 104)(unspec_volatile:SI [(match_dup 0)(match_dup 1)] 3166))]"CGEN_ENABLE_INSN_P (221)""cpadda1u.b\\t%0,%1"[(set_attr "may_trap" "no")(set_attr "latency" "0")(set_attr "length" "4")(set_attr "slot" "cop")(set_attr "slots" "c3")(set_attr "stall" "none")])(define_insn "cgen_intrinsic_cpadda1u_b_P1"[(set (reg:SI 111)(unspec_volatile:SI [(match_operand:DI 0 "general_operand" "x")(match_operand:DI 1 "general_operand" "x")] 3152))(set (reg:SI 110)(unspec_volatile:SI [(match_dup 0)(match_dup 1)] 3154))(set (reg:SI 109)(unspec_volatile:SI [(match_dup 0)(match_dup 1)] 3156))(set (reg:SI 108)(unspec_volatile:SI [(match_dup 0)(match_dup 1)] 3158))(set (reg:SI 107)(unspec_volatile:SI [(match_dup 0)(match_dup 1)] 3160))(set (reg:SI 106)(unspec_volatile:SI [(match_dup 0)(match_dup 1)] 3162))(set (reg:SI 105)(unspec_volatile:SI [(match_dup 0)(match_dup 1)] 3164))(set (reg:SI 104)(unspec_volatile:SI [(match_dup 0)(match_dup 1)] 3166))]"CGEN_ENABLE_INSN_P (222)""cpadda1u.b\\t%0,%1"[(set_attr "may_trap" "no")(set_attr "latency" "0")(set_attr "length" "4")(set_attr "slot" "cop")(set_attr "slots" "p1")(set_attr "stall" "none")])(define_insn "cgen_intrinsic_cpmovi_b_C3"[(set (match_operand:DI 0 "nonimmediate_operand" "=x")(unspec:DI [(match_operand:DI 1 "cgen_h_sint_8a1_immediate" "")] 3180))]"CGEN_ENABLE_INSN_P (223)""cpmovi.b\\t%0,%1"[(set_attr "may_trap" "no")(set_attr "latency" "0")(set_attr "length" "4")(set_attr "slot" "cop")(set_attr "slots" "c3")(set_attr "stall" "none")])(define_insn "cgen_intrinsic_cpmovi_b_P0S_P1"[(set (match_operand:DI 0 "nonimmediate_operand" "=x")(unspec:DI [(match_operand:DI 1 "cgen_h_sint_8a1_immediate" "")] 3180))]"CGEN_ENABLE_INSN_P (224)""cpmovi.b\\t%0,%1"[(set_attr "may_trap" "no")(set_attr "latency" "0")(set_attr "length" "4")(set_attr "slot" "cop")(set_attr "slots" "p0s_p1")(set_attr "stall" "none")])(define_insn "cgen_intrinsic_c1nop_P1"[(unspec_volatile [(const_int 0)] 1482)]"CGEN_ENABLE_INSN_P (225)""c1nop"[(set_attr "may_trap" "no")(set_attr "latency" "0")(set_attr "length" "4")(set_attr "slot" "cop")(set_attr "slots" "p1")(set_attr "stall" "none")])(define_insn "cgen_intrinsic_cdmovi_C3"[(set (match_operand:DI 0 "nonimmediate_operand" "=x")(unspec:DI [(match_operand:DI 1 "cgen_h_sint_8a1_immediate" "")] 3168))]"CGEN_ENABLE_INSN_P (226)""cdmovi\\t%0,%1"[(set_attr "may_trap" "no")(set_attr "latency" "0")(set_attr "length" "4")(set_attr "slot" "cop")(set_attr "slots" "c3")(set_attr "stall" "none")])(define_insn "cgen_intrinsic_cdmovi_P0_P1"[(set (match_operand:DI 0 "nonimmediate_operand" "=x")(unspec:DI [(match_operand:DI 1 "cgen_h_sint_16a1_immediate" "")] 3168))]"CGEN_ENABLE_INSN_P (227)""cdmovi\\t%0,%1"[(set_attr "may_trap" "no")(set_attr "latency" "0")(set_attr "length" "4")(set_attr "slot" "cop")(set_attr "slots" "p0_p1")(set_attr "stall" "none")])(define_insn "cgen_intrinsic_cdmoviu_C3"[(set (match_operand:DI 0 "nonimmediate_operand" "=x")(unspec:DI [(match_operand:DI 1 "cgen_h_uint_8a1_immediate" "")] 3170))]"CGEN_ENABLE_INSN_P (228)""cdmoviu\\t%0,%1"[(set_attr "may_trap" "no")(set_attr "latency" "0")(set_attr "length" "4")(set_attr "slot" "cop")(set_attr "slots" "c3")(set_attr "stall" "none")])(define_insn "cgen_intrinsic_cdmoviu_P0_P1"[(set (match_operand:DI 0 "nonimmediate_operand" "=x")(unspec:DI [(match_operand:DI 1 "cgen_h_uint_16a1_immediate" "")] 3170))]"CGEN_ENABLE_INSN_P (229)""cdmoviu\\t%0,%1"[(set_attr "may_trap" "no")(set_attr "latency" "0")(set_attr "length" "4")(set_attr "slot" "cop")(set_attr "slots" "p0_p1")(set_attr "stall" "none")])(define_insn "cgen_intrinsic_cpmovi_w_C3"[(set (match_operand:DI 0 "nonimmediate_operand" "=x")(unspec:DI [(match_operand:DI 1 "cgen_h_sint_8a1_immediate" "")] 3172))]"CGEN_ENABLE_INSN_P (230)""cpmovi.w\\t%0,%1"[(set_attr "may_trap" "no")(set_attr "latency" "0")(set_attr "length" "4")(set_attr "slot" "cop")(set_attr "slots" "c3")(set_attr "stall" "none")])(define_insn "cgen_intrinsic_cpmovi_w_P0_P1"[(set (match_operand:DI 0 "nonimmediate_operand" "=x")(unspec:DI [(match_operand:DI 1 "cgen_h_sint_16a1_immediate" "")] 3172))]"CGEN_ENABLE_INSN_P (231)""cpmovi.w\\t%0,%1"[(set_attr "may_trap" "no")(set_attr "latency" "0")(set_attr "length" "4")(set_attr "slot" "cop")(set_attr "slots" "p0_p1")(set_attr "stall" "none")])(define_insn "cgen_intrinsic_cpmoviu_w_C3"[(set (match_operand:DI 0 "nonimmediate_operand" "=x")(unspec:DI [(match_operand:DI 1 "cgen_h_uint_8a1_immediate" "")] 3174))]"CGEN_ENABLE_INSN_P (232)""cpmoviu.w\\t%0,%1"[(set_attr "may_trap" "no")(set_attr "latency" "0")(set_attr "length" "4")(set_attr "slot" "cop")(set_attr "slots" "c3")(set_attr "stall" "none")])(define_insn "cgen_intrinsic_cpmoviu_w_P0_P1"[(set (match_operand:DI 0 "nonimmediate_operand" "=x")(unspec:DI [(match_operand:DI 1 "cgen_h_uint_16a1_immediate" "")] 3174))]"CGEN_ENABLE_INSN_P (233)""cpmoviu.w\\t%0,%1"[(set_attr "may_trap" "no")(set_attr "latency" "0")(set_attr "length" "4")(set_attr "slot" "cop")(set_attr "slots" "p0_p1")(set_attr "stall" "none")])(define_insn "cgen_intrinsic_cpmovi_h_C3"[(set (match_operand:DI 0 "nonimmediate_operand" "=x")(unspec:DI [(match_operand:DI 1 "cgen_h_sint_8a1_immediate" "")] 3176))]"CGEN_ENABLE_INSN_P (234)""cpmovi.h\\t%0,%1"[(set_attr "may_trap" "no")(set_attr "latency" "0")(set_attr "length" "4")(set_attr "slot" "cop")(set_attr "slots" "c3")(set_attr "stall" "none")])(define_insn "cgen_intrinsic_cpmovi_h_P0_P1"[(set (match_operand:DI 0 "nonimmediate_operand" "=x")(unspec:DI [(match_operand:DI 1 "cgen_h_sint_16a1_immediate" "")] 3176))]"CGEN_ENABLE_INSN_P (235)""cpmovi.h\\t%0,%1"[(set_attr "may_trap" "no")(set_attr "latency" "0")(set_attr "length" "4")(set_attr "slot" "cop")(set_attr "slots" "p0_p1")(set_attr "stall" "none")])(define_insn "cgen_intrinsic_cdclipi3_C3"[(set (match_operand:DI 0 "nonimmediate_operand" "=x")(unspec:DI [(match_operand:DI 1 "general_operand" "x")(match_operand:DI 2 "cgen_h_uint_6a1_immediate" "")] 3182))]"CGEN_ENABLE_INSN_P (236)""cdclipi3\\t%0,%1,%2"[(set_attr "may_trap" "no")(set_attr "latency" "0")(set_attr "length" "4")(set_attr "slot" "cop")(set_attr "slots" "c3")(set_attr "stall" "none")])(define_insn "cgen_intrinsic_cdclipi3_P0_P1"[(set (match_operand:DI 0 "nonimmediate_operand" "=x")(unspec:DI [(match_operand:DI 1 "general_operand" "x")(match_operand:DI 2 "cgen_h_uint_6a1_immediate" "")] 3182))]"CGEN_ENABLE_INSN_P (237)""cdclipi3\\t%0,%1,%2"[(set_attr "may_trap" "no")(set_attr "latency" "0")(set_attr "length" "4")(set_attr "slot" "cop")(set_attr "slots" "p0_p1")(set_attr "stall" "none")])(define_insn "cgen_intrinsic_cdclipiu3_C3"[(set (match_operand:DI 0 "nonimmediate_operand" "=x")(unspec:DI [(match_operand:DI 1 "general_operand" "x")(match_operand:DI 2 "cgen_h_uint_6a1_immediate" "")] 3184))]"CGEN_ENABLE_INSN_P (238)""cdclipiu3\\t%0,%1,%2"[(set_attr "may_trap" "no")(set_attr "latency" "0")(set_attr "length" "4")(set_attr "slot" "cop")(set_attr "slots" "c3")(set_attr "stall" "none")])(define_insn "cgen_intrinsic_cdclipiu3_P0_P1"[(set (match_operand:DI 0 "nonimmediate_operand" "=x")(unspec:DI [(match_operand:DI 1 "general_operand" "x")(match_operand:DI 2 "cgen_h_uint_6a1_immediate" "")] 3184))]"CGEN_ENABLE_INSN_P (239)""cdclipiu3\\t%0,%1,%2"[(set_attr "may_trap" "no")(set_attr "latency" "0")(set_attr "length" "4")(set_attr "slot" "cop")(set_attr "slots" "p0_p1")(set_attr "stall" "none")])(define_insn "cgen_intrinsic_cpclipi3_w_C3"[(set (match_operand:DI 0 "nonimmediate_operand" "=x")(unspec:DI [(match_operand:DI 1 "general_operand" "x")(match_operand:DI 2 "cgen_h_uint_5a1_immediate" "")] 3186))]"CGEN_ENABLE_INSN_P (240)""cpclipi3.w\\t%0,%1,%2"[(set_attr "may_trap" "no")(set_attr "latency" "0")(set_attr "length" "4")(set_attr "slot" "cop")(set_attr "slots" "c3")(set_attr "stall" "none")])(define_insn "cgen_intrinsic_cpclipi3_w_P0_P1"[(set (match_operand:DI 0 "nonimmediate_operand" "=x")(unspec:DI [(match_operand:DI 1 "general_operand" "x")(match_operand:DI 2 "cgen_h_uint_5a1_immediate" "")] 3186))]"CGEN_ENABLE_INSN_P (241)""cpclipi3.w\\t%0,%1,%2"[(set_attr "may_trap" "no")(set_attr "latency" "0")(set_attr "length" "4")(set_attr "slot" "cop")(set_attr "slots" "p0_p1")(set_attr "stall" "none")])(define_insn "cgen_intrinsic_cpclipiu3_w_C3"[(set (match_operand:DI 0 "nonimmediate_operand" "=x")(unspec:DI [(match_operand:DI 1 "general_operand" "x")(match_operand:DI 2 "cgen_h_uint_5a1_immediate" "")] 3188))]"CGEN_ENABLE_INSN_P (242)""cpclipiu3.w\\t%0,%1,%2"[(set_attr "may_trap" "no")(set_attr "latency" "0")(set_attr "length" "4")(set_attr "slot" "cop")(set_attr "slots" "c3")(set_attr "stall" "none")])(define_insn "cgen_intrinsic_cpclipiu3_w_P0_P1"[(set (match_operand:DI 0 "nonimmediate_operand" "=x")(unspec:DI [(match_operand:DI 1 "general_operand" "x")(match_operand:DI 2 "cgen_h_uint_5a1_immediate" "")] 3188))]"CGEN_ENABLE_INSN_P (243)""cpclipiu3.w\\t%0,%1,%2"[(set_attr "may_trap" "no")(set_attr "latency" "0")(set_attr "length" "4")(set_attr "slot" "cop")(set_attr "slots" "p0_p1")(set_attr "stall" "none")])(define_insn "cgen_intrinsic_cpslai3_w_C3"[(set (match_operand:DI 0 "nonimmediate_operand" "=x")(unspec_volatile:DI [(match_operand:DI 1 "general_operand" "x")(match_operand:DI 2 "cgen_h_uint_5a1_immediate" "")] 3190))]"CGEN_ENABLE_INSN_P (244)""cpslai3.w\\t%0,%1,%2"[(set_attr "may_trap" "no")(set_attr "latency" "0")(set_attr "length" "4")(set_attr "slot" "cop")(set_attr "slots" "c3")(set_attr "stall" "none")])(define_insn "cgen_intrinsic_cpslai3_w_P0_P1"[(set (match_operand:DI 0 "nonimmediate_operand" "=x")(unspec_volatile:DI [(match_operand:DI 1 "general_operand" "x")(match_operand:DI 2 "cgen_h_uint_5a1_immediate" "")] 3190))]"CGEN_ENABLE_INSN_P (245)""cpslai3.w\\t%0,%1,%2"[(set_attr "may_trap" "no")(set_attr "latency" "0")(set_attr "length" "4")(set_attr "slot" "cop")(set_attr "slots" "p0_p1")(set_attr "stall" "none")])(define_insn "cgen_intrinsic_cpslai3_h_C3"[(set (match_operand:DI 0 "nonimmediate_operand" "=x")(unspec_volatile:DI [(match_operand:DI 1 "general_operand" "x")(match_operand:DI 2 "cgen_h_uint_4a1_immediate" "")] 3192))]"CGEN_ENABLE_INSN_P (246)""cpslai3.h\\t%0,%1,%2"[(set_attr "may_trap" "no")(set_attr "latency" "0")(set_attr "length" "4")(set_attr "slot" "cop")(set_attr "slots" "c3")(set_attr "stall" "none")])(define_insn "cgen_intrinsic_cpslai3_h_P0_P1"[(set (match_operand:DI 0 "nonimmediate_operand" "=x")(unspec_volatile:DI [(match_operand:DI 1 "general_operand" "x")(match_operand:DI 2 "cgen_h_uint_4a1_immediate" "")] 3192))]"CGEN_ENABLE_INSN_P (247)""cpslai3.h\\t%0,%1,%2"[(set_attr "may_trap" "no")(set_attr "latency" "0")(set_attr "length" "4")(set_attr "slot" "cop")(set_attr "slots" "p0_p1")(set_attr "stall" "none")])(define_insn "cgen_intrinsic_cdslli3_C3"[(set (match_operand:DI 0 "nonimmediate_operand" "=x")(unspec:DI [(match_operand:DI 1 "general_operand" "x")(match_operand:DI 2 "cgen_h_uint_6a1_immediate" "")] 3194))]"CGEN_ENABLE_INSN_P (248)""cdslli3\\t%0,%1,%2"[(set_attr "may_trap" "no")(set_attr "latency" "0")(set_attr "length" "4")(set_attr "slot" "cop")(set_attr "slots" "c3")(set_attr "stall" "none")])(define_insn "cgen_intrinsic_cdslli3_P0_P1"[(set (match_operand:DI 0 "nonimmediate_operand" "=x")(unspec:DI [(match_operand:DI 1 "general_operand" "x")(match_operand:DI 2 "cgen_h_uint_6a1_immediate" "")] 3194))]"CGEN_ENABLE_INSN_P (249)""cdslli3\\t%0,%1,%2"[(set_attr "may_trap" "no")(set_attr "latency" "0")(set_attr "length" "4")(set_attr "slot" "cop")(set_attr "slots" "p0_p1")(set_attr "stall" "none")])(define_insn "cgen_intrinsic_cpslli3_w_C3"[(set (match_operand:DI 0 "nonimmediate_operand" "=x")(unspec:DI [(match_operand:DI 1 "general_operand" "x")(match_operand:DI 2 "cgen_h_uint_5a1_immediate" "")] 3196))]"CGEN_ENABLE_INSN_P (250)""cpslli3.w\\t%0,%1,%2"[(set_attr "may_trap" "no")(set_attr "latency" "0")(set_attr "length" "4")(set_attr "slot" "cop")(set_attr "slots" "c3")(set_attr "stall" "none")])(define_insn "cgen_intrinsic_cpslli3_w_P0_P1"[(set (match_operand:DI 0 "nonimmediate_operand" "=x")(unspec:DI [(match_operand:DI 1 "general_operand" "x")(match_operand:DI 2 "cgen_h_uint_5a1_immediate" "")] 3196))]"CGEN_ENABLE_INSN_P (251)""cpslli3.w\\t%0,%1,%2"[(set_attr "may_trap" "no")(set_attr "latency" "0")(set_attr "length" "4")(set_attr "slot" "cop")(set_attr "slots" "p0_p1")(set_attr "stall" "none")])(define_insn "cgen_intrinsic_cpslli3_h_C3"[(set (match_operand:DI 0 "nonimmediate_operand" "=x")(unspec:DI [(match_operand:DI 1 "general_operand" "x")(match_operand:DI 2 "cgen_h_uint_4a1_immediate" "")] 3198))]"CGEN_ENABLE_INSN_P (252)""cpslli3.h\\t%0,%1,%2"[(set_attr "may_trap" "no")(set_attr "latency" "0")(set_attr "length" "4")(set_attr "slot" "cop")(set_attr "slots" "c3")(set_attr "stall" "none")])(define_insn "cgen_intrinsic_cpslli3_h_P0_P1"[(set (match_operand:DI 0 "nonimmediate_operand" "=x")(unspec:DI [(match_operand:DI 1 "general_operand" "x")(match_operand:DI 2 "cgen_h_uint_4a1_immediate" "")] 3198))]"CGEN_ENABLE_INSN_P (253)""cpslli3.h\\t%0,%1,%2"[(set_attr "may_trap" "no")(set_attr "latency" "0")(set_attr "length" "4")(set_attr "slot" "cop")(set_attr "slots" "p0_p1")(set_attr "stall" "none")])(define_insn "cgen_intrinsic_cpslli3_b_C3"[(set (match_operand:DI 0 "nonimmediate_operand" "=x")(unspec:DI [(match_operand:DI 1 "general_operand" "x")(match_operand:DI 2 "cgen_h_uint_3a1_immediate" "")] 3200))]"CGEN_ENABLE_INSN_P (254)""cpslli3.b\\t%0,%1,%2"[(set_attr "may_trap" "no")(set_attr "latency" "0")(set_attr "length" "4")(set_attr "slot" "cop")(set_attr "slots" "c3")(set_attr "stall" "none")])(define_insn "cgen_intrinsic_cpslli3_b_P0_P1"[(set (match_operand:DI 0 "nonimmediate_operand" "=x")(unspec:DI [(match_operand:DI 1 "general_operand" "x")(match_operand:DI 2 "cgen_h_uint_3a1_immediate" "")] 3200))]"CGEN_ENABLE_INSN_P (255)""cpslli3.b\\t%0,%1,%2"[(set_attr "may_trap" "no")(set_attr "latency" "0")(set_attr "length" "4")(set_attr "slot" "cop")(set_attr "slots" "p0_p1")(set_attr "stall" "none")])(define_insn "cgen_intrinsic_cdsrai3_C3"[(set (match_operand:DI 0 "nonimmediate_operand" "=x")(unspec:DI [(match_operand:DI 1 "general_operand" "x")(match_operand:DI 2 "cgen_h_uint_6a1_immediate" "")] 3202))]"CGEN_ENABLE_INSN_P (256)""cdsrai3\\t%0,%1,%2"[(set_attr "may_trap" "no")(set_attr "latency" "0")(set_attr "length" "4")(set_attr "slot" "cop")(set_attr "slots" "c3")(set_attr "stall" "none")])(define_insn "cgen_intrinsic_cdsrai3_P0_P1"[(set (match_operand:DI 0 "nonimmediate_operand" "=x")(unspec:DI [(match_operand:DI 1 "general_operand" "x")(match_operand:DI 2 "cgen_h_uint_6a1_immediate" "")] 3202))]"CGEN_ENABLE_INSN_P (257)""cdsrai3\\t%0,%1,%2"[(set_attr "may_trap" "no")(set_attr "latency" "0")(set_attr "length" "4")(set_attr "slot" "cop")(set_attr "slots" "p0_p1")(set_attr "stall" "none")])(define_insn "cgen_intrinsic_cpsrai3_w_C3"[(set (match_operand:DI 0 "nonimmediate_operand" "=x")(unspec:DI [(match_operand:DI 1 "general_operand" "x")(match_operand:DI 2 "cgen_h_uint_5a1_immediate" "")] 3204))]"CGEN_ENABLE_INSN_P (258)""cpsrai3.w\\t%0,%1,%2"[(set_attr "may_trap" "no")(set_attr "latency" "0")(set_attr "length" "4")(set_attr "slot" "cop")(set_attr "slots" "c3")(set_attr "stall" "none")])(define_insn "cgen_intrinsic_cpsrai3_w_P0_P1"[(set (match_operand:DI 0 "nonimmediate_operand" "=x")(unspec:DI [(match_operand:DI 1 "general_operand" "x")(match_operand:DI 2 "cgen_h_uint_5a1_immediate" "")] 3204))]"CGEN_ENABLE_INSN_P (259)""cpsrai3.w\\t%0,%1,%2"[(set_attr "may_trap" "no")(set_attr "latency" "0")(set_attr "length" "4")(set_attr "slot" "cop")(set_attr "slots" "p0_p1")(set_attr "stall" "none")])(define_insn "cgen_intrinsic_cpsrai3_h_C3"[(set (match_operand:DI 0 "nonimmediate_operand" "=x")(unspec:DI [(match_operand:DI 1 "general_operand" "x")(match_operand:DI 2 "cgen_h_uint_4a1_immediate" "")] 3206))]"CGEN_ENABLE_INSN_P (260)""cpsrai3.h\\t%0,%1,%2"[(set_attr "may_trap" "no")(set_attr "latency" "0")(set_attr "length" "4")(set_attr "slot" "cop")(set_attr "slots" "c3")(set_attr "stall" "none")])(define_insn "cgen_intrinsic_cpsrai3_h_P0_P1"[(set (match_operand:DI 0 "nonimmediate_operand" "=x")(unspec:DI [(match_operand:DI 1 "general_operand" "x")(match_operand:DI 2 "cgen_h_uint_4a1_immediate" "")] 3206))]"CGEN_ENABLE_INSN_P (261)""cpsrai3.h\\t%0,%1,%2"[(set_attr "may_trap" "no")(set_attr "latency" "0")(set_attr "length" "4")(set_attr "slot" "cop")(set_attr "slots" "p0_p1")(set_attr "stall" "none")])(define_insn "cgen_intrinsic_cpsrai3_b_C3"[(set (match_operand:DI 0 "nonimmediate_operand" "=x")(unspec:DI [(match_operand:DI 1 "general_operand" "x")(match_operand:DI 2 "cgen_h_uint_3a1_immediate" "")] 3208))]"CGEN_ENABLE_INSN_P (262)""cpsrai3.b\\t%0,%1,%2"[(set_attr "may_trap" "no")(set_attr "latency" "0")(set_attr "length" "4")(set_attr "slot" "cop")(set_attr "slots" "c3")(set_attr "stall" "none")])(define_insn "cgen_intrinsic_cpsrai3_b_P0_P1"[(set (match_operand:DI 0 "nonimmediate_operand" "=x")(unspec:DI [(match_operand:DI 1 "general_operand" "x")(match_operand:DI 2 "cgen_h_uint_3a1_immediate" "")] 3208))]"CGEN_ENABLE_INSN_P (263)""cpsrai3.b\\t%0,%1,%2"[(set_attr "may_trap" "no")(set_attr "latency" "0")(set_attr "length" "4")(set_attr "slot" "cop")(set_attr "slots" "p0_p1")(set_attr "stall" "none")])(define_insn "cgen_intrinsic_cdsrli3_C3"[(set (match_operand:DI 0 "nonimmediate_operand" "=x")(unspec:DI [(match_operand:DI 1 "general_operand" "x")(match_operand:DI 2 "cgen_h_uint_6a1_immediate" "")] 3210))]"CGEN_ENABLE_INSN_P (264)""cdsrli3\\t%0,%1,%2"[(set_attr "may_trap" "no")(set_attr "latency" "0")(set_attr "length" "4")(set_attr "slot" "cop")(set_attr "slots" "c3")(set_attr "stall" "none")])(define_insn "cgen_intrinsic_cdsrli3_P0_P1"[(set (match_operand:DI 0 "nonimmediate_operand" "=x")(unspec:DI [(match_operand:DI 1 "general_operand" "x")(match_operand:DI 2 "cgen_h_uint_6a1_immediate" "")] 3210))]"CGEN_ENABLE_INSN_P (265)""cdsrli3\\t%0,%1,%2"[(set_attr "may_trap" "no")(set_attr "latency" "0")(set_attr "length" "4")(set_attr "slot" "cop")(set_attr "slots" "p0_p1")(set_attr "stall" "none")])(define_insn "cgen_intrinsic_cpsrli3_w_C3"[(set (match_operand:DI 0 "nonimmediate_operand" "=x")(unspec:DI [(match_operand:DI 1 "general_operand" "x")(match_operand:DI 2 "cgen_h_uint_5a1_immediate" "")] 3212))]"CGEN_ENABLE_INSN_P (266)""cpsrli3.w\\t%0,%1,%2"[(set_attr "may_trap" "no")(set_attr "latency" "0")(set_attr "length" "4")(set_attr "slot" "cop")(set_attr "slots" "c3")(set_attr "stall" "none")])(define_insn "cgen_intrinsic_cpsrli3_w_P0_P1"[(set (match_operand:DI 0 "nonimmediate_operand" "=x")(unspec:DI [(match_operand:DI 1 "general_operand" "x")(match_operand:DI 2 "cgen_h_uint_5a1_immediate" "")] 3212))]"CGEN_ENABLE_INSN_P (267)""cpsrli3.w\\t%0,%1,%2"[(set_attr "may_trap" "no")(set_attr "latency" "0")(set_attr "length" "4")(set_attr "slot" "cop")(set_attr "slots" "p0_p1")(set_attr "stall" "none")])(define_insn "cgen_intrinsic_cpsrli3_h_C3"[(set (match_operand:DI 0 "nonimmediate_operand" "=x")(unspec:DI [(match_operand:DI 1 "general_operand" "x")(match_operand:DI 2 "cgen_h_uint_4a1_immediate" "")] 3214))]"CGEN_ENABLE_INSN_P (268)""cpsrli3.h\\t%0,%1,%2"[(set_attr "may_trap" "no")(set_attr "latency" "0")(set_attr "length" "4")(set_attr "slot" "cop")(set_attr "slots" "c3")(set_attr "stall" "none")])(define_insn "cgen_intrinsic_cpsrli3_h_P0_P1"[(set (match_operand:DI 0 "nonimmediate_operand" "=x")(unspec:DI [(match_operand:DI 1 "general_operand" "x")(match_operand:DI 2 "cgen_h_uint_4a1_immediate" "")] 3214))]"CGEN_ENABLE_INSN_P (269)""cpsrli3.h\\t%0,%1,%2"[(set_attr "may_trap" "no")(set_attr "latency" "0")(set_attr "length" "4")(set_attr "slot" "cop")(set_attr "slots" "p0_p1")(set_attr "stall" "none")])(define_insn "cgen_intrinsic_cpsrli3_b_C3"[(set (match_operand:DI 0 "nonimmediate_operand" "=x")(unspec:DI [(match_operand:DI 1 "general_operand" "x")(match_operand:DI 2 "cgen_h_uint_3a1_immediate" "")] 3216))]"CGEN_ENABLE_INSN_P (270)""cpsrli3.b\\t%0,%1,%2"[(set_attr "may_trap" "no")(set_attr "latency" "0")(set_attr "length" "4")(set_attr "slot" "cop")(set_attr "slots" "c3")(set_attr "stall" "none")])(define_insn "cgen_intrinsic_cpsrli3_b_P0_P1"[(set (match_operand:DI 0 "nonimmediate_operand" "=x")(unspec:DI [(match_operand:DI 1 "general_operand" "x")(match_operand:DI 2 "cgen_h_uint_3a1_immediate" "")] 3216))]"CGEN_ENABLE_INSN_P (271)""cpsrli3.b\\t%0,%1,%2"[(set_attr "may_trap" "no")(set_attr "latency" "0")(set_attr "length" "4")(set_attr "slot" "cop")(set_attr "slots" "p0_p1")(set_attr "stall" "none")])(define_insn "cgen_intrinsic_cpsla3_w_C3"[(set (match_operand:DI 0 "nonimmediate_operand" "=x")(unspec_volatile:DI [(match_operand:DI 1 "general_operand" "x")(match_operand:DI 2 "general_operand" "x")] 3460))]"CGEN_ENABLE_INSN_P (272)""cpsla3.w\\t%0,%1,%2"[(set_attr "may_trap" "no")(set_attr "latency" "0")(set_attr "length" "4")(set_attr "slot" "cop")(set_attr "slots" "c3")(set_attr "stall" "none")])(define_insn "cgen_intrinsic_cpsla3_w_P0_P1"[(set (match_operand:DI 0 "nonimmediate_operand" "=x")(unspec_volatile:DI [(match_operand:DI 1 "general_operand" "x")(match_operand:DI 2 "general_operand" "x")] 3460))]"CGEN_ENABLE_INSN_P (273)""cpsla3.w\\t%0,%1,%2"[(set_attr "may_trap" "no")(set_attr "latency" "0")(set_attr "length" "4")(set_attr "slot" "cop")(set_attr "slots" "p0_p1")(set_attr "stall" "none")])(define_insn "cgen_intrinsic_cpsla3_h_C3"[(set (match_operand:DI 0 "nonimmediate_operand" "=x")(unspec_volatile:DI [(match_operand:DI 1 "general_operand" "x")(match_operand:DI 2 "general_operand" "x")] 3462))]"CGEN_ENABLE_INSN_P (274)""cpsla3.h\\t%0,%1,%2"[(set_attr "may_trap" "no")(set_attr "latency" "0")(set_attr "length" "4")(set_attr "slot" "cop")(set_attr "slots" "c3")(set_attr "stall" "none")])(define_insn "cgen_intrinsic_cpsla3_h_P0_P1"[(set (match_operand:DI 0 "nonimmediate_operand" "=x")(unspec_volatile:DI [(match_operand:DI 1 "general_operand" "x")(match_operand:DI 2 "general_operand" "x")] 3462))]"CGEN_ENABLE_INSN_P (275)""cpsla3.h\\t%0,%1,%2"[(set_attr "may_trap" "no")(set_attr "latency" "0")(set_attr "length" "4")(set_attr "slot" "cop")(set_attr "slots" "p0_p1")(set_attr "stall" "none")])(define_insn "cgen_intrinsic_cdsll3_C3"[(set (match_operand:DI 0 "nonimmediate_operand" "=x")(unspec:DI [(match_operand:DI 1 "general_operand" "x")(match_operand:DI 2 "general_operand" "x")] 3464))]"CGEN_ENABLE_INSN_P (276)""cdsll3\\t%0,%1,%2"[(set_attr "may_trap" "no")(set_attr "latency" "0")(set_attr "length" "4")(set_attr "slot" "cop")(set_attr "slots" "c3")(set_attr "stall" "none")])(define_insn "cgen_intrinsic_cdsll3_P0_P1"[(set (match_operand:DI 0 "nonimmediate_operand" "=x")(unspec:DI [(match_operand:DI 1 "general_operand" "x")(match_operand:DI 2 "general_operand" "x")] 3464))]"CGEN_ENABLE_INSN_P (277)""cdsll3\\t%0,%1,%2"[(set_attr "may_trap" "no")(set_attr "latency" "0")(set_attr "length" "4")(set_attr "slot" "cop")(set_attr "slots" "p0_p1")(set_attr "stall" "none")])(define_insn "cgen_intrinsic_cpssll3_w_C3"[(set (match_operand:DI 0 "nonimmediate_operand" "=x")(unspec:DI [(match_operand:DI 1 "general_operand" "x")(match_operand:DI 2 "general_operand" "x")] 3466))]"CGEN_ENABLE_INSN_P (278)""cpssll3.w\\t%0,%1,%2"[(set_attr "may_trap" "no")(set_attr "latency" "0")(set_attr "length" "4")(set_attr "slot" "cop")(set_attr "slots" "c3")(set_attr "stall" "none")])(define_insn "cgen_intrinsic_cpssll3_w_P0_P1"[(set (match_operand:DI 0 "nonimmediate_operand" "=x")(unspec:DI [(match_operand:DI 1 "general_operand" "x")(match_operand:DI 2 "general_operand" "x")] 3466))]"CGEN_ENABLE_INSN_P (279)""cpssll3.w\\t%0,%1,%2"[(set_attr "may_trap" "no")(set_attr "latency" "0")(set_attr "length" "4")(set_attr "slot" "cop")(set_attr "slots" "p0_p1")(set_attr "stall" "none")])(define_insn "cgen_intrinsic_cpsll3_w_C3"[(set (match_operand:DI 0 "nonimmediate_operand" "=x")(unspec:DI [(match_operand:DI 1 "general_operand" "x")(match_operand:DI 2 "general_operand" "x")] 3468))]"CGEN_ENABLE_INSN_P (280)""cpsll3.w\\t%0,%1,%2"[(set_attr "may_trap" "no")(set_attr "latency" "0")(set_attr "length" "4")(set_attr "slot" "cop")(set_attr "slots" "c3")(set_attr "stall" "none")])(define_insn "cgen_intrinsic_cpsll3_w_P0_P1"[(set (match_operand:DI 0 "nonimmediate_operand" "=x")(unspec:DI [(match_operand:DI 1 "general_operand" "x")(match_operand:DI 2 "general_operand" "x")] 3468))]"CGEN_ENABLE_INSN_P (281)""cpsll3.w\\t%0,%1,%2"[(set_attr "may_trap" "no")(set_attr "latency" "0")(set_attr "length" "4")(set_attr "slot" "cop")(set_attr "slots" "p0_p1")(set_attr "stall" "none")])(define_insn "cgen_intrinsic_cpssll3_h_C3"[(set (match_operand:DI 0 "nonimmediate_operand" "=x")(unspec:DI [(match_operand:DI 1 "general_operand" "x")(match_operand:DI 2 "general_operand" "x")] 3470))]"CGEN_ENABLE_INSN_P (282)""cpssll3.h\\t%0,%1,%2"[(set_attr "may_trap" "no")(set_attr "latency" "0")(set_attr "length" "4")(set_attr "slot" "cop")(set_attr "slots" "c3")(set_attr "stall" "none")])(define_insn "cgen_intrinsic_cpssll3_h_P0_P1"[(set (match_operand:DI 0 "nonimmediate_operand" "=x")(unspec:DI [(match_operand:DI 1 "general_operand" "x")(match_operand:DI 2 "general_operand" "x")] 3470))]"CGEN_ENABLE_INSN_P (283)""cpssll3.h\\t%0,%1,%2"[(set_attr "may_trap" "no")(set_attr "latency" "0")(set_attr "length" "4")(set_attr "slot" "cop")(set_attr "slots" "p0_p1")(set_attr "stall" "none")])(define_insn "cgen_intrinsic_cpsll3_h_C3"[(set (match_operand:DI 0 "nonimmediate_operand" "=x")(unspec:DI [(match_operand:DI 1 "general_operand" "x")(match_operand:DI 2 "general_operand" "x")] 3472))]"CGEN_ENABLE_INSN_P (284)""cpsll3.h\\t%0,%1,%2"[(set_attr "may_trap" "no")(set_attr "latency" "0")(set_attr "length" "4")(set_attr "slot" "cop")(set_attr "slots" "c3")(set_attr "stall" "none")])(define_insn "cgen_intrinsic_cpsll3_h_P0_P1"[(set (match_operand:DI 0 "nonimmediate_operand" "=x")(unspec:DI [(match_operand:DI 1 "general_operand" "x")(match_operand:DI 2 "general_operand" "x")] 3472))]"CGEN_ENABLE_INSN_P (285)""cpsll3.h\\t%0,%1,%2"[(set_attr "may_trap" "no")(set_attr "latency" "0")(set_attr "length" "4")(set_attr "slot" "cop")(set_attr "slots" "p0_p1")(set_attr "stall" "none")])(define_insn "cgen_intrinsic_cpssll3_b_C3"[(set (match_operand:DI 0 "nonimmediate_operand" "=x")(unspec:DI [(match_operand:DI 1 "general_operand" "x")(match_operand:DI 2 "general_operand" "x")] 3474))]"CGEN_ENABLE_INSN_P (286)""cpssll3.b\\t%0,%1,%2"[(set_attr "may_trap" "no")(set_attr "latency" "0")(set_attr "length" "4")(set_attr "slot" "cop")(set_attr "slots" "c3")(set_attr "stall" "none")])(define_insn "cgen_intrinsic_cpssll3_b_P0_P1"[(set (match_operand:DI 0 "nonimmediate_operand" "=x")(unspec:DI [(match_operand:DI 1 "general_operand" "x")(match_operand:DI 2 "general_operand" "x")] 3474))]"CGEN_ENABLE_INSN_P (287)""cpssll3.b\\t%0,%1,%2"[(set_attr "may_trap" "no")(set_attr "latency" "0")(set_attr "length" "4")(set_attr "slot" "cop")(set_attr "slots" "p0_p1")(set_attr "stall" "none")])(define_insn "cgen_intrinsic_cpsll3_b_C3"[(set (match_operand:DI 0 "nonimmediate_operand" "=x")(unspec:DI [(match_operand:DI 1 "general_operand" "x")(match_operand:DI 2 "general_operand" "x")] 3476))]"CGEN_ENABLE_INSN_P (288)""cpsll3.b\\t%0,%1,%2"[(set_attr "may_trap" "no")(set_attr "latency" "0")(set_attr "length" "4")(set_attr "slot" "cop")(set_attr "slots" "c3")(set_attr "stall" "none")])(define_insn "cgen_intrinsic_cpsll3_b_P0_P1"[(set (match_operand:DI 0 "nonimmediate_operand" "=x")(unspec:DI [(match_operand:DI 1 "general_operand" "x")(match_operand:DI 2 "general_operand" "x")] 3476))]"CGEN_ENABLE_INSN_P (289)""cpsll3.b\\t%0,%1,%2"[(set_attr "may_trap" "no")(set_attr "latency" "0")(set_attr "length" "4")(set_attr "slot" "cop")(set_attr "slots" "p0_p1")(set_attr "stall" "none")])(define_insn "cgen_intrinsic_cdsra3_C3"[(set (match_operand:DI 0 "nonimmediate_operand" "=x")(unspec:DI [(match_operand:DI 1 "general_operand" "x")(match_operand:DI 2 "general_operand" "x")] 3478))]"CGEN_ENABLE_INSN_P (290)""cdsra3\\t%0,%1,%2"[(set_attr "may_trap" "no")(set_attr "latency" "0")(set_attr "length" "4")(set_attr "slot" "cop")(set_attr "slots" "c3")(set_attr "stall" "none")])(define_insn "cgen_intrinsic_cdsra3_P0_P1"[(set (match_operand:DI 0 "nonimmediate_operand" "=x")(unspec:DI [(match_operand:DI 1 "general_operand" "x")(match_operand:DI 2 "general_operand" "x")] 3478))]"CGEN_ENABLE_INSN_P (291)""cdsra3\\t%0,%1,%2"[(set_attr "may_trap" "no")(set_attr "latency" "0")(set_attr "length" "4")(set_attr "slot" "cop")(set_attr "slots" "p0_p1")(set_attr "stall" "none")])(define_insn "cgen_intrinsic_cpssra3_w_C3"[(set (match_operand:DI 0 "nonimmediate_operand" "=x")(unspec:DI [(match_operand:DI 1 "general_operand" "x")(match_operand:DI 2 "general_operand" "x")] 3480))]"CGEN_ENABLE_INSN_P (292)""cpssra3.w\\t%0,%1,%2"[(set_attr "may_trap" "no")(set_attr "latency" "0")(set_attr "length" "4")(set_attr "slot" "cop")(set_attr "slots" "c3")(set_attr "stall" "none")])(define_insn "cgen_intrinsic_cpssra3_w_P0_P1"[(set (match_operand:DI 0 "nonimmediate_operand" "=x")(unspec:DI [(match_operand:DI 1 "general_operand" "x")(match_operand:DI 2 "general_operand" "x")] 3480))]"CGEN_ENABLE_INSN_P (293)""cpssra3.w\\t%0,%1,%2"[(set_attr "may_trap" "no")(set_attr "latency" "0")(set_attr "length" "4")(set_attr "slot" "cop")(set_attr "slots" "p0_p1")(set_attr "stall" "none")])(define_insn "cgen_intrinsic_cpsra3_w_C3"[(set (match_operand:DI 0 "nonimmediate_operand" "=x")(unspec:DI [(match_operand:DI 1 "general_operand" "x")(match_operand:DI 2 "general_operand" "x")] 3482))]"CGEN_ENABLE_INSN_P (294)""cpsra3.w\\t%0,%1,%2"[(set_attr "may_trap" "no")(set_attr "latency" "0")(set_attr "length" "4")(set_attr "slot" "cop")(set_attr "slots" "c3")(set_attr "stall" "none")])(define_insn "cgen_intrinsic_cpsra3_w_P0_P1"[(set (match_operand:DI 0 "nonimmediate_operand" "=x")(unspec:DI [(match_operand:DI 1 "general_operand" "x")(match_operand:DI 2 "general_operand" "x")] 3482))]"CGEN_ENABLE_INSN_P (295)""cpsra3.w\\t%0,%1,%2"[(set_attr "may_trap" "no")(set_attr "latency" "0")(set_attr "length" "4")(set_attr "slot" "cop")(set_attr "slots" "p0_p1")(set_attr "stall" "none")])(define_insn "cgen_intrinsic_cpssra3_h_C3"[(set (match_operand:DI 0 "nonimmediate_operand" "=x")(unspec:DI [(match_operand:DI 1 "general_operand" "x")(match_operand:DI 2 "general_operand" "x")] 3484))]"CGEN_ENABLE_INSN_P (296)""cpssra3.h\\t%0,%1,%2"[(set_attr "may_trap" "no")(set_attr "latency" "0")(set_attr "length" "4")(set_attr "slot" "cop")(set_attr "slots" "c3")(set_attr "stall" "none")])(define_insn "cgen_intrinsic_cpssra3_h_P0_P1"[(set (match_operand:DI 0 "nonimmediate_operand" "=x")(unspec:DI [(match_operand:DI 1 "general_operand" "x")(match_operand:DI 2 "general_operand" "x")] 3484))]"CGEN_ENABLE_INSN_P (297)""cpssra3.h\\t%0,%1,%2"[(set_attr "may_trap" "no")(set_attr "latency" "0")(set_attr "length" "4")(set_attr "slot" "cop")(set_attr "slots" "p0_p1")(set_attr "stall" "none")])(define_insn "cgen_intrinsic_cpsra3_h_C3"[(set (match_operand:DI 0 "nonimmediate_operand" "=x")(unspec:DI [(match_operand:DI 1 "general_operand" "x")(match_operand:DI 2 "general_operand" "x")] 3486))]"CGEN_ENABLE_INSN_P (298)""cpsra3.h\\t%0,%1,%2"[(set_attr "may_trap" "no")(set_attr "latency" "0")(set_attr "length" "4")(set_attr "slot" "cop")(set_attr "slots" "c3")(set_attr "stall" "none")])(define_insn "cgen_intrinsic_cpsra3_h_P0_P1"[(set (match_operand:DI 0 "nonimmediate_operand" "=x")(unspec:DI [(match_operand:DI 1 "general_operand" "x")(match_operand:DI 2 "general_operand" "x")] 3486))]"CGEN_ENABLE_INSN_P (299)""cpsra3.h\\t%0,%1,%2"[(set_attr "may_trap" "no")(set_attr "latency" "0")(set_attr "length" "4")(set_attr "slot" "cop")(set_attr "slots" "p0_p1")(set_attr "stall" "none")])(define_insn "cgen_intrinsic_cpssra3_b_C3"[(set (match_operand:DI 0 "nonimmediate_operand" "=x")(unspec:DI [(match_operand:DI 1 "general_operand" "x")(match_operand:DI 2 "general_operand" "x")] 3488))]"CGEN_ENABLE_INSN_P (300)""cpssra3.b\\t%0,%1,%2"[(set_attr "may_trap" "no")(set_attr "latency" "0")(set_attr "length" "4")(set_attr "slot" "cop")(set_attr "slots" "c3")(set_attr "stall" "none")])(define_insn "cgen_intrinsic_cpssra3_b_P0_P1"[(set (match_operand:DI 0 "nonimmediate_operand" "=x")(unspec:DI [(match_operand:DI 1 "general_operand" "x")(match_operand:DI 2 "general_operand" "x")] 3488))]"CGEN_ENABLE_INSN_P (301)""cpssra3.b\\t%0,%1,%2"[(set_attr "may_trap" "no")(set_attr "latency" "0")(set_attr "length" "4")(set_attr "slot" "cop")(set_attr "slots" "p0_p1")(set_attr "stall" "none")])(define_insn "cgen_intrinsic_cpsra3_b_C3"[(set (match_operand:DI 0 "nonimmediate_operand" "=x")(unspec:DI [(match_operand:DI 1 "general_operand" "x")(match_operand:DI 2 "general_operand" "x")] 3490))]"CGEN_ENABLE_INSN_P (302)""cpsra3.b\\t%0,%1,%2"[(set_attr "may_trap" "no")(set_attr "latency" "0")(set_attr "length" "4")(set_attr "slot" "cop")(set_attr "slots" "c3")(set_attr "stall" "none")])(define_insn "cgen_intrinsic_cpsra3_b_P0_P1"[(set (match_operand:DI 0 "nonimmediate_operand" "=x")(unspec:DI [(match_operand:DI 1 "general_operand" "x")(match_operand:DI 2 "general_operand" "x")] 3490))]"CGEN_ENABLE_INSN_P (303)""cpsra3.b\\t%0,%1,%2"[(set_attr "may_trap" "no")(set_attr "latency" "0")(set_attr "length" "4")(set_attr "slot" "cop")(set_attr "slots" "p0_p1")(set_attr "stall" "none")])(define_insn "cgen_intrinsic_cdsrl3_C3"[(set (match_operand:DI 0 "nonimmediate_operand" "=x")(unspec:DI [(match_operand:DI 1 "general_operand" "x")(match_operand:DI 2 "general_operand" "x")] 3492))]"CGEN_ENABLE_INSN_P (304)""cdsrl3\\t%0,%1,%2"[(set_attr "may_trap" "no")(set_attr "latency" "0")(set_attr "length" "4")(set_attr "slot" "cop")(set_attr "slots" "c3")(set_attr "stall" "none")])(define_insn "cgen_intrinsic_cdsrl3_P0_P1"[(set (match_operand:DI 0 "nonimmediate_operand" "=x")(unspec:DI [(match_operand:DI 1 "general_operand" "x")(match_operand:DI 2 "general_operand" "x")] 3492))]"CGEN_ENABLE_INSN_P (305)""cdsrl3\\t%0,%1,%2"[(set_attr "may_trap" "no")(set_attr "latency" "0")(set_attr "length" "4")(set_attr "slot" "cop")(set_attr "slots" "p0_p1")(set_attr "stall" "none")])(define_insn "cgen_intrinsic_cpssrl3_w_C3"[(set (match_operand:DI 0 "nonimmediate_operand" "=x")(unspec:DI [(match_operand:DI 1 "general_operand" "x")(match_operand:DI 2 "general_operand" "x")] 3494))]"CGEN_ENABLE_INSN_P (306)""cpssrl3.w\\t%0,%1,%2"[(set_attr "may_trap" "no")(set_attr "latency" "0")(set_attr "length" "4")(set_attr "slot" "cop")(set_attr "slots" "c3")(set_attr "stall" "none")])(define_insn "cgen_intrinsic_cpssrl3_w_P0_P1"[(set (match_operand:DI 0 "nonimmediate_operand" "=x")(unspec:DI [(match_operand:DI 1 "general_operand" "x")(match_operand:DI 2 "general_operand" "x")] 3494))]"CGEN_ENABLE_INSN_P (307)""cpssrl3.w\\t%0,%1,%2"[(set_attr "may_trap" "no")(set_attr "latency" "0")(set_attr "length" "4")(set_attr "slot" "cop")(set_attr "slots" "p0_p1")(set_attr "stall" "none")])(define_insn "cgen_intrinsic_cpsrl3_w_C3"[(set (match_operand:DI 0 "nonimmediate_operand" "=x")(unspec:DI [(match_operand:DI 1 "general_operand" "x")(match_operand:DI 2 "general_operand" "x")] 3496))]"CGEN_ENABLE_INSN_P (308)""cpsrl3.w\\t%0,%1,%2"[(set_attr "may_trap" "no")(set_attr "latency" "0")(set_attr "length" "4")(set_attr "slot" "cop")(set_attr "slots" "c3")(set_attr "stall" "none")])(define_insn "cgen_intrinsic_cpsrl3_w_P0_P1"[(set (match_operand:DI 0 "nonimmediate_operand" "=x")(unspec:DI [(match_operand:DI 1 "general_operand" "x")(match_operand:DI 2 "general_operand" "x")] 3496))]"CGEN_ENABLE_INSN_P (309)""cpsrl3.w\\t%0,%1,%2"[(set_attr "may_trap" "no")(set_attr "latency" "0")(set_attr "length" "4")(set_attr "slot" "cop")(set_attr "slots" "p0_p1")(set_attr "stall" "none")])(define_insn "cgen_intrinsic_cpssrl3_h_C3"[(set (match_operand:DI 0 "nonimmediate_operand" "=x")(unspec:DI [(match_operand:DI 1 "general_operand" "x")(match_operand:DI 2 "general_operand" "x")] 3498))]"CGEN_ENABLE_INSN_P (310)""cpssrl3.h\\t%0,%1,%2"[(set_attr "may_trap" "no")(set_attr "latency" "0")(set_attr "length" "4")(set_attr "slot" "cop")(set_attr "slots" "c3")(set_attr "stall" "none")])(define_insn "cgen_intrinsic_cpssrl3_h_P0_P1"[(set (match_operand:DI 0 "nonimmediate_operand" "=x")(unspec:DI [(match_operand:DI 1 "general_operand" "x")(match_operand:DI 2 "general_operand" "x")] 3498))]"CGEN_ENABLE_INSN_P (311)""cpssrl3.h\\t%0,%1,%2"[(set_attr "may_trap" "no")(set_attr "latency" "0")(set_attr "length" "4")(set_attr "slot" "cop")(set_attr "slots" "p0_p1")(set_attr "stall" "none")])(define_insn "cgen_intrinsic_cpsrl3_h_C3"[(set (match_operand:DI 0 "nonimmediate_operand" "=x")(unspec:DI [(match_operand:DI 1 "general_operand" "x")(match_operand:DI 2 "general_operand" "x")] 3500))]"CGEN_ENABLE_INSN_P (312)""cpsrl3.h\\t%0,%1,%2"[(set_attr "may_trap" "no")(set_attr "latency" "0")(set_attr "length" "4")(set_attr "slot" "cop")(set_attr "slots" "c3")(set_attr "stall" "none")])(define_insn "cgen_intrinsic_cpsrl3_h_P0_P1"[(set (match_operand:DI 0 "nonimmediate_operand" "=x")(unspec:DI [(match_operand:DI 1 "general_operand" "x")(match_operand:DI 2 "general_operand" "x")] 3500))]"CGEN_ENABLE_INSN_P (313)""cpsrl3.h\\t%0,%1,%2"[(set_attr "may_trap" "no")(set_attr "latency" "0")(set_attr "length" "4")(set_attr "slot" "cop")(set_attr "slots" "p0_p1")(set_attr "stall" "none")])(define_insn "cgen_intrinsic_cpssrl3_b_C3"[(set (match_operand:DI 0 "nonimmediate_operand" "=x")(unspec:DI [(match_operand:DI 1 "general_operand" "x")(match_operand:DI 2 "general_operand" "x")] 3502))]"CGEN_ENABLE_INSN_P (314)""cpssrl3.b\\t%0,%1,%2"[(set_attr "may_trap" "no")(set_attr "latency" "0")(set_attr "length" "4")(set_attr "slot" "cop")(set_attr "slots" "c3")(set_attr "stall" "none")])(define_insn "cgen_intrinsic_cpssrl3_b_P0_P1"[(set (match_operand:DI 0 "nonimmediate_operand" "=x")(unspec:DI [(match_operand:DI 1 "general_operand" "x")(match_operand:DI 2 "general_operand" "x")] 3502))]"CGEN_ENABLE_INSN_P (315)""cpssrl3.b\\t%0,%1,%2"[(set_attr "may_trap" "no")(set_attr "latency" "0")(set_attr "length" "4")(set_attr "slot" "cop")(set_attr "slots" "p0_p1")(set_attr "stall" "none")])(define_insn "cgen_intrinsic_cpsrl3_b_C3"[(set (match_operand:DI 0 "nonimmediate_operand" "=x")(unspec:DI [(match_operand:DI 1 "general_operand" "x")(match_operand:DI 2 "general_operand" "x")] 3504))]"CGEN_ENABLE_INSN_P (316)""cpsrl3.b\\t%0,%1,%2"[(set_attr "may_trap" "no")(set_attr "latency" "0")(set_attr "length" "4")(set_attr "slot" "cop")(set_attr "slots" "c3")(set_attr "stall" "none")])(define_insn "cgen_intrinsic_cpsrl3_b_P0_P1"[(set (match_operand:DI 0 "nonimmediate_operand" "=x")(unspec:DI [(match_operand:DI 1 "general_operand" "x")(match_operand:DI 2 "general_operand" "x")] 3504))]"CGEN_ENABLE_INSN_P (317)""cpsrl3.b\\t%0,%1,%2"[(set_attr "may_trap" "no")(set_attr "latency" "0")(set_attr "length" "4")(set_attr "slot" "cop")(set_attr "slots" "p0_p1")(set_attr "stall" "none")])(define_insn "cgen_intrinsic_cpmin3_w_C3"[(set (match_operand:DI 0 "nonimmediate_operand" "=x")(unspec:DI [(match_operand:DI 1 "general_operand" "x")(match_operand:DI 2 "general_operand" "x")] 3390))]"CGEN_ENABLE_INSN_P (318)""cpmin3.w\\t%0,%1,%2"[(set_attr "may_trap" "no")(set_attr "latency" "0")(set_attr "length" "4")(set_attr "slot" "cop")(set_attr "slots" "c3")(set_attr "stall" "none")])(define_insn "cgen_intrinsic_cpmin3_w_P0_P1"[(set (match_operand:DI 0 "nonimmediate_operand" "=x")(unspec:DI [(match_operand:DI 1 "general_operand" "x")(match_operand:DI 2 "general_operand" "x")] 3390))]"CGEN_ENABLE_INSN_P (319)""cpmin3.w\\t%0,%1,%2"[(set_attr "may_trap" "no")(set_attr "latency" "0")(set_attr "length" "4")(set_attr "slot" "cop")(set_attr "slots" "p0_p1")(set_attr "stall" "none")])(define_insn "cgen_intrinsic_cpminu3_w_C3"[(set (match_operand:DI 0 "nonimmediate_operand" "=x")(unspec:DI [(match_operand:DI 1 "general_operand" "x")(match_operand:DI 2 "general_operand" "x")] 3392))]"CGEN_ENABLE_INSN_P (320)""cpminu3.w\\t%0,%1,%2"[(set_attr "may_trap" "no")(set_attr "latency" "0")(set_attr "length" "4")(set_attr "slot" "cop")(set_attr "slots" "c3")(set_attr "stall" "none")])(define_insn "cgen_intrinsic_cpminu3_w_P0_P1"[(set (match_operand:DI 0 "nonimmediate_operand" "=x")(unspec:DI [(match_operand:DI 1 "general_operand" "x")(match_operand:DI 2 "general_operand" "x")] 3392))]"CGEN_ENABLE_INSN_P (321)""cpminu3.w\\t%0,%1,%2"[(set_attr "may_trap" "no")(set_attr "latency" "0")(set_attr "length" "4")(set_attr "slot" "cop")(set_attr "slots" "p0_p1")(set_attr "stall" "none")])(define_insn "cgen_intrinsic_cpmin3_h_C3"[(set (match_operand:DI 0 "nonimmediate_operand" "=x")(unspec:DI [(match_operand:DI 1 "general_operand" "x")(match_operand:DI 2 "general_operand" "x")] 3394))]"CGEN_ENABLE_INSN_P (322)""cpmin3.h\\t%0,%1,%2"[(set_attr "may_trap" "no")(set_attr "latency" "0")(set_attr "length" "4")(set_attr "slot" "cop")(set_attr "slots" "c3")(set_attr "stall" "none")])(define_insn "cgen_intrinsic_cpmin3_h_P0_P1"[(set (match_operand:DI 0 "nonimmediate_operand" "=x")(unspec:DI [(match_operand:DI 1 "general_operand" "x")(match_operand:DI 2 "general_operand" "x")] 3394))]"CGEN_ENABLE_INSN_P (323)""cpmin3.h\\t%0,%1,%2"[(set_attr "may_trap" "no")(set_attr "latency" "0")(set_attr "length" "4")(set_attr "slot" "cop")(set_attr "slots" "p0_p1")(set_attr "stall" "none")])(define_insn "cgen_intrinsic_cpmin3_b_C3"[(set (match_operand:DI 0 "nonimmediate_operand" "=x")(unspec:DI [(match_operand:DI 1 "general_operand" "x")(match_operand:DI 2 "general_operand" "x")] 3396))]"CGEN_ENABLE_INSN_P (324)""cpmin3.b\\t%0,%1,%2"[(set_attr "may_trap" "no")(set_attr "latency" "0")(set_attr "length" "4")(set_attr "slot" "cop")(set_attr "slots" "c3")(set_attr "stall" "none")])(define_insn "cgen_intrinsic_cpmin3_b_P0_P1"[(set (match_operand:DI 0 "nonimmediate_operand" "=x")(unspec:DI [(match_operand:DI 1 "general_operand" "x")(match_operand:DI 2 "general_operand" "x")] 3396))]"CGEN_ENABLE_INSN_P (325)""cpmin3.b\\t%0,%1,%2"[(set_attr "may_trap" "no")(set_attr "latency" "0")(set_attr "length" "4")(set_attr "slot" "cop")(set_attr "slots" "p0_p1")(set_attr "stall" "none")])(define_insn "cgen_intrinsic_cpminu3_b_C3"[(set (match_operand:DI 0 "nonimmediate_operand" "=x")(unspec:DI [(match_operand:DI 1 "general_operand" "x")(match_operand:DI 2 "general_operand" "x")] 3398))]"CGEN_ENABLE_INSN_P (326)""cpminu3.b\\t%0,%1,%2"[(set_attr "may_trap" "no")(set_attr "latency" "0")(set_attr "length" "4")(set_attr "slot" "cop")(set_attr "slots" "c3")(set_attr "stall" "none")])(define_insn "cgen_intrinsic_cpminu3_b_P0_P1"[(set (match_operand:DI 0 "nonimmediate_operand" "=x")(unspec:DI [(match_operand:DI 1 "general_operand" "x")(match_operand:DI 2 "general_operand" "x")] 3398))]"CGEN_ENABLE_INSN_P (327)""cpminu3.b\\t%0,%1,%2"[(set_attr "may_trap" "no")(set_attr "latency" "0")(set_attr "length" "4")(set_attr "slot" "cop")(set_attr "slots" "p0_p1")(set_attr "stall" "none")])(define_insn "cgen_intrinsic_cpmax3_w_C3"[(set (match_operand:DI 0 "nonimmediate_operand" "=x")(unspec:DI [(match_operand:DI 1 "general_operand" "x")(match_operand:DI 2 "general_operand" "x")] 3400))]"CGEN_ENABLE_INSN_P (328)""cpmax3.w\\t%0,%1,%2"[(set_attr "may_trap" "no")(set_attr "latency" "0")(set_attr "length" "4")(set_attr "slot" "cop")(set_attr "slots" "c3")(set_attr "stall" "none")])(define_insn "cgen_intrinsic_cpmax3_w_P0_P1"[(set (match_operand:DI 0 "nonimmediate_operand" "=x")(unspec:DI [(match_operand:DI 1 "general_operand" "x")(match_operand:DI 2 "general_operand" "x")] 3400))]"CGEN_ENABLE_INSN_P (329)""cpmax3.w\\t%0,%1,%2"[(set_attr "may_trap" "no")(set_attr "latency" "0")(set_attr "length" "4")(set_attr "slot" "cop")(set_attr "slots" "p0_p1")(set_attr "stall" "none")])(define_insn "cgen_intrinsic_cpmaxu3_w_C3"[(set (match_operand:DI 0 "nonimmediate_operand" "=x")(unspec:DI [(match_operand:DI 1 "general_operand" "x")(match_operand:DI 2 "general_operand" "x")] 3402))]"CGEN_ENABLE_INSN_P (330)""cpmaxu3.w\\t%0,%1,%2"[(set_attr "may_trap" "no")(set_attr "latency" "0")(set_attr "length" "4")(set_attr "slot" "cop")(set_attr "slots" "c3")(set_attr "stall" "none")])(define_insn "cgen_intrinsic_cpmaxu3_w_P0_P1"[(set (match_operand:DI 0 "nonimmediate_operand" "=x")(unspec:DI [(match_operand:DI 1 "general_operand" "x")(match_operand:DI 2 "general_operand" "x")] 3402))]"CGEN_ENABLE_INSN_P (331)""cpmaxu3.w\\t%0,%1,%2"[(set_attr "may_trap" "no")(set_attr "latency" "0")(set_attr "length" "4")(set_attr "slot" "cop")(set_attr "slots" "p0_p1")(set_attr "stall" "none")])(define_insn "cgen_intrinsic_cpmax3_h_C3"[(set (match_operand:DI 0 "nonimmediate_operand" "=x")(unspec:DI [(match_operand:DI 1 "general_operand" "x")(match_operand:DI 2 "general_operand" "x")] 3404))]"CGEN_ENABLE_INSN_P (332)""cpmax3.h\\t%0,%1,%2"[(set_attr "may_trap" "no")(set_attr "latency" "0")(set_attr "length" "4")(set_attr "slot" "cop")(set_attr "slots" "c3")(set_attr "stall" "none")])(define_insn "cgen_intrinsic_cpmax3_h_P0_P1"[(set (match_operand:DI 0 "nonimmediate_operand" "=x")(unspec:DI [(match_operand:DI 1 "general_operand" "x")(match_operand:DI 2 "general_operand" "x")] 3404))]"CGEN_ENABLE_INSN_P (333)""cpmax3.h\\t%0,%1,%2"[(set_attr "may_trap" "no")(set_attr "latency" "0")(set_attr "length" "4")(set_attr "slot" "cop")(set_attr "slots" "p0_p1")(set_attr "stall" "none")])(define_insn "cgen_intrinsic_cpmax3_b_C3"[(set (match_operand:DI 0 "nonimmediate_operand" "=x")(unspec:DI [(match_operand:DI 1 "general_operand" "x")(match_operand:DI 2 "general_operand" "x")] 3406))]"CGEN_ENABLE_INSN_P (334)""cpmax3.b\\t%0,%1,%2"[(set_attr "may_trap" "no")(set_attr "latency" "0")(set_attr "length" "4")(set_attr "slot" "cop")(set_attr "slots" "c3")(set_attr "stall" "none")])(define_insn "cgen_intrinsic_cpmax3_b_P0_P1"[(set (match_operand:DI 0 "nonimmediate_operand" "=x")(unspec:DI [(match_operand:DI 1 "general_operand" "x")(match_operand:DI 2 "general_operand" "x")] 3406))]"CGEN_ENABLE_INSN_P (335)""cpmax3.b\\t%0,%1,%2"[(set_attr "may_trap" "no")(set_attr "latency" "0")(set_attr "length" "4")(set_attr "slot" "cop")(set_attr "slots" "p0_p1")(set_attr "stall" "none")])(define_insn "cgen_intrinsic_cpmaxu3_b_C3"[(set (match_operand:DI 0 "nonimmediate_operand" "=x")(unspec:DI [(match_operand:DI 1 "general_operand" "x")(match_operand:DI 2 "general_operand" "x")] 3408))]"CGEN_ENABLE_INSN_P (336)""cpmaxu3.b\\t%0,%1,%2"[(set_attr "may_trap" "no")(set_attr "latency" "0")(set_attr "length" "4")(set_attr "slot" "cop")(set_attr "slots" "c3")(set_attr "stall" "none")])(define_insn "cgen_intrinsic_cpmaxu3_b_P0_P1"[(set (match_operand:DI 0 "nonimmediate_operand" "=x")(unspec:DI [(match_operand:DI 1 "general_operand" "x")(match_operand:DI 2 "general_operand" "x")] 3408))]"CGEN_ENABLE_INSN_P (337)""cpmaxu3.b\\t%0,%1,%2"[(set_attr "may_trap" "no")(set_attr "latency" "0")(set_attr "length" "4")(set_attr "slot" "cop")(set_attr "slots" "p0_p1")(set_attr "stall" "none")])(define_insn "cgen_intrinsic_cppack_h_C3"[(set (match_operand:DI 0 "nonimmediate_operand" "=x")(unspec:DI [(match_operand:DI 1 "general_operand" "x")(match_operand:DI 2 "general_operand" "x")] 3506))]"CGEN_ENABLE_INSN_P (338)""cppack.h\\t%0,%1,%2"[(set_attr "may_trap" "no")(set_attr "latency" "0")(set_attr "length" "4")(set_attr "slot" "cop")(set_attr "slots" "c3")(set_attr "stall" "none")])(define_insn "cgen_intrinsic_cppack_h_P0_P1"[(set (match_operand:DI 0 "nonimmediate_operand" "=x")(unspec:DI [(match_operand:DI 1 "general_operand" "x")(match_operand:DI 2 "general_operand" "x")] 3506))]"CGEN_ENABLE_INSN_P (339)""cppack.h\\t%0,%1,%2"[(set_attr "may_trap" "no")(set_attr "latency" "0")(set_attr "length" "4")(set_attr "slot" "cop")(set_attr "slots" "p0_p1")(set_attr "stall" "none")])(define_insn "cgen_intrinsic_cppack_b_C3"[(set (match_operand:DI 0 "nonimmediate_operand" "=x")(unspec:DI [(match_operand:DI 1 "general_operand" "x")(match_operand:DI 2 "general_operand" "x")] 3508))]"CGEN_ENABLE_INSN_P (340)""cppack.b\\t%0,%1,%2"[(set_attr "may_trap" "no")(set_attr "latency" "0")(set_attr "length" "4")(set_attr "slot" "cop")(set_attr "slots" "c3")(set_attr "stall" "none")])(define_insn "cgen_intrinsic_cppack_b_P0_P1"[(set (match_operand:DI 0 "nonimmediate_operand" "=x")(unspec:DI [(match_operand:DI 1 "general_operand" "x")(match_operand:DI 2 "general_operand" "x")] 3508))]"CGEN_ENABLE_INSN_P (341)""cppack.b\\t%0,%1,%2"[(set_attr "may_trap" "no")(set_attr "latency" "0")(set_attr "length" "4")(set_attr "slot" "cop")(set_attr "slots" "p0_p1")(set_attr "stall" "none")])(define_insn "cgen_intrinsic_cppacku_b_C3"[(set (match_operand:DI 0 "nonimmediate_operand" "=x")(unspec:DI [(match_operand:DI 1 "general_operand" "x")(match_operand:DI 2 "general_operand" "x")] 3510))]"CGEN_ENABLE_INSN_P (342)""cppacku.b\\t%0,%1,%2"[(set_attr "may_trap" "no")(set_attr "latency" "0")(set_attr "length" "4")(set_attr "slot" "cop")(set_attr "slots" "c3")(set_attr "stall" "none")])(define_insn "cgen_intrinsic_cppacku_b_P0_P1"[(set (match_operand:DI 0 "nonimmediate_operand" "=x")(unspec:DI [(match_operand:DI 1 "general_operand" "x")(match_operand:DI 2 "general_operand" "x")] 3510))]"CGEN_ENABLE_INSN_P (343)""cppacku.b\\t%0,%1,%2"[(set_attr "may_trap" "no")(set_attr "latency" "0")(set_attr "length" "4")(set_attr "slot" "cop")(set_attr "slots" "p0_p1")(set_attr "stall" "none")])(define_insn "cgen_intrinsic_cpxor3_C3"[(set (match_operand:DI 0 "nonimmediate_operand" "=x")(unspec:DI [(match_operand:DI 1 "general_operand" "x")(match_operand:DI 2 "general_operand" "x")] 3532))]"CGEN_ENABLE_INSN_P (344)""cpxor3\\t%0,%1,%2"[(set_attr "may_trap" "no")(set_attr "latency" "0")(set_attr "length" "4")(set_attr "slot" "cop")(set_attr "slots" "c3")(set_attr "stall" "none")])(define_insn "cgen_intrinsic_cpxor3_P0_P1"[(set (match_operand:DI 0 "nonimmediate_operand" "=x")(unspec:DI [(match_operand:DI 1 "general_operand" "x")(match_operand:DI 2 "general_operand" "x")] 3532))]"CGEN_ENABLE_INSN_P (345)""cpxor3\\t%0,%1,%2"[(set_attr "may_trap" "no")(set_attr "latency" "0")(set_attr "length" "4")(set_attr "slot" "cop")(set_attr "slots" "p0_p1")(set_attr "stall" "none")])(define_insn "cgen_intrinsic_cpnor3_C3"[(set (match_operand:DI 0 "nonimmediate_operand" "=x")(unspec:DI [(match_operand:DI 1 "general_operand" "x")(match_operand:DI 2 "general_operand" "x")] 3534))]"CGEN_ENABLE_INSN_P (346)""cpnor3\\t%0,%1,%2"[(set_attr "may_trap" "no")(set_attr "latency" "0")(set_attr "length" "4")(set_attr "slot" "cop")(set_attr "slots" "c3")(set_attr "stall" "none")])(define_insn "cgen_intrinsic_cpnor3_P0_P1"[(set (match_operand:DI 0 "nonimmediate_operand" "=x")(unspec:DI [(match_operand:DI 1 "general_operand" "x")(match_operand:DI 2 "general_operand" "x")] 3534))]"CGEN_ENABLE_INSN_P (347)""cpnor3\\t%0,%1,%2"[(set_attr "may_trap" "no")(set_attr "latency" "0")(set_attr "length" "4")(set_attr "slot" "cop")(set_attr "slots" "p0_p1")(set_attr "stall" "none")])(define_insn "cgen_intrinsic_cpor3_C3"[(set (match_operand:DI 0 "nonimmediate_operand" "=x")(unspec:DI [(match_operand:DI 1 "general_operand" "x")(match_operand:DI 2 "general_operand" "x")] 3536))]"CGEN_ENABLE_INSN_P (348)""cpor3\\t%0,%1,%2"[(set_attr "may_trap" "no")(set_attr "latency" "0")(set_attr "length" "4")(set_attr "slot" "cop")(set_attr "slots" "c3")(set_attr "stall" "none")])(define_insn "cgen_intrinsic_cpor3_P0_P1"[(set (match_operand:DI 0 "nonimmediate_operand" "=x")(unspec:DI [(match_operand:DI 1 "general_operand" "x")(match_operand:DI 2 "general_operand" "x")] 3536))]"CGEN_ENABLE_INSN_P (349)""cpor3\\t%0,%1,%2"[(set_attr "may_trap" "no")(set_attr "latency" "0")(set_attr "length" "4")(set_attr "slot" "cop")(set_attr "slots" "p0_p1")(set_attr "stall" "none")])(define_insn "cgen_intrinsic_cpand3_C3"[(set (match_operand:DI 0 "nonimmediate_operand" "=x")(unspec:DI [(match_operand:DI 1 "general_operand" "x")(match_operand:DI 2 "general_operand" "x")] 3538))]"CGEN_ENABLE_INSN_P (350)""cpand3\\t%0,%1,%2"[(set_attr "may_trap" "no")(set_attr "latency" "0")(set_attr "length" "4")(set_attr "slot" "cop")(set_attr "slots" "c3")(set_attr "stall" "none")])(define_insn "cgen_intrinsic_cpand3_P0_P1"[(set (match_operand:DI 0 "nonimmediate_operand" "=x")(unspec:DI [(match_operand:DI 1 "general_operand" "x")(match_operand:DI 2 "general_operand" "x")] 3538))]"CGEN_ENABLE_INSN_P (351)""cpand3\\t%0,%1,%2"[(set_attr "may_trap" "no")(set_attr "latency" "0")(set_attr "length" "4")(set_attr "slot" "cop")(set_attr "slots" "p0_p1")(set_attr "stall" "none")])(define_insn "cgen_intrinsic_cpabs3_h_C3"[(set (match_operand:DI 0 "nonimmediate_operand" "=x")(unspec:DI [(match_operand:DI 1 "general_operand" "x")(match_operand:DI 2 "general_operand" "x")] 3410))]"CGEN_ENABLE_INSN_P (352)""cpabs3.h\\t%0,%1,%2"[(set_attr "may_trap" "no")(set_attr "latency" "0")(set_attr "length" "4")(set_attr "slot" "cop")(set_attr "slots" "c3")(set_attr "stall" "none")])(define_insn "cgen_intrinsic_cpabs3_h_P0_P1"[(set (match_operand:DI 0 "nonimmediate_operand" "=x")(unspec:DI [(match_operand:DI 1 "general_operand" "x")(match_operand:DI 2 "general_operand" "x")] 3410))]"CGEN_ENABLE_INSN_P (353)""cpabs3.h\\t%0,%1,%2"[(set_attr "may_trap" "no")(set_attr "latency" "0")(set_attr "length" "4")(set_attr "slot" "cop")(set_attr "slots" "p0_p1")(set_attr "stall" "none")])(define_insn "cgen_intrinsic_cpabs3_b_C3"[(set (match_operand:DI 0 "nonimmediate_operand" "=x")(unspec:DI [(match_operand:DI 1 "general_operand" "x")(match_operand:DI 2 "general_operand" "x")] 3412))]"CGEN_ENABLE_INSN_P (354)""cpabs3.b\\t%0,%1,%2"[(set_attr "may_trap" "no")(set_attr "latency" "0")(set_attr "length" "4")(set_attr "slot" "cop")(set_attr "slots" "c3")(set_attr "stall" "none")])(define_insn "cgen_intrinsic_cpabs3_b_P0_P1"[(set (match_operand:DI 0 "nonimmediate_operand" "=x")(unspec:DI [(match_operand:DI 1 "general_operand" "x")(match_operand:DI 2 "general_operand" "x")] 3412))]"CGEN_ENABLE_INSN_P (355)""cpabs3.b\\t%0,%1,%2"[(set_attr "may_trap" "no")(set_attr "latency" "0")(set_attr "length" "4")(set_attr "slot" "cop")(set_attr "slots" "p0_p1")(set_attr "stall" "none")])(define_insn "cgen_intrinsic_cpabsu3_b_C3"[(set (match_operand:DI 0 "nonimmediate_operand" "=x")(unspec:DI [(match_operand:DI 1 "general_operand" "x")(match_operand:DI 2 "general_operand" "x")] 3414))]"CGEN_ENABLE_INSN_P (356)""cpabsu3.b\\t%0,%1,%2"[(set_attr "may_trap" "no")(set_attr "latency" "0")(set_attr "length" "4")(set_attr "slot" "cop")(set_attr "slots" "c3")(set_attr "stall" "none")])(define_insn "cgen_intrinsic_cpabsu3_b_P0_P1"[(set (match_operand:DI 0 "nonimmediate_operand" "=x")(unspec:DI [(match_operand:DI 1 "general_operand" "x")(match_operand:DI 2 "general_operand" "x")] 3414))]"CGEN_ENABLE_INSN_P (357)""cpabsu3.b\\t%0,%1,%2"[(set_attr "may_trap" "no")(set_attr "latency" "0")(set_attr "length" "4")(set_attr "slot" "cop")(set_attr "slots" "p0_p1")(set_attr "stall" "none")])(define_insn "cgen_intrinsic_cpaddsr3_w_C3"[(set (match_operand:DI 0 "nonimmediate_operand" "=x")(unspec:DI [(match_operand:DI 1 "general_operand" "x")(match_operand:DI 2 "general_operand" "x")] 3416))]"CGEN_ENABLE_INSN_P (358)""cpaddsr3.w\\t%0,%1,%2"[(set_attr "may_trap" "no")(set_attr "latency" "0")(set_attr "length" "4")(set_attr "slot" "cop")(set_attr "slots" "c3")(set_attr "stall" "none")])(define_insn "cgen_intrinsic_cpaddsr3_w_P0_P1"[(set (match_operand:DI 0 "nonimmediate_operand" "=x")(unspec:DI [(match_operand:DI 1 "general_operand" "x")(match_operand:DI 2 "general_operand" "x")] 3416))]"CGEN_ENABLE_INSN_P (359)""cpaddsr3.w\\t%0,%1,%2"[(set_attr "may_trap" "no")(set_attr "latency" "0")(set_attr "length" "4")(set_attr "slot" "cop")(set_attr "slots" "p0_p1")(set_attr "stall" "none")])(define_insn "cgen_intrinsic_cpaddsr3_h_C3"[(set (match_operand:DI 0 "nonimmediate_operand" "=x")(unspec:DI [(match_operand:DI 1 "general_operand" "x")(match_operand:DI 2 "general_operand" "x")] 3418))]"CGEN_ENABLE_INSN_P (360)""cpaddsr3.h\\t%0,%1,%2"[(set_attr "may_trap" "no")(set_attr "latency" "0")(set_attr "length" "4")(set_attr "slot" "cop")(set_attr "slots" "c3")(set_attr "stall" "none")])(define_insn "cgen_intrinsic_cpaddsr3_h_P0_P1"[(set (match_operand:DI 0 "nonimmediate_operand" "=x")(unspec:DI [(match_operand:DI 1 "general_operand" "x")(match_operand:DI 2 "general_operand" "x")] 3418))]"CGEN_ENABLE_INSN_P (361)""cpaddsr3.h\\t%0,%1,%2"[(set_attr "may_trap" "no")(set_attr "latency" "0")(set_attr "length" "4")(set_attr "slot" "cop")(set_attr "slots" "p0_p1")(set_attr "stall" "none")])(define_insn "cgen_intrinsic_cpaddsr3_b_C3"[(set (match_operand:DI 0 "nonimmediate_operand" "=x")(unspec:DI [(match_operand:DI 1 "general_operand" "x")(match_operand:DI 2 "general_operand" "x")] 3420))]"CGEN_ENABLE_INSN_P (362)""cpaddsr3.b\\t%0,%1,%2"[(set_attr "may_trap" "no")(set_attr "latency" "0")(set_attr "length" "4")(set_attr "slot" "cop")(set_attr "slots" "c3")(set_attr "stall" "none")])(define_insn "cgen_intrinsic_cpaddsr3_b_P0_P1"[(set (match_operand:DI 0 "nonimmediate_operand" "=x")(unspec:DI [(match_operand:DI 1 "general_operand" "x")(match_operand:DI 2 "general_operand" "x")] 3420))]"CGEN_ENABLE_INSN_P (363)""cpaddsr3.b\\t%0,%1,%2"[(set_attr "may_trap" "no")(set_attr "latency" "0")(set_attr "length" "4")(set_attr "slot" "cop")(set_attr "slots" "p0_p1")(set_attr "stall" "none")])(define_insn "cgen_intrinsic_cpaddsru3_b_C3"[(set (match_operand:DI 0 "nonimmediate_operand" "=x")(unspec:DI [(match_operand:DI 1 "general_operand" "x")(match_operand:DI 2 "general_operand" "x")] 3422))]"CGEN_ENABLE_INSN_P (364)""cpaddsru3.b\\t%0,%1,%2"[(set_attr "may_trap" "no")(set_attr "latency" "0")(set_attr "length" "4")(set_attr "slot" "cop")(set_attr "slots" "c3")(set_attr "stall" "none")])(define_insn "cgen_intrinsic_cpaddsru3_b_P0_P1"[(set (match_operand:DI 0 "nonimmediate_operand" "=x")(unspec:DI [(match_operand:DI 1 "general_operand" "x")(match_operand:DI 2 "general_operand" "x")] 3422))]"CGEN_ENABLE_INSN_P (365)""cpaddsru3.b\\t%0,%1,%2"[(set_attr "may_trap" "no")(set_attr "latency" "0")(set_attr "length" "4")(set_attr "slot" "cop")(set_attr "slots" "p0_p1")(set_attr "stall" "none")])(define_insn "cgen_intrinsic_cpave3_w_C3"[(set (match_operand:DI 0 "nonimmediate_operand" "=x")(unspec:DI [(match_operand:DI 1 "general_operand" "x")(match_operand:DI 2 "general_operand" "x")] 3424))]"CGEN_ENABLE_INSN_P (366)""cpave3.w\\t%0,%1,%2"[(set_attr "may_trap" "no")(set_attr "latency" "0")(set_attr "length" "4")(set_attr "slot" "cop")(set_attr "slots" "c3")(set_attr "stall" "none")])(define_insn "cgen_intrinsic_cpave3_w_P0_P1"[(set (match_operand:DI 0 "nonimmediate_operand" "=x")(unspec:DI [(match_operand:DI 1 "general_operand" "x")(match_operand:DI 2 "general_operand" "x")] 3424))]"CGEN_ENABLE_INSN_P (367)""cpave3.w\\t%0,%1,%2"[(set_attr "may_trap" "no")(set_attr "latency" "0")(set_attr "length" "4")(set_attr "slot" "cop")(set_attr "slots" "p0_p1")(set_attr "stall" "none")])(define_insn "cgen_intrinsic_cpave3_h_C3"[(set (match_operand:DI 0 "nonimmediate_operand" "=x")(unspec:DI [(match_operand:DI 1 "general_operand" "x")(match_operand:DI 2 "general_operand" "x")] 3426))]"CGEN_ENABLE_INSN_P (368)""cpave3.h\\t%0,%1,%2"[(set_attr "may_trap" "no")(set_attr "latency" "0")(set_attr "length" "4")(set_attr "slot" "cop")(set_attr "slots" "c3")(set_attr "stall" "none")])(define_insn "cgen_intrinsic_cpave3_h_P0_P1"[(set (match_operand:DI 0 "nonimmediate_operand" "=x")(unspec:DI [(match_operand:DI 1 "general_operand" "x")(match_operand:DI 2 "general_operand" "x")] 3426))]"CGEN_ENABLE_INSN_P (369)""cpave3.h\\t%0,%1,%2"[(set_attr "may_trap" "no")(set_attr "latency" "0")(set_attr "length" "4")(set_attr "slot" "cop")(set_attr "slots" "p0_p1")(set_attr "stall" "none")])(define_insn "cgen_intrinsic_cpave3_b_C3"[(set (match_operand:DI 0 "nonimmediate_operand" "=x")(unspec:DI [(match_operand:DI 1 "general_operand" "x")(match_operand:DI 2 "general_operand" "x")] 3428))]"CGEN_ENABLE_INSN_P (370)""cpave3.b\\t%0,%1,%2"[(set_attr "may_trap" "no")(set_attr "latency" "0")(set_attr "length" "4")(set_attr "slot" "cop")(set_attr "slots" "c3")(set_attr "stall" "none")])(define_insn "cgen_intrinsic_cpave3_b_P0_P1"[(set (match_operand:DI 0 "nonimmediate_operand" "=x")(unspec:DI [(match_operand:DI 1 "general_operand" "x")(match_operand:DI 2 "general_operand" "x")] 3428))]"CGEN_ENABLE_INSN_P (371)""cpave3.b\\t%0,%1,%2"[(set_attr "may_trap" "no")(set_attr "latency" "0")(set_attr "length" "4")(set_attr "slot" "cop")(set_attr "slots" "p0_p1")(set_attr "stall" "none")])(define_insn "cgen_intrinsic_cpaveu3_b_C3"[(set (match_operand:DI 0 "nonimmediate_operand" "=x")(unspec:DI [(match_operand:DI 1 "general_operand" "x")(match_operand:DI 2 "general_operand" "x")] 3430))]"CGEN_ENABLE_INSN_P (372)""cpaveu3.b\\t%0,%1,%2"[(set_attr "may_trap" "no")(set_attr "latency" "0")(set_attr "length" "4")(set_attr "slot" "cop")(set_attr "slots" "c3")(set_attr "stall" "none")])(define_insn "cgen_intrinsic_cpaveu3_b_P0_P1"[(set (match_operand:DI 0 "nonimmediate_operand" "=x")(unspec:DI [(match_operand:DI 1 "general_operand" "x")(match_operand:DI 2 "general_operand" "x")] 3430))]"CGEN_ENABLE_INSN_P (373)""cpaveu3.b\\t%0,%1,%2"[(set_attr "may_trap" "no")(set_attr "latency" "0")(set_attr "length" "4")(set_attr "slot" "cop")(set_attr "slots" "p0_p1")(set_attr "stall" "none")])(define_insn "cgen_intrinsic_cpextlsub3_b_C3"[(set (match_operand:DI 0 "nonimmediate_operand" "=x")(unspec:DI [(match_operand:DI 1 "general_operand" "x")(match_operand:DI 2 "general_operand" "x")] 3432))]"CGEN_ENABLE_INSN_P (374)""cpextlsub3.b\\t%0,%1,%2"[(set_attr "may_trap" "no")(set_attr "latency" "0")(set_attr "length" "4")(set_attr "slot" "cop")(set_attr "slots" "c3")(set_attr "stall" "none")])(define_insn "cgen_intrinsic_cpextlsub3_b_P0_P1"[(set (match_operand:DI 0 "nonimmediate_operand" "=x")(unspec:DI [(match_operand:DI 1 "general_operand" "x")(match_operand:DI 2 "general_operand" "x")] 3432))]"CGEN_ENABLE_INSN_P (375)""cpextlsub3.b\\t%0,%1,%2"[(set_attr "may_trap" "no")(set_attr "latency" "0")(set_attr "length" "4")(set_attr "slot" "cop")(set_attr "slots" "p0_p1")(set_attr "stall" "none")])(define_insn "cgen_intrinsic_cpextlsubu3_b_C3"[(set (match_operand:DI 0 "nonimmediate_operand" "=x")(unspec:DI [(match_operand:DI 1 "general_operand" "x")(match_operand:DI 2 "general_operand" "x")] 3434))]"CGEN_ENABLE_INSN_P (376)""cpextlsubu3.b\\t%0,%1,%2"[(set_attr "may_trap" "no")(set_attr "latency" "0")(set_attr "length" "4")(set_attr "slot" "cop")(set_attr "slots" "c3")(set_attr "stall" "none")])(define_insn "cgen_intrinsic_cpextlsubu3_b_P0_P1"[(set (match_operand:DI 0 "nonimmediate_operand" "=x")(unspec:DI [(match_operand:DI 1 "general_operand" "x")(match_operand:DI 2 "general_operand" "x")] 3434))]"CGEN_ENABLE_INSN_P (377)""cpextlsubu3.b\\t%0,%1,%2"[(set_attr "may_trap" "no")(set_attr "latency" "0")(set_attr "length" "4")(set_attr "slot" "cop")(set_attr "slots" "p0_p1")(set_attr "stall" "none")])(define_insn "cgen_intrinsic_cpextusub3_b_C3"[(set (match_operand:DI 0 "nonimmediate_operand" "=x")(unspec:DI [(match_operand:DI 1 "general_operand" "x")(match_operand:DI 2 "general_operand" "x")] 3436))]"CGEN_ENABLE_INSN_P (378)""cpextusub3.b\\t%0,%1,%2"[(set_attr "may_trap" "no")(set_attr "latency" "0")(set_attr "length" "4")(set_attr "slot" "cop")(set_attr "slots" "c3")(set_attr "stall" "none")])(define_insn "cgen_intrinsic_cpextusub3_b_P0_P1"[(set (match_operand:DI 0 "nonimmediate_operand" "=x")(unspec:DI [(match_operand:DI 1 "general_operand" "x")(match_operand:DI 2 "general_operand" "x")] 3436))]"CGEN_ENABLE_INSN_P (379)""cpextusub3.b\\t%0,%1,%2"[(set_attr "may_trap" "no")(set_attr "latency" "0")(set_attr "length" "4")(set_attr "slot" "cop")(set_attr "slots" "p0_p1")(set_attr "stall" "none")])(define_insn "cgen_intrinsic_cpextusubu3_b_C3"[(set (match_operand:DI 0 "nonimmediate_operand" "=x")(unspec:DI [(match_operand:DI 1 "general_operand" "x")(match_operand:DI 2 "general_operand" "x")] 3438))]"CGEN_ENABLE_INSN_P (380)""cpextusubu3.b\\t%0,%1,%2"[(set_attr "may_trap" "no")(set_attr "latency" "0")(set_attr "length" "4")(set_attr "slot" "cop")(set_attr "slots" "c3")(set_attr "stall" "none")])(define_insn "cgen_intrinsic_cpextusubu3_b_P0_P1"[(set (match_operand:DI 0 "nonimmediate_operand" "=x")(unspec:DI [(match_operand:DI 1 "general_operand" "x")(match_operand:DI 2 "general_operand" "x")] 3438))]"CGEN_ENABLE_INSN_P (381)""cpextusubu3.b\\t%0,%1,%2"[(set_attr "may_trap" "no")(set_attr "latency" "0")(set_attr "length" "4")(set_attr "slot" "cop")(set_attr "slots" "p0_p1")(set_attr "stall" "none")])(define_insn "cgen_intrinsic_cpextladd3_b_C3"[(set (match_operand:DI 0 "nonimmediate_operand" "=x")(unspec:DI [(match_operand:DI 1 "general_operand" "x")(match_operand:DI 2 "general_operand" "x")] 3440))]"CGEN_ENABLE_INSN_P (382)""cpextladd3.b\\t%0,%1,%2"[(set_attr "may_trap" "no")(set_attr "latency" "0")(set_attr "length" "4")(set_attr "slot" "cop")(set_attr "slots" "c3")(set_attr "stall" "none")])(define_insn "cgen_intrinsic_cpextladd3_b_P0_P1"[(set (match_operand:DI 0 "nonimmediate_operand" "=x")(unspec:DI [(match_operand:DI 1 "general_operand" "x")(match_operand:DI 2 "general_operand" "x")] 3440))]"CGEN_ENABLE_INSN_P (383)""cpextladd3.b\\t%0,%1,%2"[(set_attr "may_trap" "no")(set_attr "latency" "0")(set_attr "length" "4")(set_attr "slot" "cop")(set_attr "slots" "p0_p1")(set_attr "stall" "none")])(define_insn "cgen_intrinsic_cpextladdu3_b_C3"[(set (match_operand:DI 0 "nonimmediate_operand" "=x")(unspec:DI [(match_operand:DI 1 "general_operand" "x")(match_operand:DI 2 "general_operand" "x")] 3442))]"CGEN_ENABLE_INSN_P (384)""cpextladdu3.b\\t%0,%1,%2"[(set_attr "may_trap" "no")(set_attr "latency" "0")(set_attr "length" "4")(set_attr "slot" "cop")(set_attr "slots" "c3")(set_attr "stall" "none")])(define_insn "cgen_intrinsic_cpextladdu3_b_P0_P1"[(set (match_operand:DI 0 "nonimmediate_operand" "=x")(unspec:DI [(match_operand:DI 1 "general_operand" "x")(match_operand:DI 2 "general_operand" "x")] 3442))]"CGEN_ENABLE_INSN_P (385)""cpextladdu3.b\\t%0,%1,%2"[(set_attr "may_trap" "no")(set_attr "latency" "0")(set_attr "length" "4")(set_attr "slot" "cop")(set_attr "slots" "p0_p1")(set_attr "stall" "none")])(define_insn "cgen_intrinsic_cpextuadd3_b_C3"[(set (match_operand:DI 0 "nonimmediate_operand" "=x")(unspec:DI [(match_operand:DI 1 "general_operand" "x")(match_operand:DI 2 "general_operand" "x")] 3444))]"CGEN_ENABLE_INSN_P (386)""cpextuadd3.b\\t%0,%1,%2"[(set_attr "may_trap" "no")(set_attr "latency" "0")(set_attr "length" "4")(set_attr "slot" "cop")(set_attr "slots" "c3")(set_attr "stall" "none")])(define_insn "cgen_intrinsic_cpextuadd3_b_P0_P1"[(set (match_operand:DI 0 "nonimmediate_operand" "=x")(unspec:DI [(match_operand:DI 1 "general_operand" "x")(match_operand:DI 2 "general_operand" "x")] 3444))]"CGEN_ENABLE_INSN_P (387)""cpextuadd3.b\\t%0,%1,%2"[(set_attr "may_trap" "no")(set_attr "latency" "0")(set_attr "length" "4")(set_attr "slot" "cop")(set_attr "slots" "p0_p1")(set_attr "stall" "none")])(define_insn "cgen_intrinsic_cpextuaddu3_b_C3"[(set (match_operand:DI 0 "nonimmediate_operand" "=x")(unspec:DI [(match_operand:DI 1 "general_operand" "x")(match_operand:DI 2 "general_operand" "x")] 3446))]"CGEN_ENABLE_INSN_P (388)""cpextuaddu3.b\\t%0,%1,%2"[(set_attr "may_trap" "no")(set_attr "latency" "0")(set_attr "length" "4")(set_attr "slot" "cop")(set_attr "slots" "c3")(set_attr "stall" "none")])(define_insn "cgen_intrinsic_cpextuaddu3_b_P0_P1"[(set (match_operand:DI 0 "nonimmediate_operand" "=x")(unspec:DI [(match_operand:DI 1 "general_operand" "x")(match_operand:DI 2 "general_operand" "x")] 3446))]"CGEN_ENABLE_INSN_P (389)""cpextuaddu3.b\\t%0,%1,%2"[(set_attr "may_trap" "no")(set_attr "latency" "0")(set_attr "length" "4")(set_attr "slot" "cop")(set_attr "slots" "p0_p1")(set_attr "stall" "none")])(define_insn "cgen_intrinsic_cpssub3_w_C3"[(set (match_operand:DI 0 "nonimmediate_operand" "=x")(unspec_volatile:DI [(match_operand:DI 1 "general_operand" "x")(match_operand:DI 2 "general_operand" "x")] 3448))(set (reg:SI 84)(unspec_volatile:SI [(match_dup 1)(match_dup 2)] 3450))]"CGEN_ENABLE_INSN_P (390)""cpssub3.w\\t%0,%1,%2"[(set_attr "may_trap" "no")(set_attr "latency" "0")(set_attr "length" "4")(set_attr "slot" "cop")(set_attr "slots" "c3")(set_attr "stall" "none")])(define_insn "cgen_intrinsic_cpssub3_w_P0_P1"[(set (match_operand:DI 0 "nonimmediate_operand" "=x")(unspec_volatile:DI [(match_operand:DI 1 "general_operand" "x")(match_operand:DI 2 "general_operand" "x")] 3448))(set (reg:SI 84)(unspec_volatile:SI [(match_dup 1)(match_dup 2)] 3450))]"CGEN_ENABLE_INSN_P (391)""cpssub3.w\\t%0,%1,%2"[(set_attr "may_trap" "no")(set_attr "latency" "0")(set_attr "length" "4")(set_attr "slot" "cop")(set_attr "slots" "p0_p1")(set_attr "stall" "none")])(define_insn "cgen_intrinsic_cpssub3_h_C3"[(set (match_operand:DI 0 "nonimmediate_operand" "=x")(unspec_volatile:DI [(match_operand:DI 1 "general_operand" "x")(match_operand:DI 2 "general_operand" "x")] 3452))(set (reg:SI 84)(unspec_volatile:SI [(match_dup 1)(match_dup 2)] 3454))]"CGEN_ENABLE_INSN_P (392)""cpssub3.h\\t%0,%1,%2"[(set_attr "may_trap" "no")(set_attr "latency" "0")(set_attr "length" "4")(set_attr "slot" "cop")(set_attr "slots" "c3")(set_attr "stall" "none")])(define_insn "cgen_intrinsic_cpssub3_h_P0_P1"[(set (match_operand:DI 0 "nonimmediate_operand" "=x")(unspec_volatile:DI [(match_operand:DI 1 "general_operand" "x")(match_operand:DI 2 "general_operand" "x")] 3452))(set (reg:SI 84)(unspec_volatile:SI [(match_dup 1)(match_dup 2)] 3454))]"CGEN_ENABLE_INSN_P (393)""cpssub3.h\\t%0,%1,%2"[(set_attr "may_trap" "no")(set_attr "latency" "0")(set_attr "length" "4")(set_attr "slot" "cop")(set_attr "slots" "p0_p1")(set_attr "stall" "none")])(define_insn "cgen_intrinsic_cpsadd3_w_C3"[(set (match_operand:DI 0 "nonimmediate_operand" "=x")(unspec_volatile:DI [(match_operand:DI 1 "general_operand" "x")(match_operand:DI 2 "general_operand" "x")] 3456))]"CGEN_ENABLE_INSN_P (394)""cpsadd3.w\\t%0,%1,%2"[(set_attr "may_trap" "no")(set_attr "latency" "0")(set_attr "length" "4")(set_attr "slot" "cop")(set_attr "slots" "c3")(set_attr "stall" "none")])(define_insn "cgen_intrinsic_cpsadd3_w_P0_P1"[(set (match_operand:DI 0 "nonimmediate_operand" "=x")(unspec_volatile:DI [(match_operand:DI 1 "general_operand" "x")(match_operand:DI 2 "general_operand" "x")] 3456))]"CGEN_ENABLE_INSN_P (395)""cpsadd3.w\\t%0,%1,%2"[(set_attr "may_trap" "no")(set_attr "latency" "0")(set_attr "length" "4")(set_attr "slot" "cop")(set_attr "slots" "p0_p1")(set_attr "stall" "none")])(define_insn "cgen_intrinsic_cpsadd3_h_C3"[(set (match_operand:DI 0 "nonimmediate_operand" "=x")(unspec_volatile:DI [(match_operand:DI 1 "general_operand" "x")(match_operand:DI 2 "general_operand" "x")] 3458))]"CGEN_ENABLE_INSN_P (396)""cpsadd3.h\\t%0,%1,%2"[(set_attr "may_trap" "no")(set_attr "latency" "0")(set_attr "length" "4")(set_attr "slot" "cop")(set_attr "slots" "c3")(set_attr "stall" "none")])(define_insn "cgen_intrinsic_cpsadd3_h_P0_P1"[(set (match_operand:DI 0 "nonimmediate_operand" "=x")(unspec_volatile:DI [(match_operand:DI 1 "general_operand" "x")(match_operand:DI 2 "general_operand" "x")] 3458))]"CGEN_ENABLE_INSN_P (397)""cpsadd3.h\\t%0,%1,%2"[(set_attr "may_trap" "no")(set_attr "latency" "0")(set_attr "length" "4")(set_attr "slot" "cop")(set_attr "slots" "p0_p1")(set_attr "stall" "none")])(define_insn "cgen_intrinsic_cdsub3_C3"[(set (match_operand:DI 0 "nonimmediate_operand" "=x")(unspec:DI [(match_operand:DI 1 "general_operand" "x")(match_operand:DI 2 "general_operand" "x")] 3540))]"CGEN_ENABLE_INSN_P (398)""cdsub3\\t%0,%1,%2"[(set_attr "may_trap" "no")(set_attr "latency" "0")(set_attr "length" "4")(set_attr "slot" "cop")(set_attr "slots" "c3")(set_attr "stall" "none")])(define_insn "cgen_intrinsic_cdsub3_P0_P1"[(set (match_operand:DI 0 "nonimmediate_operand" "=x")(unspec:DI [(match_operand:DI 1 "general_operand" "x")(match_operand:DI 2 "general_operand" "x")] 3540))]"CGEN_ENABLE_INSN_P (399)""cdsub3\\t%0,%1,%2"[(set_attr "may_trap" "no")(set_attr "latency" "0")(set_attr "length" "4")(set_attr "slot" "cop")(set_attr "slots" "p0_p1")(set_attr "stall" "none")])(define_insn "cgen_intrinsic_cpsub3_w_C3"[(set (match_operand:DI 0 "nonimmediate_operand" "=x")(unspec:DI [(match_operand:DI 1 "general_operand" "x")(match_operand:DI 2 "general_operand" "x")] 3542))]"CGEN_ENABLE_INSN_P (400)""cpsub3.w\\t%0,%1,%2"[(set_attr "may_trap" "no")(set_attr "latency" "0")(set_attr "length" "4")(set_attr "slot" "cop")(set_attr "slots" "c3")(set_attr "stall" "none")])(define_insn "cgen_intrinsic_cpsub3_w_P0_P1"[(set (match_operand:DI 0 "nonimmediate_operand" "=x")(unspec:DI [(match_operand:DI 1 "general_operand" "x")(match_operand:DI 2 "general_operand" "x")] 3542))]"CGEN_ENABLE_INSN_P (401)""cpsub3.w\\t%0,%1,%2"[(set_attr "may_trap" "no")(set_attr "latency" "0")(set_attr "length" "4")(set_attr "slot" "cop")(set_attr "slots" "p0_p1")(set_attr "stall" "none")])(define_insn "cgen_intrinsic_cpsub3_h_C3"[(set (match_operand:DI 0 "nonimmediate_operand" "=x")(unspec:DI [(match_operand:DI 1 "general_operand" "x")(match_operand:DI 2 "general_operand" "x")] 3544))]"CGEN_ENABLE_INSN_P (402)""cpsub3.h\\t%0,%1,%2"[(set_attr "may_trap" "no")(set_attr "latency" "0")(set_attr "length" "4")(set_attr "slot" "cop")(set_attr "slots" "c3")(set_attr "stall" "none")])(define_insn "cgen_intrinsic_cpsub3_h_P0_P1"[(set (match_operand:DI 0 "nonimmediate_operand" "=x")(unspec:DI [(match_operand:DI 1 "general_operand" "x")(match_operand:DI 2 "general_operand" "x")] 3544))]"CGEN_ENABLE_INSN_P (403)""cpsub3.h\\t%0,%1,%2"[(set_attr "may_trap" "no")(set_attr "latency" "0")(set_attr "length" "4")(set_attr "slot" "cop")(set_attr "slots" "p0_p1")(set_attr "stall" "none")])(define_insn "cgen_intrinsic_cpsub3_b_C3"[(set (match_operand:DI 0 "nonimmediate_operand" "=x")(unspec:DI [(match_operand:DI 1 "general_operand" "x")(match_operand:DI 2 "general_operand" "x")] 3546))]"CGEN_ENABLE_INSN_P (404)""cpsub3.b\\t%0,%1,%2"[(set_attr "may_trap" "no")(set_attr "latency" "0")(set_attr "length" "4")(set_attr "slot" "cop")(set_attr "slots" "c3")(set_attr "stall" "none")])(define_insn "cgen_intrinsic_cpsub3_b_P0_P1"[(set (match_operand:DI 0 "nonimmediate_operand" "=x")(unspec:DI [(match_operand:DI 1 "general_operand" "x")(match_operand:DI 2 "general_operand" "x")] 3546))]"CGEN_ENABLE_INSN_P (405)""cpsub3.b\\t%0,%1,%2"[(set_attr "may_trap" "no")(set_attr "latency" "0")(set_attr "length" "4")(set_attr "slot" "cop")(set_attr "slots" "p0_p1")(set_attr "stall" "none")])(define_insn "cgen_intrinsic_cdadd3_C3"[(set (match_operand:DI 0 "nonimmediate_operand" "=x")(unspec:DI [(match_operand:DI 1 "general_operand" "x")(match_operand:DI 2 "general_operand" "x")] 3548))]"CGEN_ENABLE_INSN_P (406)""cdadd3\\t%0,%1,%2"[(set_attr "may_trap" "no")(set_attr "latency" "0")(set_attr "length" "4")(set_attr "slot" "cop")(set_attr "slots" "c3")(set_attr "stall" "none")])(define_insn "cgen_intrinsic_cdadd3_P0_P1"[(set (match_operand:DI 0 "nonimmediate_operand" "=x")(unspec:DI [(match_operand:DI 1 "general_operand" "x")(match_operand:DI 2 "general_operand" "x")] 3548))]"CGEN_ENABLE_INSN_P (407)""cdadd3\\t%0,%1,%2"[(set_attr "may_trap" "no")(set_attr "latency" "0")(set_attr "length" "4")(set_attr "slot" "cop")(set_attr "slots" "p0_p1")(set_attr "stall" "none")])(define_insn "cgen_intrinsic_cpocmpge_w_C3"[(set (reg:SI 81)(unspec:SI [(match_operand:DI 0 "general_operand" "x")(match_operand:DI 1 "general_operand" "x")] 3218))(set (reg:SI 113)(unspec:SI [(match_dup 0)(match_dup 1)] 3219))]"CGEN_ENABLE_INSN_P (408)""cpocmpge.w\\t%0,%1"[(set_attr "may_trap" "no")(set_attr "latency" "0")(set_attr "length" "4")(set_attr "slot" "cop")(set_attr "slots" "c3")(set_attr "stall" "none")])(define_insn "cgen_intrinsic_cpocmpge_w_P0_P1"[(unspec_volatile [(match_operand:DI 0 "general_operand" "x")(match_operand:DI 1 "general_operand" "x")] 3218)]"CGEN_ENABLE_INSN_P (409)""cpocmpge.w\\t%0,%1"[(set_attr "may_trap" "no")(set_attr "latency" "0")(set_attr "length" "4")(set_attr "slot" "cop")(set_attr "slots" "p0_p1")(set_attr "stall" "none")])(define_insn "cgen_intrinsic_cpocmpgeu_w_C3"[(set (reg:SI 81)(unspec:SI [(match_operand:DI 0 "general_operand" "x")(match_operand:DI 1 "general_operand" "x")] 3220))(set (reg:SI 113)(unspec:SI [(match_dup 0)(match_dup 1)] 3221))]"CGEN_ENABLE_INSN_P (410)""cpocmpgeu.w\\t%0,%1"[(set_attr "may_trap" "no")(set_attr "latency" "0")(set_attr "length" "4")(set_attr "slot" "cop")(set_attr "slots" "c3")(set_attr "stall" "none")])(define_insn "cgen_intrinsic_cpocmpgeu_w_P0_P1"[(unspec_volatile [(match_operand:DI 0 "general_operand" "x")(match_operand:DI 1 "general_operand" "x")] 3220)]"CGEN_ENABLE_INSN_P (411)""cpocmpgeu.w\\t%0,%1"[(set_attr "may_trap" "no")(set_attr "latency" "0")(set_attr "length" "4")(set_attr "slot" "cop")(set_attr "slots" "p0_p1")(set_attr "stall" "none")])(define_insn "cgen_intrinsic_cpocmpge_h_C3"[(set (reg:SI 81)(unspec:SI [(match_operand:DI 0 "general_operand" "x")(match_operand:DI 1 "general_operand" "x")] 3222))(set (reg:SI 113)(unspec:SI [(match_dup 0)(match_dup 1)] 3223))]"CGEN_ENABLE_INSN_P (412)""cpocmpge.h\\t%0,%1"[(set_attr "may_trap" "no")(set_attr "latency" "0")(set_attr "length" "4")(set_attr "slot" "cop")(set_attr "slots" "c3")(set_attr "stall" "none")])(define_insn "cgen_intrinsic_cpocmpge_h_P0_P1"[(unspec_volatile [(match_operand:DI 0 "general_operand" "x")(match_operand:DI 1 "general_operand" "x")] 3222)]"CGEN_ENABLE_INSN_P (413)""cpocmpge.h\\t%0,%1"[(set_attr "may_trap" "no")(set_attr "latency" "0")(set_attr "length" "4")(set_attr "slot" "cop")(set_attr "slots" "p0_p1")(set_attr "stall" "none")])(define_insn "cgen_intrinsic_cpocmpge_b_C3"[(set (reg:SI 81)(unspec:SI [(match_operand:DI 0 "general_operand" "x")(match_operand:DI 1 "general_operand" "x")] 3224))(set (reg:SI 113)(unspec:SI [(match_dup 0)(match_dup 1)] 3225))]"CGEN_ENABLE_INSN_P (414)""cpocmpge.b\\t%0,%1"[(set_attr "may_trap" "no")(set_attr "latency" "0")(set_attr "length" "4")(set_attr "slot" "cop")(set_attr "slots" "c3")(set_attr "stall" "none")])(define_insn "cgen_intrinsic_cpocmpge_b_P0_P1"[(unspec_volatile [(match_operand:DI 0 "general_operand" "x")(match_operand:DI 1 "general_operand" "x")] 3224)]"CGEN_ENABLE_INSN_P (415)""cpocmpge.b\\t%0,%1"[(set_attr "may_trap" "no")(set_attr "latency" "0")(set_attr "length" "4")(set_attr "slot" "cop")(set_attr "slots" "p0_p1")(set_attr "stall" "none")])(define_insn "cgen_intrinsic_cpocmpgeu_b_C3"[(set (reg:SI 81)(unspec:SI [(match_operand:DI 0 "general_operand" "x")(match_operand:DI 1 "general_operand" "x")] 3226))(set (reg:SI 113)(unspec:SI [(match_dup 0)(match_dup 1)] 3227))]"CGEN_ENABLE_INSN_P (416)""cpocmpgeu.b\\t%0,%1"[(set_attr "may_trap" "no")(set_attr "latency" "0")(set_attr "length" "4")(set_attr "slot" "cop")(set_attr "slots" "c3")(set_attr "stall" "none")])(define_insn "cgen_intrinsic_cpocmpgeu_b_P0_P1"[(unspec_volatile [(match_operand:DI 0 "general_operand" "x")(match_operand:DI 1 "general_operand" "x")] 3226)]"CGEN_ENABLE_INSN_P (417)""cpocmpgeu.b\\t%0,%1"[(set_attr "may_trap" "no")(set_attr "latency" "0")(set_attr "length" "4")(set_attr "slot" "cop")(set_attr "slots" "p0_p1")(set_attr "stall" "none")])(define_insn "cgen_intrinsic_cpocmpgt_w_C3"[(set (reg:SI 81)(unspec:SI [(match_operand:DI 0 "general_operand" "x")(match_operand:DI 1 "general_operand" "x")] 3228))(set (reg:SI 113)(unspec:SI [(match_dup 0)(match_dup 1)] 3229))]"CGEN_ENABLE_INSN_P (418)""cpocmpgt.w\\t%0,%1"[(set_attr "may_trap" "no")(set_attr "latency" "0")(set_attr "length" "4")(set_attr "slot" "cop")(set_attr "slots" "c3")(set_attr "stall" "none")])(define_insn "cgen_intrinsic_cpocmpgt_w_P0_P1"[(unspec_volatile [(match_operand:DI 0 "general_operand" "x")(match_operand:DI 1 "general_operand" "x")] 3228)]"CGEN_ENABLE_INSN_P (419)""cpocmpgt.w\\t%0,%1"[(set_attr "may_trap" "no")(set_attr "latency" "0")(set_attr "length" "4")(set_attr "slot" "cop")(set_attr "slots" "p0_p1")(set_attr "stall" "none")])(define_insn "cgen_intrinsic_cpocmpgtu_w_C3"[(set (reg:SI 81)(unspec:SI [(match_operand:DI 0 "general_operand" "x")(match_operand:DI 1 "general_operand" "x")] 3230))(set (reg:SI 113)(unspec:SI [(match_dup 0)(match_dup 1)] 3231))]"CGEN_ENABLE_INSN_P (420)""cpocmpgtu.w\\t%0,%1"[(set_attr "may_trap" "no")(set_attr "latency" "0")(set_attr "length" "4")(set_attr "slot" "cop")(set_attr "slots" "c3")(set_attr "stall" "none")])(define_insn "cgen_intrinsic_cpocmpgtu_w_P0_P1"[(unspec_volatile [(match_operand:DI 0 "general_operand" "x")(match_operand:DI 1 "general_operand" "x")] 3230)]"CGEN_ENABLE_INSN_P (421)""cpocmpgtu.w\\t%0,%1"[(set_attr "may_trap" "no")(set_attr "latency" "0")(set_attr "length" "4")(set_attr "slot" "cop")(set_attr "slots" "p0_p1")(set_attr "stall" "none")])(define_insn "cgen_intrinsic_cpocmpgt_h_C3"[(set (reg:SI 81)(unspec:SI [(match_operand:DI 0 "general_operand" "x")(match_operand:DI 1 "general_operand" "x")] 3232))(set (reg:SI 113)(unspec:SI [(match_dup 0)(match_dup 1)] 3233))]"CGEN_ENABLE_INSN_P (422)""cpocmpgt.h\\t%0,%1"[(set_attr "may_trap" "no")(set_attr "latency" "0")(set_attr "length" "4")(set_attr "slot" "cop")(set_attr "slots" "c3")(set_attr "stall" "none")])(define_insn "cgen_intrinsic_cpocmpgt_h_P0_P1"[(unspec_volatile [(match_operand:DI 0 "general_operand" "x")(match_operand:DI 1 "general_operand" "x")] 3232)]"CGEN_ENABLE_INSN_P (423)""cpocmpgt.h\\t%0,%1"[(set_attr "may_trap" "no")(set_attr "latency" "0")(set_attr "length" "4")(set_attr "slot" "cop")(set_attr "slots" "p0_p1")(set_attr "stall" "none")])(define_insn "cgen_intrinsic_cpocmpgt_b_C3"[(set (reg:SI 81)(unspec:SI [(match_operand:DI 0 "general_operand" "x")(match_operand:DI 1 "general_operand" "x")] 3234))(set (reg:SI 113)(unspec:SI [(match_dup 0)(match_dup 1)] 3235))]"CGEN_ENABLE_INSN_P (424)""cpocmpgt.b\\t%0,%1"[(set_attr "may_trap" "no")(set_attr "latency" "0")(set_attr "length" "4")(set_attr "slot" "cop")(set_attr "slots" "c3")(set_attr "stall" "none")])(define_insn "cgen_intrinsic_cpocmpgt_b_P0_P1"[(unspec_volatile [(match_operand:DI 0 "general_operand" "x")(match_operand:DI 1 "general_operand" "x")] 3234)]"CGEN_ENABLE_INSN_P (425)""cpocmpgt.b\\t%0,%1"[(set_attr "may_trap" "no")(set_attr "latency" "0")(set_attr "length" "4")(set_attr "slot" "cop")(set_attr "slots" "p0_p1")(set_attr "stall" "none")])(define_insn "cgen_intrinsic_cpocmpgtu_b_C3"[(set (reg:SI 81)(unspec:SI [(match_operand:DI 0 "general_operand" "x")(match_operand:DI 1 "general_operand" "x")] 3236))(set (reg:SI 113)(unspec:SI [(match_dup 0)(match_dup 1)] 3237))]"CGEN_ENABLE_INSN_P (426)""cpocmpgtu.b\\t%0,%1"[(set_attr "may_trap" "no")(set_attr "latency" "0")(set_attr "length" "4")(set_attr "slot" "cop")(set_attr "slots" "c3")(set_attr "stall" "none")])(define_insn "cgen_intrinsic_cpocmpgtu_b_P0_P1"[(unspec_volatile [(match_operand:DI 0 "general_operand" "x")(match_operand:DI 1 "general_operand" "x")] 3236)]"CGEN_ENABLE_INSN_P (427)""cpocmpgtu.b\\t%0,%1"[(set_attr "may_trap" "no")(set_attr "latency" "0")(set_attr "length" "4")(set_attr "slot" "cop")(set_attr "slots" "p0_p1")(set_attr "stall" "none")])(define_insn "cgen_intrinsic_cpocmpne_w_C3"[(set (reg:SI 81)(unspec:SI [(match_operand:DI 0 "general_operand" "x")(match_operand:DI 1 "general_operand" "x")] 3238))(set (reg:SI 113)(unspec:SI [(match_dup 0)(match_dup 1)] 3239))]"CGEN_ENABLE_INSN_P (428)""cpocmpne.w\\t%0,%1"[(set_attr "may_trap" "no")(set_attr "latency" "0")(set_attr "length" "4")(set_attr "slot" "cop")(set_attr "slots" "c3")(set_attr "stall" "none")])(define_insn "cgen_intrinsic_cpocmpne_w_P0_P1"[(unspec_volatile [(match_operand:DI 0 "general_operand" "x")(match_operand:DI 1 "general_operand" "x")] 3238)]"CGEN_ENABLE_INSN_P (429)""cpocmpne.w\\t%0,%1"[(set_attr "may_trap" "no")(set_attr "latency" "0")(set_attr "length" "4")(set_attr "slot" "cop")(set_attr "slots" "p0_p1")(set_attr "stall" "none")])(define_insn "cgen_intrinsic_cpocmpne_h_C3"[(set (reg:SI 81)(unspec:SI [(match_operand:DI 0 "general_operand" "x")(match_operand:DI 1 "general_operand" "x")] 3240))(set (reg:SI 113)(unspec:SI [(match_dup 0)(match_dup 1)] 3241))]"CGEN_ENABLE_INSN_P (430)""cpocmpne.h\\t%0,%1"[(set_attr "may_trap" "no")(set_attr "latency" "0")(set_attr "length" "4")(set_attr "slot" "cop")(set_attr "slots" "c3")(set_attr "stall" "none")])(define_insn "cgen_intrinsic_cpocmpne_h_P0_P1"[(unspec_volatile [(match_operand:DI 0 "general_operand" "x")(match_operand:DI 1 "general_operand" "x")] 3240)]"CGEN_ENABLE_INSN_P (431)""cpocmpne.h\\t%0,%1"[(set_attr "may_trap" "no")(set_attr "latency" "0")(set_attr "length" "4")(set_attr "slot" "cop")(set_attr "slots" "p0_p1")(set_attr "stall" "none")])(define_insn "cgen_intrinsic_cpocmpne_b_C3"[(set (reg:SI 81)(unspec:SI [(match_operand:DI 0 "general_operand" "x")(match_operand:DI 1 "general_operand" "x")] 3242))(set (reg:SI 113)(unspec:SI [(match_dup 0)(match_dup 1)] 3243))]"CGEN_ENABLE_INSN_P (432)""cpocmpne.b\\t%0,%1"[(set_attr "may_trap" "no")(set_attr "latency" "0")(set_attr "length" "4")(set_attr "slot" "cop")(set_attr "slots" "c3")(set_attr "stall" "none")])(define_insn "cgen_intrinsic_cpocmpne_b_P0_P1"[(unspec_volatile [(match_operand:DI 0 "general_operand" "x")(match_operand:DI 1 "general_operand" "x")] 3242)]"CGEN_ENABLE_INSN_P (433)""cpocmpne.b\\t%0,%1"[(set_attr "may_trap" "no")(set_attr "latency" "0")(set_attr "length" "4")(set_attr "slot" "cop")(set_attr "slots" "p0_p1")(set_attr "stall" "none")])(define_insn "cgen_intrinsic_cpocmpeq_w_C3"[(set (reg:SI 81)(unspec:SI [(match_operand:DI 0 "general_operand" "x")(match_operand:DI 1 "general_operand" "x")] 3244))(set (reg:SI 113)(unspec:SI [(match_dup 0)(match_dup 1)] 3245))]"CGEN_ENABLE_INSN_P (434)""cpocmpeq.w\\t%0,%1"[(set_attr "may_trap" "no")(set_attr "latency" "0")(set_attr "length" "4")(set_attr "slot" "cop")(set_attr "slots" "c3")(set_attr "stall" "none")])(define_insn "cgen_intrinsic_cpocmpeq_w_P0_P1"[(unspec_volatile [(match_operand:DI 0 "general_operand" "x")(match_operand:DI 1 "general_operand" "x")] 3244)]"CGEN_ENABLE_INSN_P (435)""cpocmpeq.w\\t%0,%1"[(set_attr "may_trap" "no")(set_attr "latency" "0")(set_attr "length" "4")(set_attr "slot" "cop")(set_attr "slots" "p0_p1")(set_attr "stall" "none")])(define_insn "cgen_intrinsic_cpocmpeq_h_C3"[(set (reg:SI 81)(unspec:SI [(match_operand:DI 0 "general_operand" "x")(match_operand:DI 1 "general_operand" "x")] 3246))(set (reg:SI 113)(unspec:SI [(match_dup 0)(match_dup 1)] 3247))]"CGEN_ENABLE_INSN_P (436)""cpocmpeq.h\\t%0,%1"[(set_attr "may_trap" "no")(set_attr "latency" "0")(set_attr "length" "4")(set_attr "slot" "cop")(set_attr "slots" "c3")(set_attr "stall" "none")])(define_insn "cgen_intrinsic_cpocmpeq_h_P0_P1"[(unspec_volatile [(match_operand:DI 0 "general_operand" "x")(match_operand:DI 1 "general_operand" "x")] 3246)]"CGEN_ENABLE_INSN_P (437)""cpocmpeq.h\\t%0,%1"[(set_attr "may_trap" "no")(set_attr "latency" "0")(set_attr "length" "4")(set_attr "slot" "cop")(set_attr "slots" "p0_p1")(set_attr "stall" "none")])(define_insn "cgen_intrinsic_cpocmpeq_b_C3"[(set (reg:SI 81)(unspec:SI [(match_operand:DI 0 "general_operand" "x")(match_operand:DI 1 "general_operand" "x")] 3248))(set (reg:SI 113)(unspec:SI [(match_dup 0)(match_dup 1)] 3249))]"CGEN_ENABLE_INSN_P (438)""cpocmpeq.b\\t%0,%1"[(set_attr "may_trap" "no")(set_attr "latency" "0")(set_attr "length" "4")(set_attr "slot" "cop")(set_attr "slots" "c3")(set_attr "stall" "none")])(define_insn "cgen_intrinsic_cpocmpeq_b_P0_P1"[(unspec_volatile [(match_operand:DI 0 "general_operand" "x")(match_operand:DI 1 "general_operand" "x")] 3248)]"CGEN_ENABLE_INSN_P (439)""cpocmpeq.b\\t%0,%1"[(set_attr "may_trap" "no")(set_attr "latency" "0")(set_attr "length" "4")(set_attr "slot" "cop")(set_attr "slots" "p0_p1")(set_attr "stall" "none")])(define_insn "cgen_intrinsic_cpacmpge_w_C3"[(set (reg:SI 81)(unspec:SI [(match_operand:DI 0 "general_operand" "x")(match_operand:DI 1 "general_operand" "x")] 3250))(set (reg:SI 113)(unspec:SI [(match_dup 0)(match_dup 1)] 3251))]"CGEN_ENABLE_INSN_P (440)""cpacmpge.w\\t%0,%1"[(set_attr "may_trap" "no")(set_attr "latency" "0")(set_attr "length" "4")(set_attr "slot" "cop")(set_attr "slots" "c3")(set_attr "stall" "none")])(define_insn "cgen_intrinsic_cpacmpge_w_P0_P1"[(unspec_volatile [(match_operand:DI 0 "general_operand" "x")(match_operand:DI 1 "general_operand" "x")] 3250)]"CGEN_ENABLE_INSN_P (441)""cpacmpge.w\\t%0,%1"[(set_attr "may_trap" "no")(set_attr "latency" "0")(set_attr "length" "4")(set_attr "slot" "cop")(set_attr "slots" "p0_p1")(set_attr "stall" "none")])(define_insn "cgen_intrinsic_cpacmpgeu_w_C3"[(set (reg:SI 81)(unspec:SI [(match_operand:DI 0 "general_operand" "x")(match_operand:DI 1 "general_operand" "x")] 3252))(set (reg:SI 113)(unspec:SI [(match_dup 0)(match_dup 1)] 3253))]"CGEN_ENABLE_INSN_P (442)""cpacmpgeu.w\\t%0,%1"[(set_attr "may_trap" "no")(set_attr "latency" "0")(set_attr "length" "4")(set_attr "slot" "cop")(set_attr "slots" "c3")(set_attr "stall" "none")])(define_insn "cgen_intrinsic_cpacmpgeu_w_P0_P1"[(unspec_volatile [(match_operand:DI 0 "general_operand" "x")(match_operand:DI 1 "general_operand" "x")] 3252)]"CGEN_ENABLE_INSN_P (443)""cpacmpgeu.w\\t%0,%1"[(set_attr "may_trap" "no")(set_attr "latency" "0")(set_attr "length" "4")(set_attr "slot" "cop")(set_attr "slots" "p0_p1")(set_attr "stall" "none")])(define_insn "cgen_intrinsic_cpacmpge_h_C3"[(set (reg:SI 81)(unspec:SI [(match_operand:DI 0 "general_operand" "x")(match_operand:DI 1 "general_operand" "x")] 3254))(set (reg:SI 113)(unspec:SI [(match_dup 0)(match_dup 1)] 3255))]"CGEN_ENABLE_INSN_P (444)""cpacmpge.h\\t%0,%1"[(set_attr "may_trap" "no")(set_attr "latency" "0")(set_attr "length" "4")(set_attr "slot" "cop")(set_attr "slots" "c3")(set_attr "stall" "none")])(define_insn "cgen_intrinsic_cpacmpge_h_P0_P1"[(unspec_volatile [(match_operand:DI 0 "general_operand" "x")(match_operand:DI 1 "general_operand" "x")] 3254)]"CGEN_ENABLE_INSN_P (445)""cpacmpge.h\\t%0,%1"[(set_attr "may_trap" "no")(set_attr "latency" "0")(set_attr "length" "4")(set_attr "slot" "cop")(set_attr "slots" "p0_p1")(set_attr "stall" "none")])(define_insn "cgen_intrinsic_cpacmpge_b_C3"[(set (reg:SI 81)(unspec:SI [(match_operand:DI 0 "general_operand" "x")(match_operand:DI 1 "general_operand" "x")] 3256))(set (reg:SI 113)(unspec:SI [(match_dup 0)(match_dup 1)] 3257))]"CGEN_ENABLE_INSN_P (446)""cpacmpge.b\\t%0,%1"[(set_attr "may_trap" "no")(set_attr "latency" "0")(set_attr "length" "4")(set_attr "slot" "cop")(set_attr "slots" "c3")(set_attr "stall" "none")])(define_insn "cgen_intrinsic_cpacmpge_b_P0_P1"[(unspec_volatile [(match_operand:DI 0 "general_operand" "x")(match_operand:DI 1 "general_operand" "x")] 3256)]"CGEN_ENABLE_INSN_P (447)""cpacmpge.b\\t%0,%1"[(set_attr "may_trap" "no")(set_attr "latency" "0")(set_attr "length" "4")(set_attr "slot" "cop")(set_attr "slots" "p0_p1")(set_attr "stall" "none")])(define_insn "cgen_intrinsic_cpacmpgeu_b_C3"[(set (reg:SI 81)(unspec:SI [(match_operand:DI 0 "general_operand" "x")(match_operand:DI 1 "general_operand" "x")] 3258))(set (reg:SI 113)(unspec:SI [(match_dup 0)(match_dup 1)] 3259))]"CGEN_ENABLE_INSN_P (448)""cpacmpgeu.b\\t%0,%1"[(set_attr "may_trap" "no")(set_attr "latency" "0")(set_attr "length" "4")(set_attr "slot" "cop")(set_attr "slots" "c3")(set_attr "stall" "none")])(define_insn "cgen_intrinsic_cpacmpgeu_b_P0_P1"[(unspec_volatile [(match_operand:DI 0 "general_operand" "x")(match_operand:DI 1 "general_operand" "x")] 3258)]"CGEN_ENABLE_INSN_P (449)""cpacmpgeu.b\\t%0,%1"[(set_attr "may_trap" "no")(set_attr "latency" "0")(set_attr "length" "4")(set_attr "slot" "cop")(set_attr "slots" "p0_p1")(set_attr "stall" "none")])(define_insn "cgen_intrinsic_cpacmpgt_w_C3"[(set (reg:SI 81)(unspec:SI [(match_operand:DI 0 "general_operand" "x")(match_operand:DI 1 "general_operand" "x")] 3260))(set (reg:SI 113)(unspec:SI [(match_dup 0)(match_dup 1)] 3261))]"CGEN_ENABLE_INSN_P (450)""cpacmpgt.w\\t%0,%1"[(set_attr "may_trap" "no")(set_attr "latency" "0")(set_attr "length" "4")(set_attr "slot" "cop")(set_attr "slots" "c3")(set_attr "stall" "none")])(define_insn "cgen_intrinsic_cpacmpgt_w_P0_P1"[(unspec_volatile [(match_operand:DI 0 "general_operand" "x")(match_operand:DI 1 "general_operand" "x")] 3260)]"CGEN_ENABLE_INSN_P (451)""cpacmpgt.w\\t%0,%1"[(set_attr "may_trap" "no")(set_attr "latency" "0")(set_attr "length" "4")(set_attr "slot" "cop")(set_attr "slots" "p0_p1")(set_attr "stall" "none")])(define_insn "cgen_intrinsic_cpacmpgtu_w_C3"[(set (reg:SI 81)(unspec:SI [(match_operand:DI 0 "general_operand" "x")(match_operand:DI 1 "general_operand" "x")] 3262))(set (reg:SI 113)(unspec:SI [(match_dup 0)(match_dup 1)] 3263))]"CGEN_ENABLE_INSN_P (452)""cpacmpgtu.w\\t%0,%1"[(set_attr "may_trap" "no")(set_attr "latency" "0")(set_attr "length" "4")(set_attr "slot" "cop")(set_attr "slots" "c3")(set_attr "stall" "none")])(define_insn "cgen_intrinsic_cpacmpgtu_w_P0_P1"[(unspec_volatile [(match_operand:DI 0 "general_operand" "x")(match_operand:DI 1 "general_operand" "x")] 3262)]"CGEN_ENABLE_INSN_P (453)""cpacmpgtu.w\\t%0,%1"[(set_attr "may_trap" "no")(set_attr "latency" "0")(set_attr "length" "4")(set_attr "slot" "cop")(set_attr "slots" "p0_p1")(set_attr "stall" "none")])(define_insn "cgen_intrinsic_cpacmpgt_h_C3"[(set (reg:SI 81)(unspec:SI [(match_operand:DI 0 "general_operand" "x")(match_operand:DI 1 "general_operand" "x")] 3264))(set (reg:SI 113)(unspec:SI [(match_dup 0)(match_dup 1)] 3265))]"CGEN_ENABLE_INSN_P (454)""cpacmpgt.h\\t%0,%1"[(set_attr "may_trap" "no")(set_attr "latency" "0")(set_attr "length" "4")(set_attr "slot" "cop")(set_attr "slots" "c3")(set_attr "stall" "none")])(define_insn "cgen_intrinsic_cpacmpgt_h_P0_P1"[(unspec_volatile [(match_operand:DI 0 "general_operand" "x")(match_operand:DI 1 "general_operand" "x")] 3264)]"CGEN_ENABLE_INSN_P (455)""cpacmpgt.h\\t%0,%1"[(set_attr "may_trap" "no")(set_attr "latency" "0")(set_attr "length" "4")(set_attr "slot" "cop")(set_attr "slots" "p0_p1")(set_attr "stall" "none")])(define_insn "cgen_intrinsic_cpacmpgt_b_C3"[(set (reg:SI 81)(unspec:SI [(match_operand:DI 0 "general_operand" "x")(match_operand:DI 1 "general_operand" "x")] 3266))(set (reg:SI 113)(unspec:SI [(match_dup 0)(match_dup 1)] 3267))]"CGEN_ENABLE_INSN_P (456)""cpacmpgt.b\\t%0,%1"[(set_attr "may_trap" "no")(set_attr "latency" "0")(set_attr "length" "4")(set_attr "slot" "cop")(set_attr "slots" "c3")(set_attr "stall" "none")])(define_insn "cgen_intrinsic_cpacmpgt_b_P0_P1"[(unspec_volatile [(match_operand:DI 0 "general_operand" "x")(match_operand:DI 1 "general_operand" "x")] 3266)]"CGEN_ENABLE_INSN_P (457)""cpacmpgt.b\\t%0,%1"[(set_attr "may_trap" "no")(set_attr "latency" "0")(set_attr "length" "4")(set_attr "slot" "cop")(set_attr "slots" "p0_p1")(set_attr "stall" "none")])(define_insn "cgen_intrinsic_cpacmpgtu_b_C3"[(set (reg:SI 81)(unspec:SI [(match_operand:DI 0 "general_operand" "x")(match_operand:DI 1 "general_operand" "x")] 3268))(set (reg:SI 113)(unspec:SI [(match_dup 0)(match_dup 1)] 3269))]"CGEN_ENABLE_INSN_P (458)""cpacmpgtu.b\\t%0,%1"[(set_attr "may_trap" "no")(set_attr "latency" "0")(set_attr "length" "4")(set_attr "slot" "cop")(set_attr "slots" "c3")(set_attr "stall" "none")])(define_insn "cgen_intrinsic_cpacmpgtu_b_P0_P1"[(unspec_volatile [(match_operand:DI 0 "general_operand" "x")(match_operand:DI 1 "general_operand" "x")] 3268)]"CGEN_ENABLE_INSN_P (459)""cpacmpgtu.b\\t%0,%1"[(set_attr "may_trap" "no")(set_attr "latency" "0")(set_attr "length" "4")(set_attr "slot" "cop")(set_attr "slots" "p0_p1")(set_attr "stall" "none")])(define_insn "cgen_intrinsic_cpacmpne_w_C3"[(set (reg:SI 81)(unspec:SI [(match_operand:DI 0 "general_operand" "x")(match_operand:DI 1 "general_operand" "x")] 3270))(set (reg:SI 113)(unspec:SI [(match_dup 0)(match_dup 1)] 3271))]"CGEN_ENABLE_INSN_P (460)""cpacmpne.w\\t%0,%1"[(set_attr "may_trap" "no")(set_attr "latency" "0")(set_attr "length" "4")(set_attr "slot" "cop")(set_attr "slots" "c3")(set_attr "stall" "none")])(define_insn "cgen_intrinsic_cpacmpne_w_P0_P1"[(unspec_volatile [(match_operand:DI 0 "general_operand" "x")(match_operand:DI 1 "general_operand" "x")] 3270)]"CGEN_ENABLE_INSN_P (461)""cpacmpne.w\\t%0,%1"[(set_attr "may_trap" "no")(set_attr "latency" "0")(set_attr "length" "4")(set_attr "slot" "cop")(set_attr "slots" "p0_p1")(set_attr "stall" "none")])(define_insn "cgen_intrinsic_cpacmpne_h_C3"[(set (reg:SI 81)(unspec:SI [(match_operand:DI 0 "general_operand" "x")(match_operand:DI 1 "general_operand" "x")] 3272))(set (reg:SI 113)(unspec:SI [(match_dup 0)(match_dup 1)] 3273))]"CGEN_ENABLE_INSN_P (462)""cpacmpne.h\\t%0,%1"[(set_attr "may_trap" "no")(set_attr "latency" "0")(set_attr "length" "4")(set_attr "slot" "cop")(set_attr "slots" "c3")(set_attr "stall" "none")])(define_insn "cgen_intrinsic_cpacmpne_h_P0_P1"[(unspec_volatile [(match_operand:DI 0 "general_operand" "x")(match_operand:DI 1 "general_operand" "x")] 3272)]"CGEN_ENABLE_INSN_P (463)""cpacmpne.h\\t%0,%1"[(set_attr "may_trap" "no")(set_attr "latency" "0")(set_attr "length" "4")(set_attr "slot" "cop")(set_attr "slots" "p0_p1")(set_attr "stall" "none")])(define_insn "cgen_intrinsic_cpacmpne_b_C3"[(set (reg:SI 81)(unspec:SI [(match_operand:DI 0 "general_operand" "x")(match_operand:DI 1 "general_operand" "x")] 3274))(set (reg:SI 113)(unspec:SI [(match_dup 0)(match_dup 1)] 3275))]"CGEN_ENABLE_INSN_P (464)""cpacmpne.b\\t%0,%1"[(set_attr "may_trap" "no")(set_attr "latency" "0")(set_attr "length" "4")(set_attr "slot" "cop")(set_attr "slots" "c3")(set_attr "stall" "none")])(define_insn "cgen_intrinsic_cpacmpne_b_P0_P1"[(unspec_volatile [(match_operand:DI 0 "general_operand" "x")(match_operand:DI 1 "general_operand" "x")] 3274)]"CGEN_ENABLE_INSN_P (465)""cpacmpne.b\\t%0,%1"[(set_attr "may_trap" "no")(set_attr "latency" "0")(set_attr "length" "4")(set_attr "slot" "cop")(set_attr "slots" "p0_p1")(set_attr "stall" "none")])(define_insn "cgen_intrinsic_cpacmpeq_w_C3"[(set (reg:SI 81)(unspec:SI [(match_operand:DI 0 "general_operand" "x")(match_operand:DI 1 "general_operand" "x")] 3276))(set (reg:SI 113)(unspec:SI [(match_dup 0)(match_dup 1)] 3277))]"CGEN_ENABLE_INSN_P (466)""cpacmpeq.w\\t%0,%1"[(set_attr "may_trap" "no")(set_attr "latency" "0")(set_attr "length" "4")(set_attr "slot" "cop")(set_attr "slots" "c3")(set_attr "stall" "none")])(define_insn "cgen_intrinsic_cpacmpeq_w_P0_P1"[(unspec_volatile [(match_operand:DI 0 "general_operand" "x")(match_operand:DI 1 "general_operand" "x")] 3276)]"CGEN_ENABLE_INSN_P (467)""cpacmpeq.w\\t%0,%1"[(set_attr "may_trap" "no")(set_attr "latency" "0")(set_attr "length" "4")(set_attr "slot" "cop")(set_attr "slots" "p0_p1")(set_attr "stall" "none")])(define_insn "cgen_intrinsic_cpacmpeq_h_C3"[(set (reg:SI 81)(unspec:SI [(match_operand:DI 0 "general_operand" "x")(match_operand:DI 1 "general_operand" "x")] 3278))(set (reg:SI 113)(unspec:SI [(match_dup 0)(match_dup 1)] 3279))]"CGEN_ENABLE_INSN_P (468)""cpacmpeq.h\\t%0,%1"[(set_attr "may_trap" "no")(set_attr "latency" "0")(set_attr "length" "4")(set_attr "slot" "cop")(set_attr "slots" "c3")(set_attr "stall" "none")])(define_insn "cgen_intrinsic_cpacmpeq_h_P0_P1"[(unspec_volatile [(match_operand:DI 0 "general_operand" "x")(match_operand:DI 1 "general_operand" "x")] 3278)]"CGEN_ENABLE_INSN_P (469)""cpacmpeq.h\\t%0,%1"[(set_attr "may_trap" "no")(set_attr "latency" "0")(set_attr "length" "4")(set_attr "slot" "cop")(set_attr "slots" "p0_p1")(set_attr "stall" "none")])(define_insn "cgen_intrinsic_cpacmpeq_b_C3"[(set (reg:SI 81)(unspec:SI [(match_operand:DI 0 "general_operand" "x")(match_operand:DI 1 "general_operand" "x")] 3280))(set (reg:SI 113)(unspec:SI [(match_dup 0)(match_dup 1)] 3281))]"CGEN_ENABLE_INSN_P (470)""cpacmpeq.b\\t%0,%1"[(set_attr "may_trap" "no")(set_attr "latency" "0")(set_attr "length" "4")(set_attr "slot" "cop")(set_attr "slots" "c3")(set_attr "stall" "none")])(define_insn "cgen_intrinsic_cpacmpeq_b_P0_P1"[(unspec_volatile [(match_operand:DI 0 "general_operand" "x")(match_operand:DI 1 "general_operand" "x")] 3280)]"CGEN_ENABLE_INSN_P (471)""cpacmpeq.b\\t%0,%1"[(set_attr "may_trap" "no")(set_attr "latency" "0")(set_attr "length" "4")(set_attr "slot" "cop")(set_attr "slots" "p0_p1")(set_attr "stall" "none")])(define_insn "cgen_intrinsic_cpfsftbi_C3"[(set (match_operand:DI 0 "nonimmediate_operand" "=x")(unspec:DI [(match_operand:DI 1 "general_operand" "x")(match_operand:DI 2 "general_operand" "x")(match_operand:DI 3 "cgen_h_uint_3a1_immediate" "")] 3528))]"CGEN_ENABLE_INSN_P (472)""cpfsftbi\\t%0,%1,%2,%3"[(set_attr "may_trap" "no")(set_attr "latency" "0")(set_attr "length" "4")(set_attr "slot" "cop")(set_attr "slots" "c3")(set_attr "stall" "none")])(define_insn "cgen_intrinsic_cpfsftbi_P0_P1"[(set (match_operand:DI 0 "nonimmediate_operand" "=x")(unspec:DI [(match_operand:DI 1 "general_operand" "x")(match_operand:DI 2 "general_operand" "x")(match_operand:DI 3 "cgen_h_uint_3a1_immediate" "")] 3528))]"CGEN_ENABLE_INSN_P (473)""cpfsftbi\\t%0,%1,%2,%3"[(set_attr "may_trap" "no")(set_attr "latency" "0")(set_attr "length" "4")(set_attr "slot" "cop")(set_attr "slots" "p0_p1")(set_attr "stall" "none")])(define_insn "cgen_intrinsic_cpfacla0s1_h_P0S"[(set (reg:SI 86)(unspec_volatile:SI [(match_operand:DI 0 "general_operand" "x")(match_operand:DI 1 "general_operand" "x")] 1484))(set (reg:SI 99)(unspec_volatile:SI [(match_dup 0)(match_dup 1)] 1486))(set (reg:SI 98)(unspec_volatile:SI [(match_dup 0)(match_dup 1)] 1488))(set (reg:SI 97)(unspec_volatile:SI [(match_dup 0)(match_dup 1)] 1490))(set (reg:SI 96)(unspec_volatile:SI [(match_dup 0)(match_dup 1)] 1492))]"CGEN_ENABLE_INSN_P (474)""cpfacla0s1.h\\t%0,%1"[(set_attr "may_trap" "no")(set_attr "latency" "0")(set_attr "length" "4")(set_attr "slot" "cop")(set_attr "slots" "p0s")(set_attr "stall" "none")])(define_insn "cgen_intrinsic_cpfacua0s1_h_P0S"[(set (reg:SI 86)(unspec_volatile:SI [(match_operand:DI 0 "general_operand" "x")(match_operand:DI 1 "general_operand" "x")] 1494))(set (reg:SI 103)(unspec_volatile:SI [(match_dup 0)(match_dup 1)] 1496))(set (reg:SI 102)(unspec_volatile:SI [(match_dup 0)(match_dup 1)] 1498))(set (reg:SI 101)(unspec_volatile:SI [(match_dup 0)(match_dup 1)] 1500))(set (reg:SI 100)(unspec_volatile:SI [(match_dup 0)(match_dup 1)] 1502))]"CGEN_ENABLE_INSN_P (475)""cpfacua0s1.h\\t%0,%1"[(set_attr "may_trap" "no")(set_attr "latency" "0")(set_attr "length" "4")(set_attr "slot" "cop")(set_attr "slots" "p0s")(set_attr "stall" "none")])(define_insn "cgen_intrinsic_cpfaca0s1_b_P0S"[(set (reg:SI 86)(unspec_volatile:SI [(match_operand:DI 0 "general_operand" "x")(match_operand:DI 1 "general_operand" "x")] 1504))(set (reg:SI 103)(unspec_volatile:SI [(match_dup 0)(match_dup 1)] 1506))(set (reg:SI 102)(unspec_volatile:SI [(match_dup 0)(match_dup 1)] 1508))(set (reg:SI 101)(unspec_volatile:SI [(match_dup 0)(match_dup 1)] 1510))(set (reg:SI 100)(unspec_volatile:SI [(match_dup 0)(match_dup 1)] 1512))(set (reg:SI 99)(unspec_volatile:SI [(match_dup 0)(match_dup 1)] 1514))(set (reg:SI 98)(unspec_volatile:SI [(match_dup 0)(match_dup 1)] 1516))(set (reg:SI 97)(unspec_volatile:SI [(match_dup 0)(match_dup 1)] 1518))(set (reg:SI 96)(unspec_volatile:SI [(match_dup 0)(match_dup 1)] 1520))]"CGEN_ENABLE_INSN_P (476)""cpfaca0s1.b\\t%0,%1"[(set_attr "may_trap" "no")(set_attr "latency" "0")(set_attr "length" "4")(set_attr "slot" "cop")(set_attr "slots" "p0s")(set_attr "stall" "none")])(define_insn "cgen_intrinsic_cpfaca0s1u_b_P0S"[(set (reg:SI 86)(unspec_volatile:SI [(match_operand:DI 0 "general_operand" "x")(match_operand:DI 1 "general_operand" "x")] 1522))(set (reg:SI 103)(unspec_volatile:SI [(match_dup 0)(match_dup 1)] 1524))(set (reg:SI 102)(unspec_volatile:SI [(match_dup 0)(match_dup 1)] 1526))(set (reg:SI 101)(unspec_volatile:SI [(match_dup 0)(match_dup 1)] 1528))(set (reg:SI 100)(unspec_volatile:SI [(match_dup 0)(match_dup 1)] 1530))(set (reg:SI 99)(unspec_volatile:SI [(match_dup 0)(match_dup 1)] 1532))(set (reg:SI 98)(unspec_volatile:SI [(match_dup 0)(match_dup 1)] 1534))(set (reg:SI 97)(unspec_volatile:SI [(match_dup 0)(match_dup 1)] 1536))(set (reg:SI 96)(unspec_volatile:SI [(match_dup 0)(match_dup 1)] 1538))]"CGEN_ENABLE_INSN_P (477)""cpfaca0s1u.b\\t%0,%1"[(set_attr "may_trap" "no")(set_attr "latency" "0")(set_attr "length" "4")(set_attr "slot" "cop")(set_attr "slots" "p0s")(set_attr "stall" "none")])(define_insn "cgen_intrinsic_cpfsftbla0s1_h_P0S"[(set (reg:SI 99)(unspec_volatile:SI [(match_operand:DI 0 "general_operand" "x")(match_operand:DI 1 "general_operand" "x")] 1540))(set (reg:SI 98)(unspec_volatile:SI [(match_dup 0)(match_dup 1)] 1542))(set (reg:SI 97)(unspec_volatile:SI [(match_dup 0)(match_dup 1)] 1544))(set (reg:SI 96)(unspec_volatile:SI [(match_dup 0)(match_dup 1)] 1546))]"CGEN_ENABLE_INSN_P (478)""cpfsftbla0s1.h\\t%0,%1"[(set_attr "may_trap" "no")(set_attr "latency" "0")(set_attr "length" "4")(set_attr "slot" "cop")(set_attr "slots" "p0s")(set_attr "stall" "none")])(define_insn "cgen_intrinsic_cpfsftbua0s1_h_P0S"[(set (reg:SI 103)(unspec_volatile:SI [(match_operand:DI 0 "general_operand" "x")(match_operand:DI 1 "general_operand" "x")] 1548))(set (reg:SI 102)(unspec_volatile:SI [(match_dup 0)(match_dup 1)] 1550))(set (reg:SI 101)(unspec_volatile:SI [(match_dup 0)(match_dup 1)] 1552))(set (reg:SI 100)(unspec_volatile:SI [(match_dup 0)(match_dup 1)] 1554))]"CGEN_ENABLE_INSN_P (479)""cpfsftbua0s1.h\\t%0,%1"[(set_attr "may_trap" "no")(set_attr "latency" "0")(set_attr "length" "4")(set_attr "slot" "cop")(set_attr "slots" "p0s")(set_attr "stall" "none")])(define_insn "cgen_intrinsic_cpfsftba0s1_b_P0S"[(set (reg:SI 103)(unspec_volatile:SI [(match_operand:DI 0 "general_operand" "x")(match_operand:DI 1 "general_operand" "x")] 1556))(set (reg:SI 102)(unspec_volatile:SI [(match_dup 0)(match_dup 1)] 1558))(set (reg:SI 101)(unspec_volatile:SI [(match_dup 0)(match_dup 1)] 1560))(set (reg:SI 100)(unspec_volatile:SI [(match_dup 0)(match_dup 1)] 1562))(set (reg:SI 99)(unspec_volatile:SI [(match_dup 0)(match_dup 1)] 1564))(set (reg:SI 98)(unspec_volatile:SI [(match_dup 0)(match_dup 1)] 1566))(set (reg:SI 97)(unspec_volatile:SI [(match_dup 0)(match_dup 1)] 1568))(set (reg:SI 96)(unspec_volatile:SI [(match_dup 0)(match_dup 1)] 1570))]"CGEN_ENABLE_INSN_P (480)""cpfsftba0s1.b\\t%0,%1"[(set_attr "may_trap" "no")(set_attr "latency" "0")(set_attr "length" "4")(set_attr "slot" "cop")(set_attr "slots" "p0s")(set_attr "stall" "none")])(define_insn "cgen_intrinsic_cpfsftba0s1u_b_P0S"[(set (reg:SI 103)(unspec_volatile:SI [(match_operand:DI 0 "general_operand" "x")(match_operand:DI 1 "general_operand" "x")] 1572))(set (reg:SI 102)(unspec_volatile:SI [(match_dup 0)(match_dup 1)] 1574))(set (reg:SI 101)(unspec_volatile:SI [(match_dup 0)(match_dup 1)] 1576))(set (reg:SI 100)(unspec_volatile:SI [(match_dup 0)(match_dup 1)] 1578))(set (reg:SI 99)(unspec_volatile:SI [(match_dup 0)(match_dup 1)] 1580))(set (reg:SI 98)(unspec_volatile:SI [(match_dup 0)(match_dup 1)] 1582))(set (reg:SI 97)(unspec_volatile:SI [(match_dup 0)(match_dup 1)] 1584))(set (reg:SI 96)(unspec_volatile:SI [(match_dup 0)(match_dup 1)] 1586))]"CGEN_ENABLE_INSN_P (481)""cpfsftba0s1u.b\\t%0,%1"[(set_attr "may_trap" "no")(set_attr "latency" "0")(set_attr "length" "4")(set_attr "slot" "cop")(set_attr "slots" "p0s")(set_attr "stall" "none")])(define_insn "cgen_intrinsic_cpfacla0s0_h_P0S"[(set (reg:SI 86)(unspec_volatile:SI [(match_operand:DI 0 "general_operand" "x")(match_operand:DI 1 "general_operand" "x")] 1588))(set (reg:SI 99)(unspec_volatile:SI [(match_dup 0)(match_dup 1)] 1590))(set (reg:SI 98)(unspec_volatile:SI [(match_dup 0)(match_dup 1)] 1592))(set (reg:SI 97)(unspec_volatile:SI [(match_dup 0)(match_dup 1)] 1594))(set (reg:SI 96)(unspec_volatile:SI [(match_dup 0)(match_dup 1)] 1596))]"CGEN_ENABLE_INSN_P (482)""cpfacla0s0.h\\t%0,%1"[(set_attr "may_trap" "no")(set_attr "latency" "0")(set_attr "length" "4")(set_attr "slot" "cop")(set_attr "slots" "p0s")(set_attr "stall" "none")])(define_insn "cgen_intrinsic_cpfacua0s0_h_P0S"[(set (reg:SI 86)(unspec_volatile:SI [(match_operand:DI 0 "general_operand" "x")(match_operand:DI 1 "general_operand" "x")] 1598))(set (reg:SI 103)(unspec_volatile:SI [(match_dup 0)(match_dup 1)] 1600))(set (reg:SI 102)(unspec_volatile:SI [(match_dup 0)(match_dup 1)] 1602))(set (reg:SI 101)(unspec_volatile:SI [(match_dup 0)(match_dup 1)] 1604))(set (reg:SI 100)(unspec_volatile:SI [(match_dup 0)(match_dup 1)] 1606))]"CGEN_ENABLE_INSN_P (483)""cpfacua0s0.h\\t%0,%1"[(set_attr "may_trap" "no")(set_attr "latency" "0")(set_attr "length" "4")(set_attr "slot" "cop")(set_attr "slots" "p0s")(set_attr "stall" "none")])(define_insn "cgen_intrinsic_cpfaca0s0_b_P0S"[(set (reg:SI 86)(unspec_volatile:SI [(match_operand:DI 0 "general_operand" "x")(match_operand:DI 1 "general_operand" "x")] 1608))(set (reg:SI 103)(unspec_volatile:SI [(match_dup 0)(match_dup 1)] 1610))(set (reg:SI 102)(unspec_volatile:SI [(match_dup 0)(match_dup 1)] 1612))(set (reg:SI 101)(unspec_volatile:SI [(match_dup 0)(match_dup 1)] 1614))(set (reg:SI 100)(unspec_volatile:SI [(match_dup 0)(match_dup 1)] 1616))(set (reg:SI 99)(unspec_volatile:SI [(match_dup 0)(match_dup 1)] 1618))(set (reg:SI 98)(unspec_volatile:SI [(match_dup 0)(match_dup 1)] 1620))(set (reg:SI 97)(unspec_volatile:SI [(match_dup 0)(match_dup 1)] 1622))(set (reg:SI 96)(unspec_volatile:SI [(match_dup 0)(match_dup 1)] 1624))]"CGEN_ENABLE_INSN_P (484)""cpfaca0s0.b\\t%0,%1"[(set_attr "may_trap" "no")(set_attr "latency" "0")(set_attr "length" "4")(set_attr "slot" "cop")(set_attr "slots" "p0s")(set_attr "stall" "none")])(define_insn "cgen_intrinsic_cpfaca0s0u_b_P0S"[(set (reg:SI 86)(unspec_volatile:SI [(match_operand:DI 0 "general_operand" "x")(match_operand:DI 1 "general_operand" "x")] 1626))(set (reg:SI 103)(unspec_volatile:SI [(match_dup 0)(match_dup 1)] 1628))(set (reg:SI 102)(unspec_volatile:SI [(match_dup 0)(match_dup 1)] 1630))(set (reg:SI 101)(unspec_volatile:SI [(match_dup 0)(match_dup 1)] 1632))(set (reg:SI 100)(unspec_volatile:SI [(match_dup 0)(match_dup 1)] 1634))(set (reg:SI 99)(unspec_volatile:SI [(match_dup 0)(match_dup 1)] 1636))(set (reg:SI 98)(unspec_volatile:SI [(match_dup 0)(match_dup 1)] 1638))(set (reg:SI 97)(unspec_volatile:SI [(match_dup 0)(match_dup 1)] 1640))(set (reg:SI 96)(unspec_volatile:SI [(match_dup 0)(match_dup 1)] 1642))]"CGEN_ENABLE_INSN_P (485)""cpfaca0s0u.b\\t%0,%1"[(set_attr "may_trap" "no")(set_attr "latency" "0")(set_attr "length" "4")(set_attr "slot" "cop")(set_attr "slots" "p0s")(set_attr "stall" "none")])(define_insn "cgen_intrinsic_cpfsftbla0s0_h_P0S"[(set (reg:SI 99)(unspec_volatile:SI [(match_operand:DI 0 "general_operand" "x")(match_operand:DI 1 "general_operand" "x")] 1644))(set (reg:SI 98)(unspec_volatile:SI [(match_dup 0)(match_dup 1)] 1646))(set (reg:SI 97)(unspec_volatile:SI [(match_dup 0)(match_dup 1)] 1648))(set (reg:SI 96)(unspec_volatile:SI [(match_dup 0)(match_dup 1)] 1650))]"CGEN_ENABLE_INSN_P (486)""cpfsftbla0s0.h\\t%0,%1"[(set_attr "may_trap" "no")(set_attr "latency" "0")(set_attr "length" "4")(set_attr "slot" "cop")(set_attr "slots" "p0s")(set_attr "stall" "none")])(define_insn "cgen_intrinsic_cpfsftbua0s0_h_P0S"[(set (reg:SI 103)(unspec_volatile:SI [(match_operand:DI 0 "general_operand" "x")(match_operand:DI 1 "general_operand" "x")] 1652))(set (reg:SI 102)(unspec_volatile:SI [(match_dup 0)(match_dup 1)] 1654))(set (reg:SI 101)(unspec_volatile:SI [(match_dup 0)(match_dup 1)] 1656))(set (reg:SI 100)(unspec_volatile:SI [(match_dup 0)(match_dup 1)] 1658))]"CGEN_ENABLE_INSN_P (487)""cpfsftbua0s0.h\\t%0,%1"[(set_attr "may_trap" "no")(set_attr "latency" "0")(set_attr "length" "4")(set_attr "slot" "cop")(set_attr "slots" "p0s")(set_attr "stall" "none")])(define_insn "cgen_intrinsic_cpfsftba0s0_b_P0S"[(set (reg:SI 103)(unspec_volatile:SI [(match_operand:DI 0 "general_operand" "x")(match_operand:DI 1 "general_operand" "x")] 1660))(set (reg:SI 102)(unspec_volatile:SI [(match_dup 0)(match_dup 1)] 1662))(set (reg:SI 101)(unspec_volatile:SI [(match_dup 0)(match_dup 1)] 1664))(set (reg:SI 100)(unspec_volatile:SI [(match_dup 0)(match_dup 1)] 1666))(set (reg:SI 99)(unspec_volatile:SI [(match_dup 0)(match_dup 1)] 1668))(set (reg:SI 98)(unspec_volatile:SI [(match_dup 0)(match_dup 1)] 1670))(set (reg:SI 97)(unspec_volatile:SI [(match_dup 0)(match_dup 1)] 1672))(set (reg:SI 96)(unspec_volatile:SI [(match_dup 0)(match_dup 1)] 1674))]"CGEN_ENABLE_INSN_P (488)""cpfsftba0s0.b\\t%0,%1"[(set_attr "may_trap" "no")(set_attr "latency" "0")(set_attr "length" "4")(set_attr "slot" "cop")(set_attr "slots" "p0s")(set_attr "stall" "none")])(define_insn "cgen_intrinsic_cpfsftba0s0u_b_P0S"[(set (reg:SI 103)(unspec_volatile:SI [(match_operand:DI 0 "general_operand" "x")(match_operand:DI 1 "general_operand" "x")] 1676))(set (reg:SI 102)(unspec_volatile:SI [(match_dup 0)(match_dup 1)] 1678))(set (reg:SI 101)(unspec_volatile:SI [(match_dup 0)(match_dup 1)] 1680))(set (reg:SI 100)(unspec_volatile:SI [(match_dup 0)(match_dup 1)] 1682))(set (reg:SI 99)(unspec_volatile:SI [(match_dup 0)(match_dup 1)] 1684))(set (reg:SI 98)(unspec_volatile:SI [(match_dup 0)(match_dup 1)] 1686))(set (reg:SI 97)(unspec_volatile:SI [(match_dup 0)(match_dup 1)] 1688))(set (reg:SI 96)(unspec_volatile:SI [(match_dup 0)(match_dup 1)] 1690))]"CGEN_ENABLE_INSN_P (489)""cpfsftba0s0u.b\\t%0,%1"[(set_attr "may_trap" "no")(set_attr "latency" "0")(set_attr "length" "4")(set_attr "slot" "cop")(set_attr "slots" "p0s")(set_attr "stall" "none")])(define_insn "cgen_intrinsic_cpsllia0_P0S"[(set (reg:SI 103)(unspec_volatile:SI [(match_operand:SI 0 "cgen_h_uint_5a1_immediate" "")] 1692))(set (reg:SI 102)(unspec_volatile:SI [(match_dup 0)] 1694))(set (reg:SI 101)(unspec_volatile:SI [(match_dup 0)] 1696))(set (reg:SI 100)(unspec_volatile:SI [(match_dup 0)] 1698))(set (reg:SI 99)(unspec_volatile:SI [(match_dup 0)] 1700))(set (reg:SI 98)(unspec_volatile:SI [(match_dup 0)] 1702))(set (reg:SI 97)(unspec_volatile:SI [(match_dup 0)] 1704))(set (reg:SI 96)(unspec_volatile:SI [(match_dup 0)] 1706))]"CGEN_ENABLE_INSN_P (490)""cpsllia0\\t%0"[(set_attr "may_trap" "no")(set_attr "latency" "0")(set_attr "length" "4")(set_attr "slot" "cop")(set_attr "slots" "p0s")(set_attr "stall" "none")])(define_insn "cgen_intrinsic_cpsraia0_P0S"[(set (reg:SI 103)(unspec_volatile:SI [(match_operand:SI 0 "cgen_h_uint_5a1_immediate" "")] 1708))(set (reg:SI 102)(unspec_volatile:SI [(match_dup 0)] 1710))(set (reg:SI 101)(unspec_volatile:SI [(match_dup 0)] 1712))(set (reg:SI 100)(unspec_volatile:SI [(match_dup 0)] 1714))(set (reg:SI 99)(unspec_volatile:SI [(match_dup 0)] 1716))(set (reg:SI 98)(unspec_volatile:SI [(match_dup 0)] 1718))(set (reg:SI 97)(unspec_volatile:SI [(match_dup 0)] 1720))(set (reg:SI 96)(unspec_volatile:SI [(match_dup 0)] 1722))]"CGEN_ENABLE_INSN_P (491)""cpsraia0\\t%0"[(set_attr "may_trap" "no")(set_attr "latency" "0")(set_attr "length" "4")(set_attr "slot" "cop")(set_attr "slots" "p0s")(set_attr "stall" "none")])(define_insn "cgen_intrinsic_cpsrlia0_P0S"[(set (reg:SI 103)(unspec_volatile:SI [(match_operand:SI 0 "cgen_h_uint_5a1_immediate" "")] 1724))(set (reg:SI 102)(unspec_volatile:SI [(match_dup 0)] 1726))(set (reg:SI 101)(unspec_volatile:SI [(match_dup 0)] 1728))(set (reg:SI 100)(unspec_volatile:SI [(match_dup 0)] 1730))(set (reg:SI 99)(unspec_volatile:SI [(match_dup 0)] 1732))(set (reg:SI 98)(unspec_volatile:SI [(match_dup 0)] 1734))(set (reg:SI 97)(unspec_volatile:SI [(match_dup 0)] 1736))(set (reg:SI 96)(unspec_volatile:SI [(match_dup 0)] 1738))]"CGEN_ENABLE_INSN_P (492)""cpsrlia0\\t%0"[(set_attr "may_trap" "no")(set_attr "latency" "0")(set_attr "length" "4")(set_attr "slot" "cop")(set_attr "slots" "p0s")(set_attr "stall" "none")])(define_insn "cgen_intrinsic_cpslla0_P0S"[(set (reg:SI 103)(unspec_volatile:SI [(match_operand:DI 0 "general_operand" "x")] 1740))(set (reg:SI 102)(unspec_volatile:SI [(match_dup 0)] 1742))(set (reg:SI 101)(unspec_volatile:SI [(match_dup 0)] 1744))(set (reg:SI 100)(unspec_volatile:SI [(match_dup 0)] 1746))(set (reg:SI 99)(unspec_volatile:SI [(match_dup 0)] 1748))(set (reg:SI 98)(unspec_volatile:SI [(match_dup 0)] 1750))(set (reg:SI 97)(unspec_volatile:SI [(match_dup 0)] 1752))(set (reg:SI 96)(unspec_volatile:SI [(match_dup 0)] 1754))]"CGEN_ENABLE_INSN_P (493)""cpslla0\\t%0"[(set_attr "may_trap" "no")(set_attr "latency" "0")(set_attr "length" "4")(set_attr "slot" "cop")(set_attr "slots" "p0s")(set_attr "stall" "none")])(define_insn "cgen_intrinsic_cpsraa0_P0S"[(set (reg:SI 103)(unspec_volatile:SI [(match_operand:DI 0 "general_operand" "x")] 1756))(set (reg:SI 102)(unspec_volatile:SI [(match_dup 0)] 1758))(set (reg:SI 101)(unspec_volatile:SI [(match_dup 0)] 1760))(set (reg:SI 100)(unspec_volatile:SI [(match_dup 0)] 1762))(set (reg:SI 99)(unspec_volatile:SI [(match_dup 0)] 1764))(set (reg:SI 98)(unspec_volatile:SI [(match_dup 0)] 1766))(set (reg:SI 97)(unspec_volatile:SI [(match_dup 0)] 1768))(set (reg:SI 96)(unspec_volatile:SI [(match_dup 0)] 1770))]"CGEN_ENABLE_INSN_P (494)""cpsraa0\\t%0"[(set_attr "may_trap" "no")(set_attr "latency" "0")(set_attr "length" "4")(set_attr "slot" "cop")(set_attr "slots" "p0s")(set_attr "stall" "none")])(define_insn "cgen_intrinsic_cpsrla0_P0S"[(set (reg:SI 103)(unspec_volatile:SI [(match_operand:DI 0 "general_operand" "x")] 1772))(set (reg:SI 102)(unspec_volatile:SI [(match_dup 0)] 1774))(set (reg:SI 101)(unspec_volatile:SI [(match_dup 0)] 1776))(set (reg:SI 100)(unspec_volatile:SI [(match_dup 0)] 1778))(set (reg:SI 99)(unspec_volatile:SI [(match_dup 0)] 1780))(set (reg:SI 98)(unspec_volatile:SI [(match_dup 0)] 1782))(set (reg:SI 97)(unspec_volatile:SI [(match_dup 0)] 1784))(set (reg:SI 96)(unspec_volatile:SI [(match_dup 0)] 1786))]"CGEN_ENABLE_INSN_P (495)""cpsrla0\\t%0"[(set_attr "may_trap" "no")(set_attr "latency" "0")(set_attr "length" "4")(set_attr "slot" "cop")(set_attr "slots" "p0s")(set_attr "stall" "none")])(define_insn "cgen_intrinsic_cpaccpa0_P0S"[(set (reg:SI 103)(unspec_volatile:SI [(const_int 0)] 1788))(set (reg:SI 102)(unspec_volatile:SI [(const_int 0)] 1790))(set (reg:SI 101)(unspec_volatile:SI [(const_int 0)] 1792))(set (reg:SI 100)(unspec_volatile:SI [(const_int 0)] 1794))(set (reg:SI 99)(unspec_volatile:SI [(const_int 0)] 1796))(set (reg:SI 98)(unspec_volatile:SI [(const_int 0)] 1798))(set (reg:SI 97)(unspec_volatile:SI [(const_int 0)] 1800))(set (reg:SI 96)(unspec_volatile:SI [(const_int 0)] 1802))]"CGEN_ENABLE_INSN_P (496)""cpaccpa0"[(set_attr "may_trap" "no")(set_attr "latency" "0")(set_attr "length" "4")(set_attr "slot" "cop")(set_attr "slots" "p0s")(set_attr "stall" "none")])(define_insn "cgen_intrinsic_cpacsuma0_P0S"[(set (reg:SI 86)(unspec_volatile:SI [(const_int 0)] 1804))(set (reg:SI 103)(unspec_volatile:SI [(const_int 0)] 1806))(set (reg:SI 102)(unspec_volatile:SI [(const_int 0)] 1808))(set (reg:SI 101)(unspec_volatile:SI [(const_int 0)] 1810))(set (reg:SI 100)(unspec_volatile:SI [(const_int 0)] 1812))(set (reg:SI 99)(unspec_volatile:SI [(const_int 0)] 1814))(set (reg:SI 98)(unspec_volatile:SI [(const_int 0)] 1816))(set (reg:SI 97)(unspec_volatile:SI [(const_int 0)] 1818))(set (reg:SI 96)(unspec_volatile:SI [(const_int 0)] 1820))]"CGEN_ENABLE_INSN_P (497)""cpacsuma0"[(set_attr "may_trap" "no")(set_attr "latency" "0")(set_attr "length" "4")(set_attr "slot" "cop")(set_attr "slots" "p0s")(set_attr "stall" "none")])(define_insn "cgen_intrinsic_cpmovhla0_w_P0S"[(set (match_operand:DI 0 "nonimmediate_operand" "=x")(unspec_volatile:DI [(const_int 0)] 1822))]"CGEN_ENABLE_INSN_P (498)""cpmovhla0.w\\t%0"[(set_attr "may_trap" "no")(set_attr "latency" "0")(set_attr "length" "4")(set_attr "slot" "cop")(set_attr "slots" "p0s")(set_attr "stall" "none")])(define_insn "cgen_intrinsic_cpmovhua0_w_P0S"[(set (match_operand:DI 0 "nonimmediate_operand" "=x")(unspec_volatile:DI [(const_int 0)] 1824))]"CGEN_ENABLE_INSN_P (499)""cpmovhua0.w\\t%0"[(set_attr "may_trap" "no")(set_attr "latency" "0")(set_attr "length" "4")(set_attr "slot" "cop")(set_attr "slots" "p0s")(set_attr "stall" "none")])(define_insn "cgen_intrinsic_cppackla0_w_P0S"[(set (match_operand:DI 0 "nonimmediate_operand" "=x")(unspec_volatile:DI [(const_int 0)] 1826))]"CGEN_ENABLE_INSN_P (500)""cppackla0.w\\t%0"[(set_attr "may_trap" "no")(set_attr "latency" "0")(set_attr "length" "4")(set_attr "slot" "cop")(set_attr "slots" "p0s")(set_attr "stall" "none")])(define_insn "cgen_intrinsic_cppackua0_w_P0S"[(set (match_operand:DI 0 "nonimmediate_operand" "=x")(unspec_volatile:DI [(const_int 0)] 1828))]"CGEN_ENABLE_INSN_P (501)""cppackua0.w\\t%0"[(set_attr "may_trap" "no")(set_attr "latency" "0")(set_attr "length" "4")(set_attr "slot" "cop")(set_attr "slots" "p0s")(set_attr "stall" "none")])(define_insn "cgen_intrinsic_cppackla0_h_P0S"[(set (match_operand:DI 0 "nonimmediate_operand" "=x")(unspec_volatile:DI [(const_int 0)] 1830))]"CGEN_ENABLE_INSN_P (502)""cppackla0.h\\t%0"[(set_attr "may_trap" "no")(set_attr "latency" "0")(set_attr "length" "4")(set_attr "slot" "cop")(set_attr "slots" "p0s")(set_attr "stall" "none")])(define_insn "cgen_intrinsic_cppackua0_h_P0S"[(set (match_operand:DI 0 "nonimmediate_operand" "=x")(unspec_volatile:DI [(const_int 0)] 1832))]"CGEN_ENABLE_INSN_P (503)""cppackua0.h\\t%0"[(set_attr "may_trap" "no")(set_attr "latency" "0")(set_attr "length" "4")(set_attr "slot" "cop")(set_attr "slots" "p0s")(set_attr "stall" "none")])(define_insn "cgen_intrinsic_cppacka0_b_P0S"[(set (match_operand:DI 0 "nonimmediate_operand" "=x")(unspec_volatile:DI [(const_int 0)] 1834))]"CGEN_ENABLE_INSN_P (504)""cppacka0.b\\t%0"[(set_attr "may_trap" "no")(set_attr "latency" "0")(set_attr "length" "4")(set_attr "slot" "cop")(set_attr "slots" "p0s")(set_attr "stall" "none")])(define_insn "cgen_intrinsic_cppacka0u_b_P0S"[(set (match_operand:DI 0 "nonimmediate_operand" "=x")(unspec_volatile:DI [(const_int 0)] 1836))]"CGEN_ENABLE_INSN_P (505)""cppacka0u.b\\t%0"[(set_attr "may_trap" "no")(set_attr "latency" "0")(set_attr "length" "4")(set_attr "slot" "cop")(set_attr "slots" "p0s")(set_attr "stall" "none")])(define_insn "cgen_intrinsic_cpmovlla0_w_P0S"[(set (match_operand:DI 0 "nonimmediate_operand" "=x")(unspec_volatile:DI [(const_int 0)] 1838))]"CGEN_ENABLE_INSN_P (506)""cpmovlla0.w\\t%0"[(set_attr "may_trap" "no")(set_attr "latency" "0")(set_attr "length" "4")(set_attr "slot" "cop")(set_attr "slots" "p0s")(set_attr "stall" "none")])(define_insn "cgen_intrinsic_cpmovlua0_w_P0S"[(set (match_operand:DI 0 "nonimmediate_operand" "=x")(unspec_volatile:DI [(const_int 0)] 1840))]"CGEN_ENABLE_INSN_P (507)""cpmovlua0.w\\t%0"[(set_attr "may_trap" "no")(set_attr "latency" "0")(set_attr "length" "4")(set_attr "slot" "cop")(set_attr "slots" "p0s")(set_attr "stall" "none")])(define_insn "cgen_intrinsic_cpmovula0_w_P0S"[(set (match_operand:DI 0 "nonimmediate_operand" "=x")(unspec_volatile:DI [(const_int 0)] 1842))]"CGEN_ENABLE_INSN_P (508)""cpmovula0.w\\t%0"[(set_attr "may_trap" "no")(set_attr "latency" "0")(set_attr "length" "4")(set_attr "slot" "cop")(set_attr "slots" "p0s")(set_attr "stall" "none")])(define_insn "cgen_intrinsic_cpmovuua0_w_P0S"[(set (match_operand:DI 0 "nonimmediate_operand" "=x")(unspec_volatile:DI [(const_int 0)] 1844))]"CGEN_ENABLE_INSN_P (509)""cpmovuua0.w\\t%0"[(set_attr "may_trap" "no")(set_attr "latency" "0")(set_attr "length" "4")(set_attr "slot" "cop")(set_attr "slots" "p0s")(set_attr "stall" "none")])(define_insn "cgen_intrinsic_cpmovla0_h_P0S"[(set (match_operand:DI 0 "nonimmediate_operand" "=x")(unspec_volatile:DI [(const_int 0)] 1846))]"CGEN_ENABLE_INSN_P (510)""cpmovla0.h\\t%0"[(set_attr "may_trap" "no")(set_attr "latency" "0")(set_attr "length" "4")(set_attr "slot" "cop")(set_attr "slots" "p0s")(set_attr "stall" "none")])(define_insn "cgen_intrinsic_cpmovua0_h_P0S"[(set (match_operand:DI 0 "nonimmediate_operand" "=x")(unspec_volatile:DI [(const_int 0)] 1848))]"CGEN_ENABLE_INSN_P (511)""cpmovua0.h\\t%0"[(set_attr "may_trap" "no")(set_attr "latency" "0")(set_attr "length" "4")(set_attr "slot" "cop")(set_attr "slots" "p0s")(set_attr "stall" "none")])(define_insn "cgen_intrinsic_cpmova0_b_P0S"[(set (match_operand:DI 0 "nonimmediate_operand" "=x")(unspec_volatile:DI [(const_int 0)] 1850))]"CGEN_ENABLE_INSN_P (512)""cpmova0.b\\t%0"[(set_attr "may_trap" "no")(set_attr "latency" "0")(set_attr "length" "4")(set_attr "slot" "cop")(set_attr "slots" "p0s")(set_attr "stall" "none")])(define_insn "cgen_intrinsic_cpsetla0_w_P0S"[(set (reg:SI 99)(unspec_volatile:SI [(match_operand:DI 0 "general_operand" "x")(match_operand:DI 1 "general_operand" "x")] 1852))(set (reg:SI 98)(unspec_volatile:SI [(match_dup 0)(match_dup 1)] 1854))(set (reg:SI 97)(unspec_volatile:SI [(match_dup 0)(match_dup 1)] 1856))(set (reg:SI 96)(unspec_volatile:SI [(match_dup 0)(match_dup 1)] 1858))]"CGEN_ENABLE_INSN_P (513)""cpsetla0.w\\t%0,%1"[(set_attr "may_trap" "no")(set_attr "latency" "0")(set_attr "length" "4")(set_attr "slot" "cop")(set_attr "slots" "p0s")(set_attr "stall" "none")])(define_insn "cgen_intrinsic_cpsetua0_w_P0S"[(set (reg:SI 103)(unspec_volatile:SI [(match_operand:DI 0 "general_operand" "x")(match_operand:DI 1 "general_operand" "x")] 1860))(set (reg:SI 102)(unspec_volatile:SI [(match_dup 0)(match_dup 1)] 1862))(set (reg:SI 101)(unspec_volatile:SI [(match_dup 0)(match_dup 1)] 1864))(set (reg:SI 100)(unspec_volatile:SI [(match_dup 0)(match_dup 1)] 1866))]"CGEN_ENABLE_INSN_P (514)""cpsetua0.w\\t%0,%1"[(set_attr "may_trap" "no")(set_attr "latency" "0")(set_attr "length" "4")(set_attr "slot" "cop")(set_attr "slots" "p0s")(set_attr "stall" "none")])(define_insn "cgen_intrinsic_cpseta0_h_P0S"[(set (reg:SI 103)(unspec_volatile:SI [(match_operand:DI 0 "general_operand" "x")(match_operand:DI 1 "general_operand" "x")] 1868))(set (reg:SI 102)(unspec_volatile:SI [(match_dup 0)(match_dup 1)] 1870))(set (reg:SI 101)(unspec_volatile:SI [(match_dup 0)(match_dup 1)] 1872))(set (reg:SI 100)(unspec_volatile:SI [(match_dup 0)(match_dup 1)] 1874))(set (reg:SI 99)(unspec_volatile:SI [(match_dup 0)(match_dup 1)] 1876))(set (reg:SI 98)(unspec_volatile:SI [(match_dup 0)(match_dup 1)] 1878))(set (reg:SI 97)(unspec_volatile:SI [(match_dup 0)(match_dup 1)] 1880))(set (reg:SI 96)(unspec_volatile:SI [(match_dup 0)(match_dup 1)] 1882))]"CGEN_ENABLE_INSN_P (515)""cpseta0.h\\t%0,%1"[(set_attr "may_trap" "no")(set_attr "latency" "0")(set_attr "length" "4")(set_attr "slot" "cop")(set_attr "slots" "p0s")(set_attr "stall" "none")])(define_insn "cgen_intrinsic_cpsadla0_h_P0S"[(set (reg:SI 86)(unspec_volatile:SI [(match_operand:DI 0 "general_operand" "x")(match_operand:DI 1 "general_operand" "x")] 1884))(set (reg:SI 99)(unspec_volatile:SI [(match_dup 0)(match_dup 1)] 1886))(set (reg:SI 98)(unspec_volatile:SI [(match_dup 0)(match_dup 1)] 1888))(set (reg:SI 97)(unspec_volatile:SI [(match_dup 0)(match_dup 1)] 1890))(set (reg:SI 96)(unspec_volatile:SI [(match_dup 0)(match_dup 1)] 1892))]"CGEN_ENABLE_INSN_P (516)""cpsadla0.h\\t%0,%1"[(set_attr "may_trap" "no")(set_attr "latency" "0")(set_attr "length" "4")(set_attr "slot" "cop")(set_attr "slots" "p0s")(set_attr "stall" "none")])(define_insn "cgen_intrinsic_cpsadua0_h_P0S"[(set (reg:SI 86)(unspec_volatile:SI [(match_operand:DI 0 "general_operand" "x")(match_operand:DI 1 "general_operand" "x")] 1894))(set (reg:SI 103)(unspec_volatile:SI [(match_dup 0)(match_dup 1)] 1896))(set (reg:SI 102)(unspec_volatile:SI [(match_dup 0)(match_dup 1)] 1898))(set (reg:SI 101)(unspec_volatile:SI [(match_dup 0)(match_dup 1)] 1900))(set (reg:SI 100)(unspec_volatile:SI [(match_dup 0)(match_dup 1)] 1902))]"CGEN_ENABLE_INSN_P (517)""cpsadua0.h\\t%0,%1"[(set_attr "may_trap" "no")(set_attr "latency" "0")(set_attr "length" "4")(set_attr "slot" "cop")(set_attr "slots" "p0s")(set_attr "stall" "none")])(define_insn "cgen_intrinsic_cpsada0_b_P0S"[(set (reg:SI 86)(unspec_volatile:SI [(match_operand:DI 0 "general_operand" "x")(match_operand:DI 1 "general_operand" "x")] 1904))(set (reg:SI 103)(unspec_volatile:SI [(match_dup 0)(match_dup 1)] 1906))(set (reg:SI 102)(unspec_volatile:SI [(match_dup 0)(match_dup 1)] 1908))(set (reg:SI 101)(unspec_volatile:SI [(match_dup 0)(match_dup 1)] 1910))(set (reg:SI 100)(unspec_volatile:SI [(match_dup 0)(match_dup 1)] 1912))(set (reg:SI 99)(unspec_volatile:SI [(match_dup 0)(match_dup 1)] 1914))(set (reg:SI 98)(unspec_volatile:SI [(match_dup 0)(match_dup 1)] 1916))(set (reg:SI 97)(unspec_volatile:SI [(match_dup 0)(match_dup 1)] 1918))(set (reg:SI 96)(unspec_volatile:SI [(match_dup 0)(match_dup 1)] 1920))]"CGEN_ENABLE_INSN_P (518)""cpsada0.b\\t%0,%1"[(set_attr "may_trap" "no")(set_attr "latency" "0")(set_attr "length" "4")(set_attr "slot" "cop")(set_attr "slots" "p0s")(set_attr "stall" "none")])(define_insn "cgen_intrinsic_cpsada0u_b_P0S"[(set (reg:SI 86)(unspec_volatile:SI [(match_operand:DI 0 "general_operand" "x")(match_operand:DI 1 "general_operand" "x")] 1922))(set (reg:SI 103)(unspec_volatile:SI [(match_dup 0)(match_dup 1)] 1924))(set (reg:SI 102)(unspec_volatile:SI [(match_dup 0)(match_dup 1)] 1926))(set (reg:SI 101)(unspec_volatile:SI [(match_dup 0)(match_dup 1)] 1928))(set (reg:SI 100)(unspec_volatile:SI [(match_dup 0)(match_dup 1)] 1930))(set (reg:SI 99)(unspec_volatile:SI [(match_dup 0)(match_dup 1)] 1932))(set (reg:SI 98)(unspec_volatile:SI [(match_dup 0)(match_dup 1)] 1934))(set (reg:SI 97)(unspec_volatile:SI [(match_dup 0)(match_dup 1)] 1936))(set (reg:SI 96)(unspec_volatile:SI [(match_dup 0)(match_dup 1)] 1938))]"CGEN_ENABLE_INSN_P (519)""cpsada0u.b\\t%0,%1"[(set_attr "may_trap" "no")(set_attr "latency" "0")(set_attr "length" "4")(set_attr "slot" "cop")(set_attr "slots" "p0s")(set_attr "stall" "none")])(define_insn "cgen_intrinsic_cpabsla0_h_P0S"[(set (reg:SI 99)(unspec_volatile:SI [(match_operand:DI 0 "general_operand" "x")(match_operand:DI 1 "general_operand" "x")] 1940))(set (reg:SI 98)(unspec_volatile:SI [(match_dup 0)(match_dup 1)] 1942))(set (reg:SI 97)(unspec_volatile:SI [(match_dup 0)(match_dup 1)] 1944))(set (reg:SI 96)(unspec_volatile:SI [(match_dup 0)(match_dup 1)] 1946))]"CGEN_ENABLE_INSN_P (520)""cpabsla0.h\\t%0,%1"[(set_attr "may_trap" "no")(set_attr "latency" "0")(set_attr "length" "4")(set_attr "slot" "cop")(set_attr "slots" "p0s")(set_attr "stall" "none")])(define_insn "cgen_intrinsic_cpabsua0_h_P0S"[(set (reg:SI 103)(unspec_volatile:SI [(match_operand:DI 0 "general_operand" "x")(match_operand:DI 1 "general_operand" "x")] 1948))(set (reg:SI 102)(unspec_volatile:SI [(match_dup 0)(match_dup 1)] 1950))(set (reg:SI 101)(unspec_volatile:SI [(match_dup 0)(match_dup 1)] 1952))(set (reg:SI 100)(unspec_volatile:SI [(match_dup 0)(match_dup 1)] 1954))]"CGEN_ENABLE_INSN_P (521)""cpabsua0.h\\t%0,%1"[(set_attr "may_trap" "no")(set_attr "latency" "0")(set_attr "length" "4")(set_attr "slot" "cop")(set_attr "slots" "p0s")(set_attr "stall" "none")])(define_insn "cgen_intrinsic_cpabsa0_b_P0S"[(set (reg:SI 103)(unspec_volatile:SI [(match_operand:DI 0 "general_operand" "x")(match_operand:DI 1 "general_operand" "x")] 1956))(set (reg:SI 102)(unspec_volatile:SI [(match_dup 0)(match_dup 1)] 1958))(set (reg:SI 101)(unspec_volatile:SI [(match_dup 0)(match_dup 1)] 1960))(set (reg:SI 100)(unspec_volatile:SI [(match_dup 0)(match_dup 1)] 1962))(set (reg:SI 99)(unspec_volatile:SI [(match_dup 0)(match_dup 1)] 1964))(set (reg:SI 98)(unspec_volatile:SI [(match_dup 0)(match_dup 1)] 1966))(set (reg:SI 97)(unspec_volatile:SI [(match_dup 0)(match_dup 1)] 1968))(set (reg:SI 96)(unspec_volatile:SI [(match_dup 0)(match_dup 1)] 1970))]"CGEN_ENABLE_INSN_P (522)""cpabsa0.b\\t%0,%1"[(set_attr "may_trap" "no")(set_attr "latency" "0")(set_attr "length" "4")(set_attr "slot" "cop")(set_attr "slots" "p0s")(set_attr "stall" "none")])(define_insn "cgen_intrinsic_cpabsa0u_b_P0S"[(set (reg:SI 103)(unspec_volatile:SI [(match_operand:DI 0 "general_operand" "x")(match_operand:DI 1 "general_operand" "x")] 1972))(set (reg:SI 102)(unspec_volatile:SI [(match_dup 0)(match_dup 1)] 1974))(set (reg:SI 101)(unspec_volatile:SI [(match_dup 0)(match_dup 1)] 1976))(set (reg:SI 100)(unspec_volatile:SI [(match_dup 0)(match_dup 1)] 1978))(set (reg:SI 99)(unspec_volatile:SI [(match_dup 0)(match_dup 1)] 1980))(set (reg:SI 98)(unspec_volatile:SI [(match_dup 0)(match_dup 1)] 1982))(set (reg:SI 97)(unspec_volatile:SI [(match_dup 0)(match_dup 1)] 1984))(set (reg:SI 96)(unspec_volatile:SI [(match_dup 0)(match_dup 1)] 1986))]"CGEN_ENABLE_INSN_P (523)""cpabsa0u.b\\t%0,%1"[(set_attr "may_trap" "no")(set_attr "latency" "0")(set_attr "length" "4")(set_attr "slot" "cop")(set_attr "slots" "p0s")(set_attr "stall" "none")])(define_insn "cgen_intrinsic_cpsubacla0_h_P0S"[(set (reg:SI 86)(unspec_volatile:SI [(match_operand:DI 0 "general_operand" "x")(match_operand:DI 1 "general_operand" "x")] 1988))(set (reg:SI 99)(unspec_volatile:SI [(match_dup 0)(match_dup 1)] 1990))(set (reg:SI 98)(unspec_volatile:SI [(match_dup 0)(match_dup 1)] 1992))(set (reg:SI 97)(unspec_volatile:SI [(match_dup 0)(match_dup 1)] 1994))(set (reg:SI 96)(unspec_volatile:SI [(match_dup 0)(match_dup 1)] 1996))]"CGEN_ENABLE_INSN_P (524)""cpsubacla0.h\\t%0,%1"[(set_attr "may_trap" "no")(set_attr "latency" "0")(set_attr "length" "4")(set_attr "slot" "cop")(set_attr "slots" "p0s")(set_attr "stall" "none")])(define_insn "cgen_intrinsic_cpsubacua0_h_P0S"[(set (reg:SI 86)(unspec_volatile:SI [(match_operand:DI 0 "general_operand" "x")(match_operand:DI 1 "general_operand" "x")] 1998))(set (reg:SI 103)(unspec_volatile:SI [(match_dup 0)(match_dup 1)] 2000))(set (reg:SI 102)(unspec_volatile:SI [(match_dup 0)(match_dup 1)] 2002))(set (reg:SI 101)(unspec_volatile:SI [(match_dup 0)(match_dup 1)] 2004))(set (reg:SI 100)(unspec_volatile:SI [(match_dup 0)(match_dup 1)] 2006))]"CGEN_ENABLE_INSN_P (525)""cpsubacua0.h\\t%0,%1"[(set_attr "may_trap" "no")(set_attr "latency" "0")(set_attr "length" "4")(set_attr "slot" "cop")(set_attr "slots" "p0s")(set_attr "stall" "none")])(define_insn "cgen_intrinsic_cpsubaca0_b_P0S"[(set (reg:SI 86)(unspec_volatile:SI [(match_operand:DI 0 "general_operand" "x")(match_operand:DI 1 "general_operand" "x")] 2008))(set (reg:SI 103)(unspec_volatile:SI [(match_dup 0)(match_dup 1)] 2010))(set (reg:SI 102)(unspec_volatile:SI [(match_dup 0)(match_dup 1)] 2012))(set (reg:SI 101)(unspec_volatile:SI [(match_dup 0)(match_dup 1)] 2014))(set (reg:SI 100)(unspec_volatile:SI [(match_dup 0)(match_dup 1)] 2016))(set (reg:SI 99)(unspec_volatile:SI [(match_dup 0)(match_dup 1)] 2018))(set (reg:SI 98)(unspec_volatile:SI [(match_dup 0)(match_dup 1)] 2020))(set (reg:SI 97)(unspec_volatile:SI [(match_dup 0)(match_dup 1)] 2022))(set (reg:SI 96)(unspec_volatile:SI [(match_dup 0)(match_dup 1)] 2024))]"CGEN_ENABLE_INSN_P (526)""cpsubaca0.b\\t%0,%1"[(set_attr "may_trap" "no")(set_attr "latency" "0")(set_attr "length" "4")(set_attr "slot" "cop")(set_attr "slots" "p0s")(set_attr "stall" "none")])(define_insn "cgen_intrinsic_cpsubaca0u_b_P0S"[(set (reg:SI 86)(unspec_volatile:SI [(match_operand:DI 0 "general_operand" "x")(match_operand:DI 1 "general_operand" "x")] 2026))(set (reg:SI 103)(unspec_volatile:SI [(match_dup 0)(match_dup 1)] 2028))(set (reg:SI 102)(unspec_volatile:SI [(match_dup 0)(match_dup 1)] 2030))(set (reg:SI 101)(unspec_volatile:SI [(match_dup 0)(match_dup 1)] 2032))(set (reg:SI 100)(unspec_volatile:SI [(match_dup 0)(match_dup 1)] 2034))(set (reg:SI 99)(unspec_volatile:SI [(match_dup 0)(match_dup 1)] 2036))(set (reg:SI 98)(unspec_volatile:SI [(match_dup 0)(match_dup 1)] 2038))(set (reg:SI 97)(unspec_volatile:SI [(match_dup 0)(match_dup 1)] 2040))(set (reg:SI 96)(unspec_volatile:SI [(match_dup 0)(match_dup 1)] 2042))]"CGEN_ENABLE_INSN_P (527)""cpsubaca0u.b\\t%0,%1"[(set_attr "may_trap" "no")(set_attr "latency" "0")(set_attr "length" "4")(set_attr "slot" "cop")(set_attr "slots" "p0s")(set_attr "stall" "none")])(define_insn "cgen_intrinsic_cpsubla0_h_P0S"[(set (reg:SI 99)(unspec_volatile:SI [(match_operand:DI 0 "general_operand" "x")(match_operand:DI 1 "general_operand" "x")] 2044))(set (reg:SI 98)(unspec_volatile:SI [(match_dup 0)(match_dup 1)] 2046))(set (reg:SI 97)(unspec_volatile:SI [(match_dup 0)(match_dup 1)] 2048))(set (reg:SI 96)(unspec_volatile:SI [(match_dup 0)(match_dup 1)] 2050))]"CGEN_ENABLE_INSN_P (528)""cpsubla0.h\\t%0,%1"[(set_attr "may_trap" "no")(set_attr "latency" "0")(set_attr "length" "4")(set_attr "slot" "cop")(set_attr "slots" "p0s")(set_attr "stall" "none")])(define_insn "cgen_intrinsic_cpsubua0_h_P0S"[(set (reg:SI 103)(unspec_volatile:SI [(match_operand:DI 0 "general_operand" "x")(match_operand:DI 1 "general_operand" "x")] 2052))(set (reg:SI 102)(unspec_volatile:SI [(match_dup 0)(match_dup 1)] 2054))(set (reg:SI 101)(unspec_volatile:SI [(match_dup 0)(match_dup 1)] 2056))(set (reg:SI 100)(unspec_volatile:SI [(match_dup 0)(match_dup 1)] 2058))]"CGEN_ENABLE_INSN_P (529)""cpsubua0.h\\t%0,%1"[(set_attr "may_trap" "no")(set_attr "latency" "0")(set_attr "length" "4")(set_attr "slot" "cop")(set_attr "slots" "p0s")(set_attr "stall" "none")])(define_insn "cgen_intrinsic_cpsuba0_b_P0S"[(set (reg:SI 103)(unspec_volatile:SI [(match_operand:DI 0 "general_operand" "x")(match_operand:DI 1 "general_operand" "x")] 2060))(set (reg:SI 102)(unspec_volatile:SI [(match_dup 0)(match_dup 1)] 2062))(set (reg:SI 101)(unspec_volatile:SI [(match_dup 0)(match_dup 1)] 2064))(set (reg:SI 100)(unspec_volatile:SI [(match_dup 0)(match_dup 1)] 2066))(set (reg:SI 99)(unspec_volatile:SI [(match_dup 0)(match_dup 1)] 2068))(set (reg:SI 98)(unspec_volatile:SI [(match_dup 0)(match_dup 1)] 2070))(set (reg:SI 97)(unspec_volatile:SI [(match_dup 0)(match_dup 1)] 2072))(set (reg:SI 96)(unspec_volatile:SI [(match_dup 0)(match_dup 1)] 2074))]"CGEN_ENABLE_INSN_P (530)""cpsuba0.b\\t%0,%1"[(set_attr "may_trap" "no")(set_attr "latency" "0")(set_attr "length" "4")(set_attr "slot" "cop")(set_attr "slots" "p0s")(set_attr "stall" "none")])(define_insn "cgen_intrinsic_cpsuba0u_b_P0S"[(set (reg:SI 103)(unspec_volatile:SI [(match_operand:DI 0 "general_operand" "x")(match_operand:DI 1 "general_operand" "x")] 2076))(set (reg:SI 102)(unspec_volatile:SI [(match_dup 0)(match_dup 1)] 2078))(set (reg:SI 101)(unspec_volatile:SI [(match_dup 0)(match_dup 1)] 2080))(set (reg:SI 100)(unspec_volatile:SI [(match_dup 0)(match_dup 1)] 2082))(set (reg:SI 99)(unspec_volatile:SI [(match_dup 0)(match_dup 1)] 2084))(set (reg:SI 98)(unspec_volatile:SI [(match_dup 0)(match_dup 1)] 2086))(set (reg:SI 97)(unspec_volatile:SI [(match_dup 0)(match_dup 1)] 2088))(set (reg:SI 96)(unspec_volatile:SI [(match_dup 0)(match_dup 1)] 2090))]"CGEN_ENABLE_INSN_P (531)""cpsuba0u.b\\t%0,%1"[(set_attr "may_trap" "no")(set_attr "latency" "0")(set_attr "length" "4")(set_attr "slot" "cop")(set_attr "slots" "p0s")(set_attr "stall" "none")])(define_insn "cgen_intrinsic_cpaddacla0_h_P0S"[(set (reg:SI 86)(unspec_volatile:SI [(match_operand:DI 0 "general_operand" "x")(match_operand:DI 1 "general_operand" "x")] 2092))(set (reg:SI 99)(unspec_volatile:SI [(match_dup 0)(match_dup 1)] 2094))(set (reg:SI 98)(unspec_volatile:SI [(match_dup 0)(match_dup 1)] 2096))(set (reg:SI 97)(unspec_volatile:SI [(match_dup 0)(match_dup 1)] 2098))(set (reg:SI 96)(unspec_volatile:SI [(match_dup 0)(match_dup 1)] 2100))]"CGEN_ENABLE_INSN_P (532)""cpaddacla0.h\\t%0,%1"[(set_attr "may_trap" "no")(set_attr "latency" "0")(set_attr "length" "4")(set_attr "slot" "cop")(set_attr "slots" "p0s")(set_attr "stall" "none")])(define_insn "cgen_intrinsic_cpaddacua0_h_P0S"[(set (reg:SI 86)(unspec_volatile:SI [(match_operand:DI 0 "general_operand" "x")(match_operand:DI 1 "general_operand" "x")] 2102))(set (reg:SI 103)(unspec_volatile:SI [(match_dup 0)(match_dup 1)] 2104))(set (reg:SI 102)(unspec_volatile:SI [(match_dup 0)(match_dup 1)] 2106))(set (reg:SI 101)(unspec_volatile:SI [(match_dup 0)(match_dup 1)] 2108))(set (reg:SI 100)(unspec_volatile:SI [(match_dup 0)(match_dup 1)] 2110))]"CGEN_ENABLE_INSN_P (533)""cpaddacua0.h\\t%0,%1"[(set_attr "may_trap" "no")(set_attr "latency" "0")(set_attr "length" "4")(set_attr "slot" "cop")(set_attr "slots" "p0s")(set_attr "stall" "none")])(define_insn "cgen_intrinsic_cpaddaca0_b_P0S"[(set (reg:SI 86)(unspec_volatile:SI [(match_operand:DI 0 "general_operand" "x")(match_operand:DI 1 "general_operand" "x")] 2112))(set (reg:SI 103)(unspec_volatile:SI [(match_dup 0)(match_dup 1)] 2114))(set (reg:SI 102)(unspec_volatile:SI [(match_dup 0)(match_dup 1)] 2116))(set (reg:SI 101)(unspec_volatile:SI [(match_dup 0)(match_dup 1)] 2118))(set (reg:SI 100)(unspec_volatile:SI [(match_dup 0)(match_dup 1)] 2120))(set (reg:SI 99)(unspec_volatile:SI [(match_dup 0)(match_dup 1)] 2122))(set (reg:SI 98)(unspec_volatile:SI [(match_dup 0)(match_dup 1)] 2124))(set (reg:SI 97)(unspec_volatile:SI [(match_dup 0)(match_dup 1)] 2126))(set (reg:SI 96)(unspec_volatile:SI [(match_dup 0)(match_dup 1)] 2128))]"CGEN_ENABLE_INSN_P (534)""cpaddaca0.b\\t%0,%1"[(set_attr "may_trap" "no")(set_attr "latency" "0")(set_attr "length" "4")(set_attr "slot" "cop")(set_attr "slots" "p0s")(set_attr "stall" "none")])(define_insn "cgen_intrinsic_cpaddaca0u_b_P0S"[(set (reg:SI 86)(unspec_volatile:SI [(match_operand:DI 0 "general_operand" "x")(match_operand:DI 1 "general_operand" "x")] 2130))(set (reg:SI 103)(unspec_volatile:SI [(match_dup 0)(match_dup 1)] 2132))(set (reg:SI 102)(unspec_volatile:SI [(match_dup 0)(match_dup 1)] 2134))(set (reg:SI 101)(unspec_volatile:SI [(match_dup 0)(match_dup 1)] 2136))(set (reg:SI 100)(unspec_volatile:SI [(match_dup 0)(match_dup 1)] 2138))(set (reg:SI 99)(unspec_volatile:SI [(match_dup 0)(match_dup 1)] 2140))(set (reg:SI 98)(unspec_volatile:SI [(match_dup 0)(match_dup 1)] 2142))(set (reg:SI 97)(unspec_volatile:SI [(match_dup 0)(match_dup 1)] 2144))(set (reg:SI 96)(unspec_volatile:SI [(match_dup 0)(match_dup 1)] 2146))]"CGEN_ENABLE_INSN_P (535)""cpaddaca0u.b\\t%0,%1"[(set_attr "may_trap" "no")(set_attr "latency" "0")(set_attr "length" "4")(set_attr "slot" "cop")(set_attr "slots" "p0s")(set_attr "stall" "none")])(define_insn "cgen_intrinsic_cpaddla0_h_P0S"[(set (reg:SI 99)(unspec_volatile:SI [(match_operand:DI 0 "general_operand" "x")(match_operand:DI 1 "general_operand" "x")] 2148))(set (reg:SI 98)(unspec_volatile:SI [(match_dup 0)(match_dup 1)] 2150))(set (reg:SI 97)(unspec_volatile:SI [(match_dup 0)(match_dup 1)] 2152))(set (reg:SI 96)(unspec_volatile:SI [(match_dup 0)(match_dup 1)] 2154))]"CGEN_ENABLE_INSN_P (536)""cpaddla0.h\\t%0,%1"[(set_attr "may_trap" "no")(set_attr "latency" "0")(set_attr "length" "4")(set_attr "slot" "cop")(set_attr "slots" "p0s")(set_attr "stall" "none")])(define_insn "cgen_intrinsic_cpaddua0_h_P0S"[(set (reg:SI 103)(unspec_volatile:SI [(match_operand:DI 0 "general_operand" "x")(match_operand:DI 1 "general_operand" "x")] 2156))(set (reg:SI 102)(unspec_volatile:SI [(match_dup 0)(match_dup 1)] 2158))(set (reg:SI 101)(unspec_volatile:SI [(match_dup 0)(match_dup 1)] 2160))(set (reg:SI 100)(unspec_volatile:SI [(match_dup 0)(match_dup 1)] 2162))]"CGEN_ENABLE_INSN_P (537)""cpaddua0.h\\t%0,%1"[(set_attr "may_trap" "no")(set_attr "latency" "0")(set_attr "length" "4")(set_attr "slot" "cop")(set_attr "slots" "p0s")(set_attr "stall" "none")])(define_insn "cgen_intrinsic_cpadda0_b_P0S"[(set (reg:SI 103)(unspec_volatile:SI [(match_operand:DI 0 "general_operand" "x")(match_operand:DI 1 "general_operand" "x")] 2164))(set (reg:SI 102)(unspec_volatile:SI [(match_dup 0)(match_dup 1)] 2166))(set (reg:SI 101)(unspec_volatile:SI [(match_dup 0)(match_dup 1)] 2168))(set (reg:SI 100)(unspec_volatile:SI [(match_dup 0)(match_dup 1)] 2170))(set (reg:SI 99)(unspec_volatile:SI [(match_dup 0)(match_dup 1)] 2172))(set (reg:SI 98)(unspec_volatile:SI [(match_dup 0)(match_dup 1)] 2174))(set (reg:SI 97)(unspec_volatile:SI [(match_dup 0)(match_dup 1)] 2176))(set (reg:SI 96)(unspec_volatile:SI [(match_dup 0)(match_dup 1)] 2178))]"CGEN_ENABLE_INSN_P (538)""cpadda0.b\\t%0,%1"[(set_attr "may_trap" "no")(set_attr "latency" "0")(set_attr "length" "4")(set_attr "slot" "cop")(set_attr "slots" "p0s")(set_attr "stall" "none")])(define_insn "cgen_intrinsic_cpadda0u_b_P0S"[(set (reg:SI 103)(unspec_volatile:SI [(match_operand:DI 0 "general_operand" "x")(match_operand:DI 1 "general_operand" "x")] 2180))(set (reg:SI 102)(unspec_volatile:SI [(match_dup 0)(match_dup 1)] 2182))(set (reg:SI 101)(unspec_volatile:SI [(match_dup 0)(match_dup 1)] 2184))(set (reg:SI 100)(unspec_volatile:SI [(match_dup 0)(match_dup 1)] 2186))(set (reg:SI 99)(unspec_volatile:SI [(match_dup 0)(match_dup 1)] 2188))(set (reg:SI 98)(unspec_volatile:SI [(match_dup 0)(match_dup 1)] 2190))(set (reg:SI 97)(unspec_volatile:SI [(match_dup 0)(match_dup 1)] 2192))(set (reg:SI 96)(unspec_volatile:SI [(match_dup 0)(match_dup 1)] 2194))]"CGEN_ENABLE_INSN_P (539)""cpadda0u.b\\t%0,%1"[(set_attr "may_trap" "no")(set_attr "latency" "0")(set_attr "length" "4")(set_attr "slot" "cop")(set_attr "slots" "p0s")(set_attr "stall" "none")])(define_insn "cgen_intrinsic_cpcmpge_w_C3"[(set (reg:SI 81)(unspec_volatile:SI [(match_operand:DI 0 "general_operand" "x")(match_operand:DI 1 "general_operand" "x")] 3282))]"CGEN_ENABLE_INSN_P (540)""cpcmpge.w\\t%0,%1"[(set_attr "may_trap" "no")(set_attr "latency" "0")(set_attr "length" "4")(set_attr "slot" "cop")(set_attr "slots" "c3")(set_attr "stall" "none")])(define_insn "cgen_intrinsic_cpcmpge_w_P0S_P1"[(set (reg:SI 81)(unspec_volatile:SI [(match_operand:DI 0 "general_operand" "x")(match_operand:DI 1 "general_operand" "x")] 3282))]"CGEN_ENABLE_INSN_P (541)""cpcmpge.w\\t%0,%1"[(set_attr "may_trap" "no")(set_attr "latency" "0")(set_attr "length" "4")(set_attr "slot" "cop")(set_attr "slots" "p0s_p1")(set_attr "stall" "none")])(define_insn "cgen_intrinsic_cpcmpgeu_w_C3"[(set (reg:SI 81)(unspec_volatile:SI [(match_operand:DI 0 "general_operand" "x")(match_operand:DI 1 "general_operand" "x")] 3284))]"CGEN_ENABLE_INSN_P (542)""cpcmpgeu.w\\t%0,%1"[(set_attr "may_trap" "no")(set_attr "latency" "0")(set_attr "length" "4")(set_attr "slot" "cop")(set_attr "slots" "c3")(set_attr "stall" "none")])(define_insn "cgen_intrinsic_cpcmpgeu_w_P0S_P1"[(set (reg:SI 81)(unspec_volatile:SI [(match_operand:DI 0 "general_operand" "x")(match_operand:DI 1 "general_operand" "x")] 3284))]"CGEN_ENABLE_INSN_P (543)""cpcmpgeu.w\\t%0,%1"[(set_attr "may_trap" "no")(set_attr "latency" "0")(set_attr "length" "4")(set_attr "slot" "cop")(set_attr "slots" "p0s_p1")(set_attr "stall" "none")])(define_insn "cgen_intrinsic_cpcmpge_h_C3"[(set (reg:SI 81)(unspec_volatile:SI [(match_operand:DI 0 "general_operand" "x")(match_operand:DI 1 "general_operand" "x")] 3286))]"CGEN_ENABLE_INSN_P (544)""cpcmpge.h\\t%0,%1"[(set_attr "may_trap" "no")(set_attr "latency" "0")(set_attr "length" "4")(set_attr "slot" "cop")(set_attr "slots" "c3")(set_attr "stall" "none")])(define_insn "cgen_intrinsic_cpcmpge_h_P0S_P1"[(set (reg:SI 81)(unspec_volatile:SI [(match_operand:DI 0 "general_operand" "x")(match_operand:DI 1 "general_operand" "x")] 3286))]"CGEN_ENABLE_INSN_P (545)""cpcmpge.h\\t%0,%1"[(set_attr "may_trap" "no")(set_attr "latency" "0")(set_attr "length" "4")(set_attr "slot" "cop")(set_attr "slots" "p0s_p1")(set_attr "stall" "none")])(define_insn "cgen_intrinsic_cpcmpge_b_C3"[(set (reg:SI 81)(unspec_volatile:SI [(match_operand:DI 0 "general_operand" "x")(match_operand:DI 1 "general_operand" "x")] 3288))]"CGEN_ENABLE_INSN_P (546)""cpcmpge.b\\t%0,%1"[(set_attr "may_trap" "no")(set_attr "latency" "0")(set_attr "length" "4")(set_attr "slot" "cop")(set_attr "slots" "c3")(set_attr "stall" "none")])(define_insn "cgen_intrinsic_cpcmpge_b_P0S_P1"[(set (reg:SI 81)(unspec_volatile:SI [(match_operand:DI 0 "general_operand" "x")(match_operand:DI 1 "general_operand" "x")] 3288))]"CGEN_ENABLE_INSN_P (547)""cpcmpge.b\\t%0,%1"[(set_attr "may_trap" "no")(set_attr "latency" "0")(set_attr "length" "4")(set_attr "slot" "cop")(set_attr "slots" "p0s_p1")(set_attr "stall" "none")])(define_insn "cgen_intrinsic_cpcmpgeu_b_C3"[(set (reg:SI 81)(unspec_volatile:SI [(match_operand:DI 0 "general_operand" "x")(match_operand:DI 1 "general_operand" "x")] 3290))]"CGEN_ENABLE_INSN_P (548)""cpcmpgeu.b\\t%0,%1"[(set_attr "may_trap" "no")(set_attr "latency" "0")(set_attr "length" "4")(set_attr "slot" "cop")(set_attr "slots" "c3")(set_attr "stall" "none")])(define_insn "cgen_intrinsic_cpcmpgeu_b_P0S_P1"[(set (reg:SI 81)(unspec_volatile:SI [(match_operand:DI 0 "general_operand" "x")(match_operand:DI 1 "general_operand" "x")] 3290))]"CGEN_ENABLE_INSN_P (549)""cpcmpgeu.b\\t%0,%1"[(set_attr "may_trap" "no")(set_attr "latency" "0")(set_attr "length" "4")(set_attr "slot" "cop")(set_attr "slots" "p0s_p1")(set_attr "stall" "none")])(define_insn "cgen_intrinsic_cpcmpgt_w_C3"[(set (reg:SI 81)(unspec_volatile:SI [(match_operand:DI 0 "general_operand" "x")(match_operand:DI 1 "general_operand" "x")] 3292))]"CGEN_ENABLE_INSN_P (550)""cpcmpgt.w\\t%0,%1"[(set_attr "may_trap" "no")(set_attr "latency" "0")(set_attr "length" "4")(set_attr "slot" "cop")(set_attr "slots" "c3")(set_attr "stall" "none")])(define_insn "cgen_intrinsic_cpcmpgt_w_P0S_P1"[(set (reg:SI 81)(unspec_volatile:SI [(match_operand:DI 0 "general_operand" "x")(match_operand:DI 1 "general_operand" "x")] 3292))]"CGEN_ENABLE_INSN_P (551)""cpcmpgt.w\\t%0,%1"[(set_attr "may_trap" "no")(set_attr "latency" "0")(set_attr "length" "4")(set_attr "slot" "cop")(set_attr "slots" "p0s_p1")(set_attr "stall" "none")])(define_insn "cgen_intrinsic_cpcmpgtu_w_C3"[(set (reg:SI 81)(unspec_volatile:SI [(match_operand:DI 0 "general_operand" "x")(match_operand:DI 1 "general_operand" "x")] 3294))]"CGEN_ENABLE_INSN_P (552)""cpcmpgtu.w\\t%0,%1"[(set_attr "may_trap" "no")(set_attr "latency" "0")(set_attr "length" "4")(set_attr "slot" "cop")(set_attr "slots" "c3")(set_attr "stall" "none")])(define_insn "cgen_intrinsic_cpcmpgtu_w_P0S_P1"[(set (reg:SI 81)(unspec_volatile:SI [(match_operand:DI 0 "general_operand" "x")(match_operand:DI 1 "general_operand" "x")] 3294))]"CGEN_ENABLE_INSN_P (553)""cpcmpgtu.w\\t%0,%1"[(set_attr "may_trap" "no")(set_attr "latency" "0")(set_attr "length" "4")(set_attr "slot" "cop")(set_attr "slots" "p0s_p1")(set_attr "stall" "none")])(define_insn "cgen_intrinsic_cpcmpgt_h_C3"[(set (reg:SI 81)(unspec_volatile:SI [(match_operand:DI 0 "general_operand" "x")(match_operand:DI 1 "general_operand" "x")] 3296))]"CGEN_ENABLE_INSN_P (554)""cpcmpgt.h\\t%0,%1"[(set_attr "may_trap" "no")(set_attr "latency" "0")(set_attr "length" "4")(set_attr "slot" "cop")(set_attr "slots" "c3")(set_attr "stall" "none")])(define_insn "cgen_intrinsic_cpcmpgt_h_P0S_P1"[(set (reg:SI 81)(unspec_volatile:SI [(match_operand:DI 0 "general_operand" "x")(match_operand:DI 1 "general_operand" "x")] 3296))]"CGEN_ENABLE_INSN_P (555)""cpcmpgt.h\\t%0,%1"[(set_attr "may_trap" "no")(set_attr "latency" "0")(set_attr "length" "4")(set_attr "slot" "cop")(set_attr "slots" "p0s_p1")(set_attr "stall" "none")])(define_insn "cgen_intrinsic_cpcmpgt_b_C3"[(set (reg:SI 81)(unspec_volatile:SI [(match_operand:DI 0 "general_operand" "x")(match_operand:DI 1 "general_operand" "x")] 3298))]"CGEN_ENABLE_INSN_P (556)""cpcmpgt.b\\t%0,%1"[(set_attr "may_trap" "no")(set_attr "latency" "0")(set_attr "length" "4")(set_attr "slot" "cop")(set_attr "slots" "c3")(set_attr "stall" "none")])(define_insn "cgen_intrinsic_cpcmpgt_b_P0S_P1"[(set (reg:SI 81)(unspec_volatile:SI [(match_operand:DI 0 "general_operand" "x")(match_operand:DI 1 "general_operand" "x")] 3298))]"CGEN_ENABLE_INSN_P (557)""cpcmpgt.b\\t%0,%1"[(set_attr "may_trap" "no")(set_attr "latency" "0")(set_attr "length" "4")(set_attr "slot" "cop")(set_attr "slots" "p0s_p1")(set_attr "stall" "none")])(define_insn "cgen_intrinsic_cpcmpgtu_b_C3"[(set (reg:SI 81)(unspec_volatile:SI [(match_operand:DI 0 "general_operand" "x")(match_operand:DI 1 "general_operand" "x")] 3300))]"CGEN_ENABLE_INSN_P (558)""cpcmpgtu.b\\t%0,%1"[(set_attr "may_trap" "no")(set_attr "latency" "0")(set_attr "length" "4")(set_attr "slot" "cop")(set_attr "slots" "c3")(set_attr "stall" "none")])(define_insn "cgen_intrinsic_cpcmpgtu_b_P0S_P1"[(set (reg:SI 81)(unspec_volatile:SI [(match_operand:DI 0 "general_operand" "x")(match_operand:DI 1 "general_operand" "x")] 3300))]"CGEN_ENABLE_INSN_P (559)""cpcmpgtu.b\\t%0,%1"[(set_attr "may_trap" "no")(set_attr "latency" "0")(set_attr "length" "4")(set_attr "slot" "cop")(set_attr "slots" "p0s_p1")(set_attr "stall" "none")])(define_insn "cgen_intrinsic_cpcmpne_w_C3"[(set (reg:SI 81)(unspec_volatile:SI [(match_operand:DI 0 "general_operand" "x")(match_operand:DI 1 "general_operand" "x")] 3302))]"CGEN_ENABLE_INSN_P (560)""cpcmpne.w\\t%0,%1"[(set_attr "may_trap" "no")(set_attr "latency" "0")(set_attr "length" "4")(set_attr "slot" "cop")(set_attr "slots" "c3")(set_attr "stall" "none")])(define_insn "cgen_intrinsic_cpcmpne_w_P0S_P1"[(set (reg:SI 81)(unspec_volatile:SI [(match_operand:DI 0 "general_operand" "x")(match_operand:DI 1 "general_operand" "x")] 3302))]"CGEN_ENABLE_INSN_P (561)""cpcmpne.w\\t%0,%1"[(set_attr "may_trap" "no")(set_attr "latency" "0")(set_attr "length" "4")(set_attr "slot" "cop")(set_attr "slots" "p0s_p1")(set_attr "stall" "none")])(define_insn "cgen_intrinsic_cpcmpne_h_C3"[(set (reg:SI 81)(unspec_volatile:SI [(match_operand:DI 0 "general_operand" "x")(match_operand:DI 1 "general_operand" "x")] 3304))]"CGEN_ENABLE_INSN_P (562)""cpcmpne.h\\t%0,%1"[(set_attr "may_trap" "no")(set_attr "latency" "0")(set_attr "length" "4")(set_attr "slot" "cop")(set_attr "slots" "c3")(set_attr "stall" "none")])(define_insn "cgen_intrinsic_cpcmpne_h_P0S_P1"[(set (reg:SI 81)(unspec_volatile:SI [(match_operand:DI 0 "general_operand" "x")(match_operand:DI 1 "general_operand" "x")] 3304))]"CGEN_ENABLE_INSN_P (563)""cpcmpne.h\\t%0,%1"[(set_attr "may_trap" "no")(set_attr "latency" "0")(set_attr "length" "4")(set_attr "slot" "cop")(set_attr "slots" "p0s_p1")(set_attr "stall" "none")])(define_insn "cgen_intrinsic_cpcmpne_b_C3"[(set (reg:SI 81)(unspec_volatile:SI [(match_operand:DI 0 "general_operand" "x")(match_operand:DI 1 "general_operand" "x")] 3306))]"CGEN_ENABLE_INSN_P (564)""cpcmpne.b\\t%0,%1"[(set_attr "may_trap" "no")(set_attr "latency" "0")(set_attr "length" "4")(set_attr "slot" "cop")(set_attr "slots" "c3")(set_attr "stall" "none")])(define_insn "cgen_intrinsic_cpcmpne_b_P0S_P1"[(set (reg:SI 81)(unspec_volatile:SI [(match_operand:DI 0 "general_operand" "x")(match_operand:DI 1 "general_operand" "x")] 3306))]"CGEN_ENABLE_INSN_P (565)""cpcmpne.b\\t%0,%1"[(set_attr "may_trap" "no")(set_attr "latency" "0")(set_attr "length" "4")(set_attr "slot" "cop")(set_attr "slots" "p0s_p1")(set_attr "stall" "none")])(define_insn "cgen_intrinsic_cpcmpeq_w_C3"[(set (reg:SI 81)(unspec_volatile:SI [(match_operand:DI 0 "general_operand" "x")(match_operand:DI 1 "general_operand" "x")] 3308))]"CGEN_ENABLE_INSN_P (566)""cpcmpeq.w\\t%0,%1"[(set_attr "may_trap" "no")(set_attr "latency" "0")(set_attr "length" "4")(set_attr "slot" "cop")(set_attr "slots" "c3")(set_attr "stall" "none")])(define_insn "cgen_intrinsic_cpcmpeq_w_P0S_P1"[(set (reg:SI 81)(unspec_volatile:SI [(match_operand:DI 0 "general_operand" "x")(match_operand:DI 1 "general_operand" "x")] 3308))]"CGEN_ENABLE_INSN_P (567)""cpcmpeq.w\\t%0,%1"[(set_attr "may_trap" "no")(set_attr "latency" "0")(set_attr "length" "4")(set_attr "slot" "cop")(set_attr "slots" "p0s_p1")(set_attr "stall" "none")])(define_insn "cgen_intrinsic_cpcmpeq_h_C3"[(set (reg:SI 81)(unspec_volatile:SI [(match_operand:DI 0 "general_operand" "x")(match_operand:DI 1 "general_operand" "x")] 3310))]"CGEN_ENABLE_INSN_P (568)""cpcmpeq.h\\t%0,%1"[(set_attr "may_trap" "no")(set_attr "latency" "0")(set_attr "length" "4")(set_attr "slot" "cop")(set_attr "slots" "c3")(set_attr "stall" "none")])(define_insn "cgen_intrinsic_cpcmpeq_h_P0S_P1"[(set (reg:SI 81)(unspec_volatile:SI [(match_operand:DI 0 "general_operand" "x")(match_operand:DI 1 "general_operand" "x")] 3310))]"CGEN_ENABLE_INSN_P (569)""cpcmpeq.h\\t%0,%1"[(set_attr "may_trap" "no")(set_attr "latency" "0")(set_attr "length" "4")(set_attr "slot" "cop")(set_attr "slots" "p0s_p1")(set_attr "stall" "none")])(define_insn "cgen_intrinsic_cpcmpeq_b_C3"[(set (reg:SI 81)(unspec_volatile:SI [(match_operand:DI 0 "general_operand" "x")(match_operand:DI 1 "general_operand" "x")] 3312))]"CGEN_ENABLE_INSN_P (570)""cpcmpeq.b\\t%0,%1"[(set_attr "may_trap" "no")(set_attr "latency" "0")(set_attr "length" "4")(set_attr "slot" "cop")(set_attr "slots" "c3")(set_attr "stall" "none")])(define_insn "cgen_intrinsic_cpcmpeq_b_P0S_P1"[(set (reg:SI 81)(unspec_volatile:SI [(match_operand:DI 0 "general_operand" "x")(match_operand:DI 1 "general_operand" "x")] 3312))]"CGEN_ENABLE_INSN_P (571)""cpcmpeq.b\\t%0,%1"[(set_attr "may_trap" "no")(set_attr "latency" "0")(set_attr "length" "4")(set_attr "slot" "cop")(set_attr "slots" "p0s_p1")(set_attr "stall" "none")])(define_insn "cgen_intrinsic_cpcmpeqz_b_C3"[(set (reg:SI 81)(unspec_volatile:SI [(match_operand:DI 0 "general_operand" "x")(match_operand:DI 1 "general_operand" "x")] 3314))]"CGEN_ENABLE_INSN_P (572)""cpcmpeqz.b\\t%0,%1"[(set_attr "may_trap" "no")(set_attr "latency" "0")(set_attr "length" "4")(set_attr "slot" "cop")(set_attr "slots" "c3")(set_attr "stall" "none")])(define_insn "cgen_intrinsic_cpcmpeqz_b_P0S_P1"[(set (reg:SI 81)(unspec_volatile:SI [(match_operand:DI 0 "general_operand" "x")(match_operand:DI 1 "general_operand" "x")] 3314))]"CGEN_ENABLE_INSN_P (573)""cpcmpeqz.b\\t%0,%1"[(set_attr "may_trap" "no")(set_attr "latency" "0")(set_attr "length" "4")(set_attr "slot" "cop")(set_attr "slots" "p0s_p1")(set_attr "stall" "none")])(define_insn "cgen_intrinsic_cpmovtocc_C3"[(set (reg:SI 81)(unspec_volatile:SI [(match_operand:DI 0 "general_operand" "x")] 3378))]"CGEN_ENABLE_INSN_P (574)""cpmovtocc\\t%0"[(set_attr "may_trap" "no")(set_attr "latency" "0")(set_attr "length" "4")(set_attr "slot" "cop")(set_attr "slots" "c3")(set_attr "stall" "none")])(define_insn "cgen_intrinsic_cpmovtocc_P0S_P1"[(set (reg:SI 81)(unspec_volatile:SI [(match_operand:DI 0 "general_operand" "x")] 3378))]"CGEN_ENABLE_INSN_P (575)""cpmovtocc\\t%0"[(set_attr "may_trap" "no")(set_attr "latency" "0")(set_attr "length" "4")(set_attr "slot" "cop")(set_attr "slots" "p0s_p1")(set_attr "stall" "none")])(define_insn "cgen_intrinsic_cpmovtocsar1_C3"[(set (reg:SI 95)(unspec_volatile:SI [(match_operand:DI 0 "general_operand" "x")] 3380))]"CGEN_ENABLE_INSN_P (576)""cpmovtocsar1\\t%0"[(set_attr "may_trap" "no")(set_attr "latency" "0")(set_attr "length" "4")(set_attr "slot" "cop")(set_attr "slots" "c3")(set_attr "stall" "none")])(define_insn "cgen_intrinsic_cpmovtocsar1_P0S_P1"[(set (reg:SI 95)(unspec_volatile:SI [(match_operand:DI 0 "general_operand" "x")] 3380))]"CGEN_ENABLE_INSN_P (577)""cpmovtocsar1\\t%0"[(set_attr "may_trap" "no")(set_attr "latency" "0")(set_attr "length" "4")(set_attr "slot" "cop")(set_attr "slots" "p0s_p1")(set_attr "stall" "none")])(define_insn "cgen_intrinsic_cpmovtocsar0_C3"[(set (reg:SI 80)(unspec_volatile:SI [(match_operand:DI 0 "general_operand" "x")] 3382))]"CGEN_ENABLE_INSN_P (578)""cpmovtocsar0\\t%0"[(set_attr "may_trap" "no")(set_attr "latency" "0")(set_attr "length" "4")(set_attr "slot" "cop")(set_attr "slots" "c3")(set_attr "stall" "none")])(define_insn "cgen_intrinsic_cpmovtocsar0_P0S_P1"[(set (reg:SI 80)(unspec_volatile:SI [(match_operand:DI 0 "general_operand" "x")] 3382))]"CGEN_ENABLE_INSN_P (579)""cpmovtocsar0\\t%0"[(set_attr "may_trap" "no")(set_attr "latency" "0")(set_attr "length" "4")(set_attr "slot" "cop")(set_attr "slots" "p0s_p1")(set_attr "stall" "none")])(define_insn "cgen_intrinsic_cpmovfrcc_C3"[(set (match_operand:DI 0 "nonimmediate_operand" "=x")(unspec_volatile:DI [(const_int 0)] 3384))]"CGEN_ENABLE_INSN_P (580)""cpmovfrcc\\t%0"[(set_attr "may_trap" "no")(set_attr "latency" "0")(set_attr "length" "4")(set_attr "slot" "cop")(set_attr "slots" "c3")(set_attr "stall" "none")])(define_insn "cgen_intrinsic_cpmovfrcc_P0S_P1"[(set (match_operand:DI 0 "nonimmediate_operand" "=x")(unspec_volatile:DI [(const_int 0)] 3384))]"CGEN_ENABLE_INSN_P (581)""cpmovfrcc\\t%0"[(set_attr "may_trap" "no")(set_attr "latency" "0")(set_attr "length" "4")(set_attr "slot" "cop")(set_attr "slots" "p0s_p1")(set_attr "stall" "none")])(define_insn "cgen_intrinsic_cpmovfrcsar1_C3"[(set (match_operand:DI 0 "nonimmediate_operand" "=x")(unspec_volatile:DI [(const_int 0)] 3386))]"CGEN_ENABLE_INSN_P (582)""cpmovfrcsar1\\t%0"[(set_attr "may_trap" "no")(set_attr "latency" "0")(set_attr "length" "4")(set_attr "slot" "cop")(set_attr "slots" "c3")(set_attr "stall" "none")])(define_insn "cgen_intrinsic_cpmovfrcsar1_P0S_P1"[(set (match_operand:DI 0 "nonimmediate_operand" "=x")(unspec_volatile:DI [(const_int 0)] 3386))]"CGEN_ENABLE_INSN_P (583)""cpmovfrcsar1\\t%0"[(set_attr "may_trap" "no")(set_attr "latency" "0")(set_attr "length" "4")(set_attr "slot" "cop")(set_attr "slots" "p0s_p1")(set_attr "stall" "none")])(define_insn "cgen_intrinsic_cpmovfrcsar0_C3"[(set (match_operand:DI 0 "nonimmediate_operand" "=x")(unspec_volatile:DI [(const_int 0)] 3388))]"CGEN_ENABLE_INSN_P (584)""cpmovfrcsar0\\t%0"[(set_attr "may_trap" "no")(set_attr "latency" "0")(set_attr "length" "4")(set_attr "slot" "cop")(set_attr "slots" "c3")(set_attr "stall" "none")])(define_insn "cgen_intrinsic_cpmovfrcsar0_P0S_P1"[(set (match_operand:DI 0 "nonimmediate_operand" "=x")(unspec_volatile:DI [(const_int 0)] 3388))]"CGEN_ENABLE_INSN_P (585)""cpmovfrcsar0\\t%0"[(set_attr "may_trap" "no")(set_attr "latency" "0")(set_attr "length" "4")(set_attr "slot" "cop")(set_attr "slots" "p0s_p1")(set_attr "stall" "none")])(define_insn "cgen_intrinsic_cdcastw_C3"[(set (match_operand:DI 0 "nonimmediate_operand" "=x")(unspec:DI [(match_operand:DI 1 "general_operand" "x")] 3316))]"CGEN_ENABLE_INSN_P (586)""cdcastw\\t%0,%1"[(set_attr "may_trap" "no")(set_attr "latency" "0")(set_attr "length" "4")(set_attr "slot" "cop")(set_attr "slots" "c3")(set_attr "stall" "none")])(define_insn "cgen_intrinsic_cdcastw_P0S_P1"[(set (match_operand:DI 0 "nonimmediate_operand" "=x")(unspec:DI [(match_operand:DI 1 "general_operand" "x")] 3316))]"CGEN_ENABLE_INSN_P (587)""cdcastw\\t%0,%1"[(set_attr "may_trap" "no")(set_attr "latency" "0")(set_attr "length" "4")(set_attr "slot" "cop")(set_attr "slots" "p0s_p1")(set_attr "stall" "none")])(define_insn "cgen_intrinsic_cdcastuw_C3"[(set (match_operand:DI 0 "nonimmediate_operand" "=x")(unspec:DI [(match_operand:DI 1 "general_operand" "x")] 3318))]"CGEN_ENABLE_INSN_P (588)""cdcastuw\\t%0,%1"[(set_attr "may_trap" "no")(set_attr "latency" "0")(set_attr "length" "4")(set_attr "slot" "cop")(set_attr "slots" "c3")(set_attr "stall" "none")])(define_insn "cgen_intrinsic_cdcastuw_P0S_P1"[(set (match_operand:DI 0 "nonimmediate_operand" "=x")(unspec:DI [(match_operand:DI 1 "general_operand" "x")] 3318))]"CGEN_ENABLE_INSN_P (589)""cdcastuw\\t%0,%1"[(set_attr "may_trap" "no")(set_attr "latency" "0")(set_attr "length" "4")(set_attr "slot" "cop")(set_attr "slots" "p0s_p1")(set_attr "stall" "none")])(define_insn "cgen_intrinsic_cpcasth_w_C3"[(set (match_operand:DI 0 "nonimmediate_operand" "=x")(unspec:DI [(match_operand:DI 1 "general_operand" "x")] 3320))]"CGEN_ENABLE_INSN_P (590)""cpcasth.w\\t%0,%1"[(set_attr "may_trap" "no")(set_attr "latency" "0")(set_attr "length" "4")(set_attr "slot" "cop")(set_attr "slots" "c3")(set_attr "stall" "none")])(define_insn "cgen_intrinsic_cpcasth_w_P0S_P1"[(set (match_operand:DI 0 "nonimmediate_operand" "=x")(unspec:DI [(match_operand:DI 1 "general_operand" "x")] 3320))]"CGEN_ENABLE_INSN_P (591)""cpcasth.w\\t%0,%1"[(set_attr "may_trap" "no")(set_attr "latency" "0")(set_attr "length" "4")(set_attr "slot" "cop")(set_attr "slots" "p0s_p1")(set_attr "stall" "none")])(define_insn "cgen_intrinsic_cpcastuh_w_C3"[(set (match_operand:DI 0 "nonimmediate_operand" "=x")(unspec:DI [(match_operand:DI 1 "general_operand" "x")] 3322))]"CGEN_ENABLE_INSN_P (592)""cpcastuh.w\\t%0,%1"[(set_attr "may_trap" "no")(set_attr "latency" "0")(set_attr "length" "4")(set_attr "slot" "cop")(set_attr "slots" "c3")(set_attr "stall" "none")])(define_insn "cgen_intrinsic_cpcastuh_w_P0S_P1"[(set (match_operand:DI 0 "nonimmediate_operand" "=x")(unspec:DI [(match_operand:DI 1 "general_operand" "x")] 3322))]"CGEN_ENABLE_INSN_P (593)""cpcastuh.w\\t%0,%1"[(set_attr "may_trap" "no")(set_attr "latency" "0")(set_attr "length" "4")(set_attr "slot" "cop")(set_attr "slots" "p0s_p1")(set_attr "stall" "none")])(define_insn "cgen_intrinsic_cpcastb_w_C3"[(set (match_operand:DI 0 "nonimmediate_operand" "=x")(unspec:DI [(match_operand:DI 1 "general_operand" "x")] 3324))]"CGEN_ENABLE_INSN_P (594)""cpcastb.w\\t%0,%1"[(set_attr "may_trap" "no")(set_attr "latency" "0")(set_attr "length" "4")(set_attr "slot" "cop")(set_attr "slots" "c3")(set_attr "stall" "none")])(define_insn "cgen_intrinsic_cpcastb_w_P0S_P1"[(set (match_operand:DI 0 "nonimmediate_operand" "=x")(unspec:DI [(match_operand:DI 1 "general_operand" "x")] 3324))]"CGEN_ENABLE_INSN_P (595)""cpcastb.w\\t%0,%1"[(set_attr "may_trap" "no")(set_attr "latency" "0")(set_attr "length" "4")(set_attr "slot" "cop")(set_attr "slots" "p0s_p1")(set_attr "stall" "none")])(define_insn "cgen_intrinsic_cpcastub_w_C3"[(set (match_operand:DI 0 "nonimmediate_operand" "=x")(unspec:DI [(match_operand:DI 1 "general_operand" "x")] 3326))]"CGEN_ENABLE_INSN_P (596)""cpcastub.w\\t%0,%1"[(set_attr "may_trap" "no")(set_attr "latency" "0")(set_attr "length" "4")(set_attr "slot" "cop")(set_attr "slots" "c3")(set_attr "stall" "none")])(define_insn "cgen_intrinsic_cpcastub_w_P0S_P1"[(set (match_operand:DI 0 "nonimmediate_operand" "=x")(unspec:DI [(match_operand:DI 1 "general_operand" "x")] 3326))]"CGEN_ENABLE_INSN_P (597)""cpcastub.w\\t%0,%1"[(set_attr "may_trap" "no")(set_attr "latency" "0")(set_attr "length" "4")(set_attr "slot" "cop")(set_attr "slots" "p0s_p1")(set_attr "stall" "none")])(define_insn "cgen_intrinsic_cpcastb_h_C3"[(set (match_operand:DI 0 "nonimmediate_operand" "=x")(unspec:DI [(match_operand:DI 1 "general_operand" "x")] 3328))]"CGEN_ENABLE_INSN_P (598)""cpcastb.h\\t%0,%1"[(set_attr "may_trap" "no")(set_attr "latency" "0")(set_attr "length" "4")(set_attr "slot" "cop")(set_attr "slots" "c3")(set_attr "stall" "none")])(define_insn "cgen_intrinsic_cpcastb_h_P0S_P1"[(set (match_operand:DI 0 "nonimmediate_operand" "=x")(unspec:DI [(match_operand:DI 1 "general_operand" "x")] 3328))]"CGEN_ENABLE_INSN_P (599)""cpcastb.h\\t%0,%1"[(set_attr "may_trap" "no")(set_attr "latency" "0")(set_attr "length" "4")(set_attr "slot" "cop")(set_attr "slots" "p0s_p1")(set_attr "stall" "none")])(define_insn "cgen_intrinsic_cpcastub_h_C3"[(set (match_operand:DI 0 "nonimmediate_operand" "=x")(unspec:DI [(match_operand:DI 1 "general_operand" "x")] 3330))]"CGEN_ENABLE_INSN_P (600)""cpcastub.h\\t%0,%1"[(set_attr "may_trap" "no")(set_attr "latency" "0")(set_attr "length" "4")(set_attr "slot" "cop")(set_attr "slots" "c3")(set_attr "stall" "none")])(define_insn "cgen_intrinsic_cpcastub_h_P0S_P1"[(set (match_operand:DI 0 "nonimmediate_operand" "=x")(unspec:DI [(match_operand:DI 1 "general_operand" "x")] 3330))]"CGEN_ENABLE_INSN_P (601)""cpcastub.h\\t%0,%1"[(set_attr "may_trap" "no")(set_attr "latency" "0")(set_attr "length" "4")(set_attr "slot" "cop")(set_attr "slots" "p0s_p1")(set_attr "stall" "none")])(define_insn "cgen_intrinsic_cpextl_h_C3"[(set (match_operand:DI 0 "nonimmediate_operand" "=x")(unspec:DI [(match_operand:DI 1 "general_operand" "x")] 3332))]"CGEN_ENABLE_INSN_P (602)""cpextl.h\\t%0,%1"[(set_attr "may_trap" "no")(set_attr "latency" "0")(set_attr "length" "4")(set_attr "slot" "cop")(set_attr "slots" "c3")(set_attr "stall" "none")])(define_insn "cgen_intrinsic_cpextl_h_P0S_P1"[(set (match_operand:DI 0 "nonimmediate_operand" "=x")(unspec:DI [(match_operand:DI 1 "general_operand" "x")] 3332))]"CGEN_ENABLE_INSN_P (603)""cpextl.h\\t%0,%1"[(set_attr "may_trap" "no")(set_attr "latency" "0")(set_attr "length" "4")(set_attr "slot" "cop")(set_attr "slots" "p0s_p1")(set_attr "stall" "none")])(define_insn "cgen_intrinsic_cpextlu_h_C3"[(set (match_operand:DI 0 "nonimmediate_operand" "=x")(unspec:DI [(match_operand:DI 1 "general_operand" "x")] 3334))]"CGEN_ENABLE_INSN_P (604)""cpextlu.h\\t%0,%1"[(set_attr "may_trap" "no")(set_attr "latency" "0")(set_attr "length" "4")(set_attr "slot" "cop")(set_attr "slots" "c3")(set_attr "stall" "none")])(define_insn "cgen_intrinsic_cpextlu_h_P0S_P1"[(set (match_operand:DI 0 "nonimmediate_operand" "=x")(unspec:DI [(match_operand:DI 1 "general_operand" "x")] 3334))]"CGEN_ENABLE_INSN_P (605)""cpextlu.h\\t%0,%1"[(set_attr "may_trap" "no")(set_attr "latency" "0")(set_attr "length" "4")(set_attr "slot" "cop")(set_attr "slots" "p0s_p1")(set_attr "stall" "none")])(define_insn "cgen_intrinsic_cpextl_b_C3"[(set (match_operand:DI 0 "nonimmediate_operand" "=x")(unspec:DI [(match_operand:DI 1 "general_operand" "x")] 3336))]"CGEN_ENABLE_INSN_P (606)""cpextl.b\\t%0,%1"[(set_attr "may_trap" "no")(set_attr "latency" "0")(set_attr "length" "4")(set_attr "slot" "cop")(set_attr "slots" "c3")(set_attr "stall" "none")])(define_insn "cgen_intrinsic_cpextl_b_P0S_P1"[(set (match_operand:DI 0 "nonimmediate_operand" "=x")(unspec:DI [(match_operand:DI 1 "general_operand" "x")] 3336))]"CGEN_ENABLE_INSN_P (607)""cpextl.b\\t%0,%1"[(set_attr "may_trap" "no")(set_attr "latency" "0")(set_attr "length" "4")(set_attr "slot" "cop")(set_attr "slots" "p0s_p1")(set_attr "stall" "none")])(define_insn "cgen_intrinsic_cpextlu_b_C3"[(set (match_operand:DI 0 "nonimmediate_operand" "=x")(unspec:DI [(match_operand:DI 1 "general_operand" "x")] 3338))]"CGEN_ENABLE_INSN_P (608)""cpextlu.b\\t%0,%1"[(set_attr "may_trap" "no")(set_attr "latency" "0")(set_attr "length" "4")(set_attr "slot" "cop")(set_attr "slots" "c3")(set_attr "stall" "none")])(define_insn "cgen_intrinsic_cpextlu_b_P0S_P1"[(set (match_operand:DI 0 "nonimmediate_operand" "=x")(unspec:DI [(match_operand:DI 1 "general_operand" "x")] 3338))]"CGEN_ENABLE_INSN_P (609)""cpextlu.b\\t%0,%1"[(set_attr "may_trap" "no")(set_attr "latency" "0")(set_attr "length" "4")(set_attr "slot" "cop")(set_attr "slots" "p0s_p1")(set_attr "stall" "none")])(define_insn "cgen_intrinsic_cpextu_h_C3"[(set (match_operand:DI 0 "nonimmediate_operand" "=x")(unspec:DI [(match_operand:DI 1 "general_operand" "x")] 3340))]"CGEN_ENABLE_INSN_P (610)""cpextu.h\\t%0,%1"[(set_attr "may_trap" "no")(set_attr "latency" "0")(set_attr "length" "4")(set_attr "slot" "cop")(set_attr "slots" "c3")(set_attr "stall" "none")])(define_insn "cgen_intrinsic_cpextu_h_P0S_P1"[(set (match_operand:DI 0 "nonimmediate_operand" "=x")(unspec:DI [(match_operand:DI 1 "general_operand" "x")] 3340))]"CGEN_ENABLE_INSN_P (611)""cpextu.h\\t%0,%1"[(set_attr "may_trap" "no")(set_attr "latency" "0")(set_attr "length" "4")(set_attr "slot" "cop")(set_attr "slots" "p0s_p1")(set_attr "stall" "none")])(define_insn "cgen_intrinsic_cpextuu_h_C3"[(set (match_operand:DI 0 "nonimmediate_operand" "=x")(unspec:DI [(match_operand:DI 1 "general_operand" "x")] 3342))]"CGEN_ENABLE_INSN_P (612)""cpextuu.h\\t%0,%1"[(set_attr "may_trap" "no")(set_attr "latency" "0")(set_attr "length" "4")(set_attr "slot" "cop")(set_attr "slots" "c3")(set_attr "stall" "none")])(define_insn "cgen_intrinsic_cpextuu_h_P0S_P1"[(set (match_operand:DI 0 "nonimmediate_operand" "=x")(unspec:DI [(match_operand:DI 1 "general_operand" "x")] 3342))]"CGEN_ENABLE_INSN_P (613)""cpextuu.h\\t%0,%1"[(set_attr "may_trap" "no")(set_attr "latency" "0")(set_attr "length" "4")(set_attr "slot" "cop")(set_attr "slots" "p0s_p1")(set_attr "stall" "none")])(define_insn "cgen_intrinsic_cpextu_b_C3"[(set (match_operand:DI 0 "nonimmediate_operand" "=x")(unspec:DI [(match_operand:DI 1 "general_operand" "x")] 3344))]"CGEN_ENABLE_INSN_P (614)""cpextu.b\\t%0,%1"[(set_attr "may_trap" "no")(set_attr "latency" "0")(set_attr "length" "4")(set_attr "slot" "cop")(set_attr "slots" "c3")(set_attr "stall" "none")])(define_insn "cgen_intrinsic_cpextu_b_P0S_P1"[(set (match_operand:DI 0 "nonimmediate_operand" "=x")(unspec:DI [(match_operand:DI 1 "general_operand" "x")] 3344))]"CGEN_ENABLE_INSN_P (615)""cpextu.b\\t%0,%1"[(set_attr "may_trap" "no")(set_attr "latency" "0")(set_attr "length" "4")(set_attr "slot" "cop")(set_attr "slots" "p0s_p1")(set_attr "stall" "none")])(define_insn "cgen_intrinsic_cpextuu_b_C3"[(set (match_operand:DI 0 "nonimmediate_operand" "=x")(unspec:DI [(match_operand:DI 1 "general_operand" "x")] 3346))]"CGEN_ENABLE_INSN_P (616)""cpextuu.b\\t%0,%1"[(set_attr "may_trap" "no")(set_attr "latency" "0")(set_attr "length" "4")(set_attr "slot" "cop")(set_attr "slots" "c3")(set_attr "stall" "none")])(define_insn "cgen_intrinsic_cpextuu_b_P0S_P1"[(set (match_operand:DI 0 "nonimmediate_operand" "=x")(unspec:DI [(match_operand:DI 1 "general_operand" "x")] 3346))]"CGEN_ENABLE_INSN_P (617)""cpextuu.b\\t%0,%1"[(set_attr "may_trap" "no")(set_attr "latency" "0")(set_attr "length" "4")(set_attr "slot" "cop")(set_attr "slots" "p0s_p1")(set_attr "stall" "none")])(define_insn "cgen_intrinsic_cpbcast_w_C3"[(set (match_operand:DI 0 "nonimmediate_operand" "=x")(unspec:DI [(match_operand:DI 1 "general_operand" "x")] 3348))]"CGEN_ENABLE_INSN_P (618)""cpbcast.w\\t%0,%1"[(set_attr "may_trap" "no")(set_attr "latency" "0")(set_attr "length" "4")(set_attr "slot" "cop")(set_attr "slots" "c3")(set_attr "stall" "none")])(define_insn "cgen_intrinsic_cpbcast_w_P0S_P1"[(set (match_operand:DI 0 "nonimmediate_operand" "=x")(unspec:DI [(match_operand:DI 1 "general_operand" "x")] 3348))]"CGEN_ENABLE_INSN_P (619)""cpbcast.w\\t%0,%1"[(set_attr "may_trap" "no")(set_attr "latency" "0")(set_attr "length" "4")(set_attr "slot" "cop")(set_attr "slots" "p0s_p1")(set_attr "stall" "none")])(define_insn "cgen_intrinsic_cpbcast_h_C3"[(set (match_operand:DI 0 "nonimmediate_operand" "=x")(unspec:DI [(match_operand:DI 1 "general_operand" "x")] 3350))]"CGEN_ENABLE_INSN_P (620)""cpbcast.h\\t%0,%1"[(set_attr "may_trap" "no")(set_attr "latency" "0")(set_attr "length" "4")(set_attr "slot" "cop")(set_attr "slots" "c3")(set_attr "stall" "none")])(define_insn "cgen_intrinsic_cpbcast_h_P0S_P1"[(set (match_operand:DI 0 "nonimmediate_operand" "=x")(unspec:DI [(match_operand:DI 1 "general_operand" "x")] 3350))]"CGEN_ENABLE_INSN_P (621)""cpbcast.h\\t%0,%1"[(set_attr "may_trap" "no")(set_attr "latency" "0")(set_attr "length" "4")(set_attr "slot" "cop")(set_attr "slots" "p0s_p1")(set_attr "stall" "none")])(define_insn "cgen_intrinsic_cpbcast_b_C3"[(set (match_operand:DI 0 "nonimmediate_operand" "=x")(unspec:DI [(match_operand:DI 1 "general_operand" "x")] 3352))]"CGEN_ENABLE_INSN_P (622)""cpbcast.b\\t%0,%1"[(set_attr "may_trap" "no")(set_attr "latency" "0")(set_attr "length" "4")(set_attr "slot" "cop")(set_attr "slots" "c3")(set_attr "stall" "none")])(define_insn "cgen_intrinsic_cpbcast_b_P0S_P1"[(set (match_operand:DI 0 "nonimmediate_operand" "=x")(unspec:DI [(match_operand:DI 1 "general_operand" "x")] 3352))]"CGEN_ENABLE_INSN_P (623)""cpbcast.b\\t%0,%1"[(set_attr "may_trap" "no")(set_attr "latency" "0")(set_attr "length" "4")(set_attr "slot" "cop")(set_attr "slots" "p0s_p1")(set_attr "stall" "none")])(define_insn "cgen_intrinsic_cpccadd_b_C3"[(set (match_operand:DI 0 "nonimmediate_operand" "=x")(unspec_volatile:DI [(match_operand:DI 1 "general_operand" "0")] 3354))]"CGEN_ENABLE_INSN_P (624)""cpccadd.b\\t%1"[(set_attr "may_trap" "no")(set_attr "latency" "0")(set_attr "length" "4")(set_attr "slot" "cop")(set_attr "slots" "c3")(set_attr "stall" "none")])(define_insn "cgen_intrinsic_cpccadd_b_P0S_P1"[(set (match_operand:DI 0 "nonimmediate_operand" "=x")(unspec_volatile:DI [(match_operand:DI 1 "general_operand" "0")] 3354))]"CGEN_ENABLE_INSN_P (625)""cpccadd.b\\t%1"[(set_attr "may_trap" "no")(set_attr "latency" "0")(set_attr "length" "4")(set_attr "slot" "cop")(set_attr "slots" "p0s_p1")(set_attr "stall" "none")])(define_insn "cgen_intrinsic_cphadd_w_C3"[(set (match_operand:DI 0 "nonimmediate_operand" "=x")(unspec:DI [(match_operand:DI 1 "general_operand" "x")] 3356))]"CGEN_ENABLE_INSN_P (626)""cphadd.w\\t%0,%1"[(set_attr "may_trap" "no")(set_attr "latency" "0")(set_attr "length" "4")(set_attr "slot" "cop")(set_attr "slots" "c3")(set_attr "stall" "none")])(define_insn "cgen_intrinsic_cphadd_w_P0S_P1"[(set (match_operand:DI 0 "nonimmediate_operand" "=x")(unspec:DI [(match_operand:DI 1 "general_operand" "x")] 3356))]"CGEN_ENABLE_INSN_P (627)""cphadd.w\\t%0,%1"[(set_attr "may_trap" "no")(set_attr "latency" "0")(set_attr "length" "4")(set_attr "slot" "cop")(set_attr "slots" "p0s_p1")(set_attr "stall" "none")])(define_insn "cgen_intrinsic_cphadd_h_C3"[(set (match_operand:DI 0 "nonimmediate_operand" "=x")(unspec:DI [(match_operand:DI 1 "general_operand" "x")] 3358))]"CGEN_ENABLE_INSN_P (628)""cphadd.h\\t%0,%1"[(set_attr "may_trap" "no")(set_attr "latency" "0")(set_attr "length" "4")(set_attr "slot" "cop")(set_attr "slots" "c3")(set_attr "stall" "none")])(define_insn "cgen_intrinsic_cphadd_h_P0S_P1"[(set (match_operand:DI 0 "nonimmediate_operand" "=x")(unspec:DI [(match_operand:DI 1 "general_operand" "x")] 3358))]"CGEN_ENABLE_INSN_P (629)""cphadd.h\\t%0,%1"[(set_attr "may_trap" "no")(set_attr "latency" "0")(set_attr "length" "4")(set_attr "slot" "cop")(set_attr "slots" "p0s_p1")(set_attr "stall" "none")])(define_insn "cgen_intrinsic_cphadd_b_C3"[(set (match_operand:DI 0 "nonimmediate_operand" "=x")(unspec:DI [(match_operand:DI 1 "general_operand" "x")] 3360))]"CGEN_ENABLE_INSN_P (630)""cphadd.b\\t%0,%1"[(set_attr "may_trap" "no")(set_attr "latency" "0")(set_attr "length" "4")(set_attr "slot" "cop")(set_attr "slots" "c3")(set_attr "stall" "none")])(define_insn "cgen_intrinsic_cphadd_b_P0S_P1"[(set (match_operand:DI 0 "nonimmediate_operand" "=x")(unspec:DI [(match_operand:DI 1 "general_operand" "x")] 3360))]"CGEN_ENABLE_INSN_P (631)""cphadd.b\\t%0,%1"[(set_attr "may_trap" "no")(set_attr "latency" "0")(set_attr "length" "4")(set_attr "slot" "cop")(set_attr "slots" "p0s_p1")(set_attr "stall" "none")])(define_insn "cgen_intrinsic_cphaddu_b_C3"[(set (match_operand:DI 0 "nonimmediate_operand" "=x")(unspec:DI [(match_operand:DI 1 "general_operand" "x")] 3362))]"CGEN_ENABLE_INSN_P (632)""cphaddu.b\\t%0,%1"[(set_attr "may_trap" "no")(set_attr "latency" "0")(set_attr "length" "4")(set_attr "slot" "cop")(set_attr "slots" "c3")(set_attr "stall" "none")])(define_insn "cgen_intrinsic_cphaddu_b_P0S_P1"[(set (match_operand:DI 0 "nonimmediate_operand" "=x")(unspec:DI [(match_operand:DI 1 "general_operand" "x")] 3362))]"CGEN_ENABLE_INSN_P (633)""cphaddu.b\\t%0,%1"[(set_attr "may_trap" "no")(set_attr "latency" "0")(set_attr "length" "4")(set_attr "slot" "cop")(set_attr "slots" "p0s_p1")(set_attr "stall" "none")])(define_insn "cgen_intrinsic_cpnorm_w_C3"[(set (match_operand:DI 0 "nonimmediate_operand" "=x")(unspec:DI [(match_operand:DI 1 "general_operand" "x")] 3364))]"CGEN_ENABLE_INSN_P (634)""cpnorm.w\\t%0,%1"[(set_attr "may_trap" "no")(set_attr "latency" "0")(set_attr "length" "4")(set_attr "slot" "cop")(set_attr "slots" "c3")(set_attr "stall" "none")])(define_insn "cgen_intrinsic_cpnorm_w_P0S_P1"[(set (match_operand:DI 0 "nonimmediate_operand" "=x")(unspec:DI [(match_operand:DI 1 "general_operand" "x")] 3364))]"CGEN_ENABLE_INSN_P (635)""cpnorm.w\\t%0,%1"[(set_attr "may_trap" "no")(set_attr "latency" "0")(set_attr "length" "4")(set_attr "slot" "cop")(set_attr "slots" "p0s_p1")(set_attr "stall" "none")])(define_insn "cgen_intrinsic_cpnorm_h_C3"[(set (match_operand:DI 0 "nonimmediate_operand" "=x")(unspec:DI [(match_operand:DI 1 "general_operand" "x")] 3366))]"CGEN_ENABLE_INSN_P (636)""cpnorm.h\\t%0,%1"[(set_attr "may_trap" "no")(set_attr "latency" "0")(set_attr "length" "4")(set_attr "slot" "cop")(set_attr "slots" "c3")(set_attr "stall" "none")])(define_insn "cgen_intrinsic_cpnorm_h_P0S_P1"[(set (match_operand:DI 0 "nonimmediate_operand" "=x")(unspec:DI [(match_operand:DI 1 "general_operand" "x")] 3366))]"CGEN_ENABLE_INSN_P (637)""cpnorm.h\\t%0,%1"[(set_attr "may_trap" "no")(set_attr "latency" "0")(set_attr "length" "4")(set_attr "slot" "cop")(set_attr "slots" "p0s_p1")(set_attr "stall" "none")])(define_insn "cgen_intrinsic_cpldz_w_C3"[(set (match_operand:DI 0 "nonimmediate_operand" "=x")(unspec:DI [(match_operand:DI 1 "general_operand" "x")] 3368))]"CGEN_ENABLE_INSN_P (638)""cpldz.w\\t%0,%1"[(set_attr "may_trap" "no")(set_attr "latency" "0")(set_attr "length" "4")(set_attr "slot" "cop")(set_attr "slots" "c3")(set_attr "stall" "none")])(define_insn "cgen_intrinsic_cpldz_w_P0S_P1"[(set (match_operand:DI 0 "nonimmediate_operand" "=x")(unspec:DI [(match_operand:DI 1 "general_operand" "x")] 3368))]"CGEN_ENABLE_INSN_P (639)""cpldz.w\\t%0,%1"[(set_attr "may_trap" "no")(set_attr "latency" "0")(set_attr "length" "4")(set_attr "slot" "cop")(set_attr "slots" "p0s_p1")(set_attr "stall" "none")])(define_insn "cgen_intrinsic_cpldz_h_C3"[(set (match_operand:DI 0 "nonimmediate_operand" "=x")(unspec:DI [(match_operand:DI 1 "general_operand" "x")] 3370))]"CGEN_ENABLE_INSN_P (640)""cpldz.h\\t%0,%1"[(set_attr "may_trap" "no")(set_attr "latency" "0")(set_attr "length" "4")(set_attr "slot" "cop")(set_attr "slots" "c3")(set_attr "stall" "none")])(define_insn "cgen_intrinsic_cpldz_h_P0S_P1"[(set (match_operand:DI 0 "nonimmediate_operand" "=x")(unspec:DI [(match_operand:DI 1 "general_operand" "x")] 3370))]"CGEN_ENABLE_INSN_P (641)""cpldz.h\\t%0,%1"[(set_attr "may_trap" "no")(set_attr "latency" "0")(set_attr "length" "4")(set_attr "slot" "cop")(set_attr "slots" "p0s_p1")(set_attr "stall" "none")])(define_insn "cgen_intrinsic_cpabsz_w_C3"[(set (match_operand:DI 0 "nonimmediate_operand" "=x")(unspec:DI [(match_operand:DI 1 "general_operand" "x")] 3372))]"CGEN_ENABLE_INSN_P (642)""cpabsz.w\\t%0,%1"[(set_attr "may_trap" "no")(set_attr "latency" "0")(set_attr "length" "4")(set_attr "slot" "cop")(set_attr "slots" "c3")(set_attr "stall" "none")])(define_insn "cgen_intrinsic_cpabsz_w_P0S_P1"[(set (match_operand:DI 0 "nonimmediate_operand" "=x")(unspec:DI [(match_operand:DI 1 "general_operand" "x")] 3372))]"CGEN_ENABLE_INSN_P (643)""cpabsz.w\\t%0,%1"[(set_attr "may_trap" "no")(set_attr "latency" "0")(set_attr "length" "4")(set_attr "slot" "cop")(set_attr "slots" "p0s_p1")(set_attr "stall" "none")])(define_insn "cgen_intrinsic_cpabsz_h_C3"[(set (match_operand:DI 0 "nonimmediate_operand" "=x")(unspec:DI [(match_operand:DI 1 "general_operand" "x")] 3374))]"CGEN_ENABLE_INSN_P (644)""cpabsz.h\\t%0,%1"[(set_attr "may_trap" "no")(set_attr "latency" "0")(set_attr "length" "4")(set_attr "slot" "cop")(set_attr "slots" "c3")(set_attr "stall" "none")])(define_insn "cgen_intrinsic_cpabsz_h_P0S_P1"[(set (match_operand:DI 0 "nonimmediate_operand" "=x")(unspec:DI [(match_operand:DI 1 "general_operand" "x")] 3374))]"CGEN_ENABLE_INSN_P (645)""cpabsz.h\\t%0,%1"[(set_attr "may_trap" "no")(set_attr "latency" "0")(set_attr "length" "4")(set_attr "slot" "cop")(set_attr "slots" "p0s_p1")(set_attr "stall" "none")])(define_insn "cgen_intrinsic_cpabsz_b_C3"[(set (match_operand:DI 0 "nonimmediate_operand" "=x")(unspec:DI [(match_operand:DI 1 "general_operand" "x")] 3376))]"CGEN_ENABLE_INSN_P (646)""cpabsz.b\\t%0,%1"[(set_attr "may_trap" "no")(set_attr "latency" "0")(set_attr "length" "4")(set_attr "slot" "cop")(set_attr "slots" "c3")(set_attr "stall" "none")])(define_insn "cgen_intrinsic_cpabsz_b_P0S_P1"[(set (match_operand:DI 0 "nonimmediate_operand" "=x")(unspec:DI [(match_operand:DI 1 "general_operand" "x")] 3376))]"CGEN_ENABLE_INSN_P (647)""cpabsz.b\\t%0,%1"[(set_attr "may_trap" "no")(set_attr "latency" "0")(set_attr "length" "4")(set_attr "slot" "cop")(set_attr "slots" "p0s_p1")(set_attr "stall" "none")])(define_insn "cgen_intrinsic_cpmov_C3"[(set (match_operand:DI 0 "nonimmediate_operand" "=x")(unspec:DI [(match_operand:DI 1 "general_operand" "x")] 4172))]"CGEN_ENABLE_INSN_P (648)""cpmov\\t%0,%1"[(set_attr "may_trap" "no")(set_attr "latency" "0")(set_attr "length" "4")(set_attr "slot" "cop")(set_attr "slots" "c3")(set_attr "stall" "none")])(define_insn "cgen_intrinsic_cpmov_P0S_P1"[(set (match_operand:DI 0 "nonimmediate_operand" "=x")(unspec:DI [(match_operand:DI 1 "general_operand" "x")] 4172))]"CGEN_ENABLE_INSN_P (649)""cpmov\\t%0,%1"[(set_attr "may_trap" "no")(set_attr "latency" "0")(set_attr "length" "4")(set_attr "slot" "cop")(set_attr "slots" "p0s_p1")(set_attr "stall" "none")])(define_insn "cgen_intrinsic_cpfsftbs1_C3"[(set (match_operand:DI 0 "nonimmediate_operand" "=x")(unspec_volatile:DI [(match_operand:DI 1 "general_operand" "x")(match_operand:DI 2 "general_operand" "x")] 3524))]"CGEN_ENABLE_INSN_P (650)""cpfsftbs1\\t%0,%1,%2"[(set_attr "may_trap" "no")(set_attr "latency" "0")(set_attr "length" "4")(set_attr "slot" "cop")(set_attr "slots" "c3")(set_attr "stall" "none")])(define_insn "cgen_intrinsic_cpfsftbs1_P0S_P1"[(set (match_operand:DI 0 "nonimmediate_operand" "=x")(unspec_volatile:DI [(match_operand:DI 1 "general_operand" "x")(match_operand:DI 2 "general_operand" "x")] 3524))]"CGEN_ENABLE_INSN_P (651)""cpfsftbs1\\t%0,%1,%2"[(set_attr "may_trap" "no")(set_attr "latency" "0")(set_attr "length" "4")(set_attr "slot" "cop")(set_attr "slots" "p0s_p1")(set_attr "stall" "none")])(define_insn "cgen_intrinsic_cpfsftbs0_C3"[(set (match_operand:DI 0 "nonimmediate_operand" "=x")(unspec_volatile:DI [(match_operand:DI 1 "general_operand" "x")(match_operand:DI 2 "general_operand" "x")] 3526))]"CGEN_ENABLE_INSN_P (652)""cpfsftbs0\\t%0,%1,%2"[(set_attr "may_trap" "no")(set_attr "latency" "0")(set_attr "length" "4")(set_attr "slot" "cop")(set_attr "slots" "c3")(set_attr "stall" "none")])(define_insn "cgen_intrinsic_cpfsftbs0_P0S_P1"[(set (match_operand:DI 0 "nonimmediate_operand" "=x")(unspec_volatile:DI [(match_operand:DI 1 "general_operand" "x")(match_operand:DI 2 "general_operand" "x")] 3526))]"CGEN_ENABLE_INSN_P (653)""cpfsftbs0\\t%0,%1,%2"[(set_attr "may_trap" "no")(set_attr "latency" "0")(set_attr "length" "4")(set_attr "slot" "cop")(set_attr "slots" "p0s_p1")(set_attr "stall" "none")])(define_insn "cgen_intrinsic_cpsel_C3"[(set (match_operand:DI 0 "nonimmediate_operand" "=x")(unspec_volatile:DI [(match_operand:DI 1 "general_operand" "x")(match_operand:DI 2 "general_operand" "x")] 3530))]"CGEN_ENABLE_INSN_P (654)""cpsel\\t%0,%1,%2"[(set_attr "may_trap" "no")(set_attr "latency" "0")(set_attr "length" "4")(set_attr "slot" "cop")(set_attr "slots" "c3")(set_attr "stall" "none")])(define_insn "cgen_intrinsic_cpsel_P0S_P1"[(set (match_operand:DI 0 "nonimmediate_operand" "=x")(unspec_volatile:DI [(match_operand:DI 1 "general_operand" "x")(match_operand:DI 2 "general_operand" "x")] 3530))]"CGEN_ENABLE_INSN_P (655)""cpsel\\t%0,%1,%2"[(set_attr "may_trap" "no")(set_attr "latency" "0")(set_attr "length" "4")(set_attr "slot" "cop")(set_attr "slots" "p0s_p1")(set_attr "stall" "none")])(define_insn "cgen_intrinsic_cpunpackl_w_C3"[(set (match_operand:DI 0 "nonimmediate_operand" "=x")(unspec:DI [(match_operand:DI 1 "general_operand" "x")(match_operand:DI 2 "general_operand" "x")] 3512))]"CGEN_ENABLE_INSN_P (656)""cpunpackl.w\\t%0,%1,%2"[(set_attr "may_trap" "no")(set_attr "latency" "0")(set_attr "length" "4")(set_attr "slot" "cop")(set_attr "slots" "c3")(set_attr "stall" "none")])(define_insn "cgen_intrinsic_cpunpackl_w_P0S_P1"[(set (match_operand:DI 0 "nonimmediate_operand" "=x")(unspec:DI [(match_operand:DI 1 "general_operand" "x")(match_operand:DI 2 "general_operand" "x")] 3512))]"CGEN_ENABLE_INSN_P (657)""cpunpackl.w\\t%0,%1,%2"[(set_attr "may_trap" "no")(set_attr "latency" "0")(set_attr "length" "4")(set_attr "slot" "cop")(set_attr "slots" "p0s_p1")(set_attr "stall" "none")])(define_insn "cgen_intrinsic_cpunpackl_h_C3"[(set (match_operand:DI 0 "nonimmediate_operand" "=x")(unspec:DI [(match_operand:DI 1 "general_operand" "x")(match_operand:DI 2 "general_operand" "x")] 3514))]"CGEN_ENABLE_INSN_P (658)""cpunpackl.h\\t%0,%1,%2"[(set_attr "may_trap" "no")(set_attr "latency" "0")(set_attr "length" "4")(set_attr "slot" "cop")(set_attr "slots" "c3")(set_attr "stall" "none")])(define_insn "cgen_intrinsic_cpunpackl_h_P0S_P1"[(set (match_operand:DI 0 "nonimmediate_operand" "=x")(unspec:DI [(match_operand:DI 1 "general_operand" "x")(match_operand:DI 2 "general_operand" "x")] 3514))]"CGEN_ENABLE_INSN_P (659)""cpunpackl.h\\t%0,%1,%2"[(set_attr "may_trap" "no")(set_attr "latency" "0")(set_attr "length" "4")(set_attr "slot" "cop")(set_attr "slots" "p0s_p1")(set_attr "stall" "none")])(define_insn "cgen_intrinsic_cpunpackl_b_C3"[(set (match_operand:DI 0 "nonimmediate_operand" "=x")(unspec:DI [(match_operand:DI 1 "general_operand" "x")(match_operand:DI 2 "general_operand" "x")] 3516))]"CGEN_ENABLE_INSN_P (660)""cpunpackl.b\\t%0,%1,%2"[(set_attr "may_trap" "no")(set_attr "latency" "0")(set_attr "length" "4")(set_attr "slot" "cop")(set_attr "slots" "c3")(set_attr "stall" "none")])(define_insn "cgen_intrinsic_cpunpackl_b_P0S_P1"[(set (match_operand:DI 0 "nonimmediate_operand" "=x")(unspec:DI [(match_operand:DI 1 "general_operand" "x")(match_operand:DI 2 "general_operand" "x")] 3516))]"CGEN_ENABLE_INSN_P (661)""cpunpackl.b\\t%0,%1,%2"[(set_attr "may_trap" "no")(set_attr "latency" "0")(set_attr "length" "4")(set_attr "slot" "cop")(set_attr "slots" "p0s_p1")(set_attr "stall" "none")])(define_insn "cgen_intrinsic_cpunpacku_w_C3"[(set (match_operand:DI 0 "nonimmediate_operand" "=x")(unspec:DI [(match_operand:DI 1 "general_operand" "x")(match_operand:DI 2 "general_operand" "x")] 3518))]"CGEN_ENABLE_INSN_P (662)""cpunpacku.w\\t%0,%1,%2"[(set_attr "may_trap" "no")(set_attr "latency" "0")(set_attr "length" "4")(set_attr "slot" "cop")(set_attr "slots" "c3")(set_attr "stall" "none")])(define_insn "cgen_intrinsic_cpunpacku_w_P0S_P1"[(set (match_operand:DI 0 "nonimmediate_operand" "=x")(unspec:DI [(match_operand:DI 1 "general_operand" "x")(match_operand:DI 2 "general_operand" "x")] 3518))]"CGEN_ENABLE_INSN_P (663)""cpunpacku.w\\t%0,%1,%2"[(set_attr "may_trap" "no")(set_attr "latency" "0")(set_attr "length" "4")(set_attr "slot" "cop")(set_attr "slots" "p0s_p1")(set_attr "stall" "none")])(define_insn "cgen_intrinsic_cpunpacku_h_C3"[(set (match_operand:DI 0 "nonimmediate_operand" "=x")(unspec:DI [(match_operand:DI 1 "general_operand" "x")(match_operand:DI 2 "general_operand" "x")] 3520))]"CGEN_ENABLE_INSN_P (664)""cpunpacku.h\\t%0,%1,%2"[(set_attr "may_trap" "no")(set_attr "latency" "0")(set_attr "length" "4")(set_attr "slot" "cop")(set_attr "slots" "c3")(set_attr "stall" "none")])(define_insn "cgen_intrinsic_cpunpacku_h_P0S_P1"[(set (match_operand:DI 0 "nonimmediate_operand" "=x")(unspec:DI [(match_operand:DI 1 "general_operand" "x")(match_operand:DI 2 "general_operand" "x")] 3520))]"CGEN_ENABLE_INSN_P (665)""cpunpacku.h\\t%0,%1,%2"[(set_attr "may_trap" "no")(set_attr "latency" "0")(set_attr "length" "4")(set_attr "slot" "cop")(set_attr "slots" "p0s_p1")(set_attr "stall" "none")])(define_insn "cgen_intrinsic_cpunpacku_b_C3"[(set (match_operand:DI 0 "nonimmediate_operand" "=x")(unspec:DI [(match_operand:DI 1 "general_operand" "x")(match_operand:DI 2 "general_operand" "x")] 3522))]"CGEN_ENABLE_INSN_P (666)""cpunpacku.b\\t%0,%1,%2"[(set_attr "may_trap" "no")(set_attr "latency" "0")(set_attr "length" "4")(set_attr "slot" "cop")(set_attr "slots" "c3")(set_attr "stall" "none")])(define_insn "cgen_intrinsic_cpunpacku_b_P0S_P1"[(set (match_operand:DI 0 "nonimmediate_operand" "=x")(unspec:DI [(match_operand:DI 1 "general_operand" "x")(match_operand:DI 2 "general_operand" "x")] 3522))]"CGEN_ENABLE_INSN_P (667)""cpunpacku.b\\t%0,%1,%2"[(set_attr "may_trap" "no")(set_attr "latency" "0")(set_attr "length" "4")(set_attr "slot" "cop")(set_attr "slots" "p0s_p1")(set_attr "stall" "none")])(define_insn "cgen_intrinsic_cpadd3_w_C3"[(set (match_operand:DI 0 "nonimmediate_operand" "=x")(unspec:DI [(match_operand:DI 1 "general_operand" "x")(match_operand:DI 2 "general_operand" "x")] 3550))]"CGEN_ENABLE_INSN_P (668)""cpadd3.w\\t%0,%1,%2"[(set_attr "may_trap" "no")(set_attr "latency" "0")(set_attr "length" "4")(set_attr "slot" "cop")(set_attr "slots" "c3")(set_attr "stall" "none")])(define_insn "cgen_intrinsic_cpadd3_w_P0S_P1"[(set (match_operand:DI 0 "nonimmediate_operand" "=x")(unspec:DI [(match_operand:DI 1 "general_operand" "x")(match_operand:DI 2 "general_operand" "x")] 3550))]"CGEN_ENABLE_INSN_P (669)""cpadd3.w\\t%0,%1,%2"[(set_attr "may_trap" "no")(set_attr "latency" "0")(set_attr "length" "4")(set_attr "slot" "cop")(set_attr "slots" "p0s_p1")(set_attr "stall" "none")])(define_insn "cgen_intrinsic_cpadd3_h_C3"[(set (match_operand:DI 0 "nonimmediate_operand" "=x")(unspec:DI [(match_operand:DI 1 "general_operand" "x")(match_operand:DI 2 "general_operand" "x")] 3552))]"CGEN_ENABLE_INSN_P (670)""cpadd3.h\\t%0,%1,%2"[(set_attr "may_trap" "no")(set_attr "latency" "0")(set_attr "length" "4")(set_attr "slot" "cop")(set_attr "slots" "c3")(set_attr "stall" "none")])(define_insn "cgen_intrinsic_cpadd3_h_P0S_P1"[(set (match_operand:DI 0 "nonimmediate_operand" "=x")(unspec:DI [(match_operand:DI 1 "general_operand" "x")(match_operand:DI 2 "general_operand" "x")] 3552))]"CGEN_ENABLE_INSN_P (671)""cpadd3.h\\t%0,%1,%2"[(set_attr "may_trap" "no")(set_attr "latency" "0")(set_attr "length" "4")(set_attr "slot" "cop")(set_attr "slots" "p0s_p1")(set_attr "stall" "none")])(define_insn "cgen_intrinsic_cpadd3_b_C3"[(set (match_operand:DI 0 "nonimmediate_operand" "=x")(unspec:DI [(match_operand:DI 1 "general_operand" "x")(match_operand:DI 2 "general_operand" "x")] 3554))]"CGEN_ENABLE_INSN_P (672)""cpadd3.b\\t%0,%1,%2"[(set_attr "may_trap" "no")(set_attr "latency" "0")(set_attr "length" "4")(set_attr "slot" "cop")(set_attr "slots" "c3")(set_attr "stall" "none")])(define_insn "cgen_intrinsic_cpadd3_b_P0S_P1"[(set (match_operand:DI 0 "nonimmediate_operand" "=x")(unspec:DI [(match_operand:DI 1 "general_operand" "x")(match_operand:DI 2 "general_operand" "x")] 3554))]"CGEN_ENABLE_INSN_P (673)""cpadd3.b\\t%0,%1,%2"[(set_attr "may_trap" "no")(set_attr "latency" "0")(set_attr "length" "4")(set_attr "slot" "cop")(set_attr "slots" "p0s_p1")(set_attr "stall" "none")])(define_insn "cgen_intrinsic_c0nop_P0_P0S"[(unspec_volatile [(const_int 0)] 2196)]"CGEN_ENABLE_INSN_P (674)""c0nop"[(set_attr "may_trap" "no")(set_attr "latency" "0")(set_attr "length" "4")(set_attr "slot" "cop")(set_attr "slots" "p0_p0s")(set_attr "stall" "none")])(define_insn "cgen_intrinsic_cpmoviu_h_C3"[(set (match_operand:DI 0 "nonimmediate_operand" "=x")(unspec:DI [(match_operand:DI 1 "cgen_h_uint_8a1_immediate" "")] 3178))]"CGEN_ENABLE_INSN_P (675)""cpmoviu.h\\t%0,%1"[(set_attr "may_trap" "no")(set_attr "latency" "0")(set_attr "length" "4")(set_attr "slot" "cop")(set_attr "slots" "c3")(set_attr "stall" "none")])(define_insn "cgen_intrinsic_cmovh_rn_crm"[(set (match_operand:SI 0 "nonimmediate_operand" "=r")(unspec:SI [(match_operand:DI 1 "general_operand" "x")] 4156))]"CGEN_ENABLE_INSN_P (676)""cmovh\\t%0,%1"[(set_attr "may_trap" "no")(set_attr "latency" "0")(set_attr "length" "4")(set_attr "slot" "cop")(set_attr "slots" "c3")(set_attr "stall" "none")])(define_insn "cgen_intrinsic_cmovh_rn_crm_p0"[(set (match_operand:SI 0 "nonimmediate_operand" "=r")(unspec:SI [(match_operand:DI 1 "general_operand" "x")] 4156))]"CGEN_ENABLE_INSN_P (677)""cmovh\\t%0,%1"[(set_attr "may_trap" "no")(set_attr "latency" "0")(set_attr "length" "4")(set_attr "slot" "cop")(set_attr "slots" "p0")(set_attr "stall" "none")])(define_insn "cgen_intrinsic_cmovh_crn_rm"[(set (match_operand:DI 0 "nonimmediate_operand" "=x")(unspec:DI [(match_operand:DI 1 "general_operand" "0")(match_operand:SI 2 "general_operand" "r")] 4158))]"CGEN_ENABLE_INSN_P (678)""cmovh\\t%1,%2"[(set_attr "may_trap" "no")(set_attr "latency" "0")(set_attr "length" "4")(set_attr "slot" "cop")(set_attr "slots" "c3")(set_attr "stall" "none")])(define_insn "cgen_intrinsic_cmovh_crn_rm_p0"[(set (match_operand:DI 0 "nonimmediate_operand" "=x")(unspec:DI [(match_operand:DI 1 "general_operand" "0")(match_operand:SI 2 "general_operand" "r")] 4158))]"CGEN_ENABLE_INSN_P (679)""cmovh\\t%1,%2"[(set_attr "may_trap" "no")(set_attr "latency" "0")(set_attr "length" "4")(set_attr "slot" "cop")(set_attr "slots" "p0")(set_attr "stall" "none")])(define_insn "cgen_intrinsic_cmovc_rn_ccrm"[(set (match_operand:SI 0 "nonimmediate_operand" "=r")(unspec_volatile:SI [(match_operand:SI 1 "general_operand" "y")] 4160))]"CGEN_ENABLE_INSN_P (680)""cmovc\\t%0,%1"[(set_attr "may_trap" "no")(set_attr "latency" "0")(set_attr "length" "4")(set_attr "slot" "cop")(set_attr "slots" "c3")(set_attr "stall" "none")])(define_insn "cgen_intrinsic_cmovc_rn_ccrm_p0"[(set (match_operand:SI 0 "nonimmediate_operand" "=r")(unspec_volatile:SI [(match_operand:SI 1 "general_operand" "y")] 4160))]"CGEN_ENABLE_INSN_P (681)""cmovc\\t%0,%1"[(set_attr "may_trap" "no")(set_attr "latency" "0")(set_attr "length" "4")(set_attr "slot" "cop")(set_attr "slots" "p0")(set_attr "stall" "none")])(define_insn "cgen_intrinsic_cmovc_ccrn_rm"[(set (match_operand:SI 0 "nonimmediate_operand" "=y")(unspec_volatile:SI [(match_operand:SI 1 "general_operand" "r")] 4162))]"CGEN_ENABLE_INSN_P (682)""cmovc\\t%0,%1"[(set_attr "may_trap" "no")(set_attr "latency" "0")(set_attr "length" "4")(set_attr "slot" "cop")(set_attr "slots" "c3")(set_attr "stall" "none")])(define_insn "cgen_intrinsic_cmovc_ccrn_rm_p0"[(set (match_operand:SI 0 "nonimmediate_operand" "=y")(unspec_volatile:SI [(match_operand:SI 1 "general_operand" "r")] 4162))]"CGEN_ENABLE_INSN_P (683)""cmovc\\t%0,%1"[(set_attr "may_trap" "no")(set_attr "latency" "0")(set_attr "length" "4")(set_attr "slot" "cop")(set_attr "slots" "p0")(set_attr "stall" "none")])(define_insn "cgen_intrinsic_cmov_rn_crm"[(set (match_operand:SI 0 "nonimmediate_operand" "=r")(unspec:SI [(match_operand:DI 1 "general_operand" "x")] 4164))]"CGEN_ENABLE_INSN_P (684)""cmov\\t%0,%1"[(set_attr "may_trap" "no")(set_attr "latency" "0")(set_attr "length" "4")(set_attr "slot" "cop")(set_attr "slots" "c3")(set_attr "stall" "none")])(define_insn "cgen_intrinsic_cmov_rn_crm_p0"[(set (match_operand:SI 0 "nonimmediate_operand" "=r")(unspec:SI [(match_operand:DI 1 "general_operand" "x")] 4164))]"CGEN_ENABLE_INSN_P (685)""cmov\\t%0,%1"[(set_attr "may_trap" "no")(set_attr "latency" "0")(set_attr "length" "4")(set_attr "slot" "cop")(set_attr "slots" "p0")(set_attr "stall" "none")])(define_insn "cgen_intrinsic_cmov_crn_rm"[(set (match_operand:DI 0 "nonimmediate_operand" "=x")(unspec:DI [(match_operand:DI 1 "general_operand" "0")(match_operand:SI 2 "general_operand" "r")] 4166))]"CGEN_ENABLE_INSN_P (686)""cmov\\t%1,%2"[(set_attr "may_trap" "no")(set_attr "latency" "0")(set_attr "length" "4")(set_attr "slot" "cop")(set_attr "slots" "c3")(set_attr "stall" "none")])(define_insn "cgen_intrinsic_cmov_crn_rm_p0"[(set (match_operand:DI 0 "nonimmediate_operand" "=x")(unspec:DI [(match_operand:SI 1 "general_operand" "r")] 4166))]"CGEN_ENABLE_INSN_P (687)""cmov\\t%0,%1"[(set_attr "may_trap" "no")(set_attr "latency" "0")(set_attr "length" "4")(set_attr "slot" "cop")(set_attr "slots" "p0")(set_attr "stall" "none")])(define_insn "cgen_intrinsic_bsrv"[(set (pc)(if_then_else (eq (unspec [(match_operand:SI 0 "immediate_operand" "")(reg:SI 32)(reg:SI 42)] 3556)(const_int 0))(match_dup 0)(pc)))(set (reg:SI 17)(unspec:SI [(match_dup 0)(reg:SI 32)(reg:SI 42)] 3558))(set (reg:SI 114)(unspec:SI [(match_dup 0)(reg:SI 32)(reg:SI 42)] 3559))]"CGEN_ENABLE_INSN_P (688)""bsrv\\t%l0"[(set_attr "may_trap" "no")(set_attr "latency" "0")(set_attr "length" "4")(set_attr "slot" "core")(set_attr "slots" "core")(set_attr "stall" "none")])(define_insn "cgen_intrinsic_jsrv"[(set (pc)(unspec:SI [(match_operand:SI 0 "general_operand" "r")(reg:SI 32)(reg:SI 42)] 3560))(set (reg:SI 17)(unspec:SI [(match_dup 0)(reg:SI 32)(reg:SI 42)] 3562))(set (reg:SI 114)(unspec:SI [(match_dup 0)(reg:SI 32)(reg:SI 42)] 3563))]"CGEN_ENABLE_INSN_P (689)""jsrv\\t%0"[(set_attr "may_trap" "no")(set_attr "latency" "0")(set_attr "length" "2")(set_attr "slot" "core")(set_attr "slots" "core")(set_attr "stall" "none")])(define_insn "cgen_intrinsic_synccp"[(unspec_volatile [(const_int 0)] 3564)]"CGEN_ENABLE_INSN_P (690)""synccp"[(set_attr "may_trap" "no")(set_attr "latency" "0")(set_attr "length" "2")(set_attr "slot" "core")(set_attr "slots" "core")(set_attr "stall" "none")])(define_insn "cgen_intrinsic_bcpaf"[(set (pc)(if_then_else (eq (unspec [(match_operand:SI 0 "cgen_h_uint_4a1_immediate" "")(match_operand:SI 1 "immediate_operand" "")(reg:SI 32)(reg:SI 42)(reg:SI 81)] 3566)(const_int 0))(match_dup 1)(pc)))]"CGEN_ENABLE_INSN_P (691)""bcpaf\\t%0,%l1"[(set_attr "may_trap" "no")(set_attr "latency" "0")(set_attr "length" "4")(set_attr "slot" "core")(set_attr "slots" "core")(set_attr "stall" "none")])(define_insn "cgen_intrinsic_bcpat"[(set (pc)(if_then_else (eq (unspec [(match_operand:SI 0 "cgen_h_uint_4a1_immediate" "")(match_operand:SI 1 "immediate_operand" "")(reg:SI 32)(reg:SI 42)(reg:SI 81)] 3568)(const_int 0))(match_dup 1)(pc)))]"CGEN_ENABLE_INSN_P (692)""bcpat\\t%0,%l1"[(set_attr "may_trap" "no")(set_attr "latency" "0")(set_attr "length" "4")(set_attr "slot" "core")(set_attr "slots" "core")(set_attr "stall" "none")])(define_insn "cgen_intrinsic_bcpne"[(set (pc)(if_then_else (eq (unspec [(match_operand:SI 0 "cgen_h_uint_4a1_immediate" "")(match_operand:SI 1 "immediate_operand" "")(reg:SI 32)(reg:SI 42)(reg:SI 81)] 3570)(const_int 0))(match_dup 1)(pc)))]"CGEN_ENABLE_INSN_P (693)""bcpne\\t%0,%l1"[(set_attr "may_trap" "no")(set_attr "latency" "0")(set_attr "length" "4")(set_attr "slot" "core")(set_attr "slots" "core")(set_attr "stall" "none")])(define_insn "cgen_intrinsic_bcpeq"[(set (pc)(if_then_else (eq (unspec [(match_operand:SI 0 "cgen_h_uint_4a1_immediate" "")(match_operand:SI 1 "immediate_operand" "")(reg:SI 32)(reg:SI 42)(reg:SI 81)] 3572)(const_int 0))(match_dup 1)(pc)))]"CGEN_ENABLE_INSN_P (694)""bcpeq\\t%0,%l1"[(set_attr "may_trap" "no")(set_attr "latency" "0")(set_attr "length" "4")(set_attr "slot" "core")(set_attr "slots" "core")(set_attr "stall" "none")])(define_insn "cgen_intrinsic_lmcpm1"[(set (match_operand:DI 0 "nonimmediate_operand" "=em")(unspec:DI [(match_operand:SI 2 "general_operand" "1")(match_operand:DI 3 "cgen_h_sint_10a1_immediate" "")(reg:SI 31)(reg:SI 30)] 3574))(set (match_operand:SI 1 "nonimmediate_operand" "=r")(unspec:SI [(match_dup 2)(match_dup 3)(reg:SI 31)(reg:SI 30)] 3576))]"CGEN_ENABLE_INSN_P (695)""lmcpm1\\t%0,(%2+),%3"[(set_attr "may_trap" "no")(set_attr "latency" "0")(set_attr "length" "4")(set_attr "slot" "core")(set_attr "slots" "core")(set_attr "stall" "none")])(define_insn "cgen_intrinsic_smcpm1"[(set (match_operand:SI 0 "nonimmediate_operand" "=r")(unspec:SI [(match_operand:DI 1 "general_operand" "em")(match_operand:SI 2 "general_operand" "0")(match_operand:SI 3 "cgen_h_sint_10a1_immediate" "")(reg:SI 31)(reg:SI 30)] 3578))]"CGEN_ENABLE_INSN_P (696)""smcpm1\\t%1,(%2+),%3"[(set_attr "may_trap" "no")(set_attr "latency" "0")(set_attr "length" "4")(set_attr "slot" "core")(set_attr "slots" "core")(set_attr "stall" "none")])(define_insn "cgen_intrinsic_lwcpm1"[(set (match_operand:SI 0 "nonimmediate_operand" "=em")(unspec:SI [(match_operand:SI 2 "general_operand" "1")(match_operand:SI 3 "cgen_h_sint_10a1_immediate" "")(reg:SI 31)(reg:SI 30)(mem:SI (scratch:SI))] 3580))(set (match_operand:SI 1 "nonimmediate_operand" "=r")(unspec:SI [(match_dup 2)(match_dup 3)(reg:SI 31)(reg:SI 30)(mem:SI (scratch:SI))] 3582))]"CGEN_ENABLE_INSN_P (697)""lwcpm1\\t%0,(%2+),%3"[(set_attr "may_trap" "no")(set_attr "latency" "0")(set_attr "length" "4")(set_attr "slot" "core")(set_attr "slots" "core")(set_attr "stall" "none")])(define_insn "cgen_intrinsic_swcpm1"[(set (match_operand:SI 0 "nonimmediate_operand" "=r")(unspec:SI [(match_operand:SI 1 "general_operand" "em")(match_operand:SI 2 "general_operand" "0")(match_operand:SI 3 "cgen_h_sint_10a1_immediate" "")(reg:SI 31)(reg:SI 30)] 3584))(set (mem:SI (scratch:SI))(unspec:SI [(match_dup 1)(match_dup 2)(match_dup 3)(reg:SI 31)(reg:SI 30)] 3586))]"CGEN_ENABLE_INSN_P (698)""swcpm1\\t%1,(%2+),%3"[(set_attr "may_trap" "no")(set_attr "latency" "0")(set_attr "length" "4")(set_attr "slot" "core")(set_attr "slots" "core")(set_attr "stall" "none")])(define_insn "cgen_intrinsic_lhcpm1"[(set (match_operand:SI 0 "nonimmediate_operand" "=em")(unspec:SI [(match_operand:SI 2 "general_operand" "1")(match_operand:SI 3 "cgen_h_sint_10a1_immediate" "")(reg:SI 31)(reg:SI 30)(mem:SI (scratch:SI))] 3588))(set (match_operand:SI 1 "nonimmediate_operand" "=r")(unspec:SI [(match_dup 2)(match_dup 3)(reg:SI 31)(reg:SI 30)(mem:SI (scratch:SI))] 3590))]"CGEN_ENABLE_INSN_P (699)""lhcpm1\\t%0,(%2+),%3"[(set_attr "may_trap" "no")(set_attr "latency" "0")(set_attr "length" "4")(set_attr "slot" "core")(set_attr "slots" "core")(set_attr "stall" "none")])(define_insn "cgen_intrinsic_shcpm1"[(set (match_operand:SI 0 "nonimmediate_operand" "=r")(unspec:SI [(match_operand:SI 1 "general_operand" "em")(match_operand:SI 2 "general_operand" "0")(match_operand:SI 3 "cgen_h_sint_10a1_immediate" "")(reg:SI 31)(reg:SI 30)] 3592))(set (mem:SI (scratch:SI))(unspec:SI [(match_dup 1)(match_dup 2)(match_dup 3)(reg:SI 31)(reg:SI 30)] 3594))]"CGEN_ENABLE_INSN_P (700)""shcpm1\\t%1,(%2+),%3"[(set_attr "may_trap" "no")(set_attr "latency" "0")(set_attr "length" "4")(set_attr "slot" "core")(set_attr "slots" "core")(set_attr "stall" "none")])(define_insn "cgen_intrinsic_lbcpm1"[(set (match_operand:SI 0 "nonimmediate_operand" "=em")(unspec:SI [(match_operand:SI 2 "general_operand" "1")(match_operand:SI 3 "cgen_h_sint_10a1_immediate" "")(reg:SI 31)(reg:SI 30)(mem:SI (scratch:SI))] 3596))(set (match_operand:SI 1 "nonimmediate_operand" "=r")(unspec:SI [(match_dup 2)(match_dup 3)(reg:SI 31)(reg:SI 30)(mem:SI (scratch:SI))] 3598))]"CGEN_ENABLE_INSN_P (701)""lbcpm1\\t%0,(%2+),%3"[(set_attr "may_trap" "no")(set_attr "latency" "0")(set_attr "length" "4")(set_attr "slot" "core")(set_attr "slots" "core")(set_attr "stall" "none")])(define_insn "cgen_intrinsic_sbcpm1"[(set (match_operand:SI 0 "nonimmediate_operand" "=r")(unspec:SI [(match_operand:SI 1 "general_operand" "em")(match_operand:SI 2 "general_operand" "0")(match_operand:SI 3 "cgen_h_sint_10a1_immediate" "")(reg:SI 31)(reg:SI 30)] 3600))(set (mem:SI (scratch:SI))(unspec:SI [(match_dup 1)(match_dup 2)(match_dup 3)(reg:SI 31)(reg:SI 30)] 3602))]"CGEN_ENABLE_INSN_P (702)""sbcpm1\\t%1,(%2+),%3"[(set_attr "may_trap" "no")(set_attr "latency" "0")(set_attr "length" "4")(set_attr "slot" "core")(set_attr "slots" "core")(set_attr "stall" "none")])(define_insn "cgen_intrinsic_lmcpm0"[(set (match_operand:DI 0 "nonimmediate_operand" "=em")(unspec:DI [(match_operand:SI 2 "general_operand" "1")(match_operand:DI 3 "cgen_h_sint_10a1_immediate" "")(reg:SI 29)(reg:SI 28)] 3604))(set (match_operand:SI 1 "nonimmediate_operand" "=r")(unspec:SI [(match_dup 2)(match_dup 3)(reg:SI 29)(reg:SI 28)] 3606))]"CGEN_ENABLE_INSN_P (703)""lmcpm0\\t%0,(%2+),%3"[(set_attr "may_trap" "no")(set_attr "latency" "0")(set_attr "length" "4")(set_attr "slot" "core")(set_attr "slots" "core")(set_attr "stall" "none")])(define_insn "cgen_intrinsic_smcpm0"[(set (match_operand:SI 0 "nonimmediate_operand" "=r")(unspec:SI [(match_operand:DI 1 "general_operand" "em")(match_operand:SI 2 "general_operand" "0")(match_operand:SI 3 "cgen_h_sint_10a1_immediate" "")(reg:SI 29)(reg:SI 28)] 3608))]"CGEN_ENABLE_INSN_P (704)""smcpm0\\t%1,(%2+),%3"[(set_attr "may_trap" "no")(set_attr "latency" "0")(set_attr "length" "4")(set_attr "slot" "core")(set_attr "slots" "core")(set_attr "stall" "none")])(define_insn "cgen_intrinsic_lwcpm0"[(set (match_operand:SI 0 "nonimmediate_operand" "=em")(unspec:SI [(match_operand:SI 2 "general_operand" "1")(match_operand:SI 3 "cgen_h_sint_10a1_immediate" "")(reg:SI 29)(reg:SI 28)(mem:SI (scratch:SI))] 3610))(set (match_operand:SI 1 "nonimmediate_operand" "=r")(unspec:SI [(match_dup 2)(match_dup 3)(reg:SI 29)(reg:SI 28)(mem:SI (scratch:SI))] 3612))]"CGEN_ENABLE_INSN_P (705)""lwcpm0\\t%0,(%2+),%3"[(set_attr "may_trap" "no")(set_attr "latency" "0")(set_attr "length" "4")(set_attr "slot" "core")(set_attr "slots" "core")(set_attr "stall" "none")])(define_insn "cgen_intrinsic_swcpm0"[(set (match_operand:SI 0 "nonimmediate_operand" "=r")(unspec:SI [(match_operand:SI 1 "general_operand" "em")(match_operand:SI 2 "general_operand" "0")(match_operand:SI 3 "cgen_h_sint_10a1_immediate" "")(reg:SI 29)(reg:SI 28)] 3614))(set (mem:SI (scratch:SI))(unspec:SI [(match_dup 1)(match_dup 2)(match_dup 3)(reg:SI 29)(reg:SI 28)] 3616))]"CGEN_ENABLE_INSN_P (706)""swcpm0\\t%1,(%2+),%3"[(set_attr "may_trap" "no")(set_attr "latency" "0")(set_attr "length" "4")(set_attr "slot" "core")(set_attr "slots" "core")(set_attr "stall" "none")])(define_insn "cgen_intrinsic_lhcpm0"[(set (match_operand:SI 0 "nonimmediate_operand" "=em")(unspec:SI [(match_operand:SI 2 "general_operand" "1")(match_operand:SI 3 "cgen_h_sint_10a1_immediate" "")(reg:SI 29)(reg:SI 28)(mem:SI (scratch:SI))] 3618))(set (match_operand:SI 1 "nonimmediate_operand" "=r")(unspec:SI [(match_dup 2)(match_dup 3)(reg:SI 29)(reg:SI 28)(mem:SI (scratch:SI))] 3620))]"CGEN_ENABLE_INSN_P (707)""lhcpm0\\t%0,(%2+),%3"[(set_attr "may_trap" "no")(set_attr "latency" "0")(set_attr "length" "4")(set_attr "slot" "core")(set_attr "slots" "core")(set_attr "stall" "none")])(define_insn "cgen_intrinsic_shcpm0"[(set (match_operand:SI 0 "nonimmediate_operand" "=r")(unspec:SI [(match_operand:SI 1 "general_operand" "em")(match_operand:SI 2 "general_operand" "0")(match_operand:SI 3 "cgen_h_sint_10a1_immediate" "")(reg:SI 29)(reg:SI 28)] 3622))(set (mem:SI (scratch:SI))(unspec:SI [(match_dup 1)(match_dup 2)(match_dup 3)(reg:SI 29)(reg:SI 28)] 3624))]"CGEN_ENABLE_INSN_P (708)""shcpm0\\t%1,(%2+),%3"[(set_attr "may_trap" "no")(set_attr "latency" "0")(set_attr "length" "4")(set_attr "slot" "core")(set_attr "slots" "core")(set_attr "stall" "none")])(define_insn "cgen_intrinsic_lbcpm0"[(set (match_operand:SI 0 "nonimmediate_operand" "=em")(unspec:SI [(match_operand:SI 2 "general_operand" "1")(match_operand:SI 3 "cgen_h_sint_10a1_immediate" "")(reg:SI 29)(reg:SI 28)(mem:SI (scratch:SI))] 3626))(set (match_operand:SI 1 "nonimmediate_operand" "=r")(unspec:SI [(match_dup 2)(match_dup 3)(reg:SI 29)(reg:SI 28)(mem:SI (scratch:SI))] 3628))]"CGEN_ENABLE_INSN_P (709)""lbcpm0\\t%0,(%2+),%3"[(set_attr "may_trap" "no")(set_attr "latency" "0")(set_attr "length" "4")(set_attr "slot" "core")(set_attr "slots" "core")(set_attr "stall" "none")])(define_insn "cgen_intrinsic_sbcpm0"[(set (match_operand:SI 0 "nonimmediate_operand" "=r")(unspec:SI [(match_operand:SI 1 "general_operand" "em")(match_operand:SI 2 "general_operand" "0")(match_operand:SI 3 "cgen_h_sint_10a1_immediate" "")(reg:SI 29)(reg:SI 28)] 3630))(set (mem:SI (scratch:SI))(unspec:SI [(match_dup 1)(match_dup 2)(match_dup 3)(reg:SI 29)(reg:SI 28)] 3632))]"CGEN_ENABLE_INSN_P (710)""sbcpm0\\t%1,(%2+),%3"[(set_attr "may_trap" "no")(set_attr "latency" "0")(set_attr "length" "4")(set_attr "slot" "core")(set_attr "slots" "core")(set_attr "stall" "none")])(define_insn "cgen_intrinsic_lmcpa"[(set (match_operand:DI 0 "nonimmediate_operand" "=em")(unspec:DI [(match_operand:SI 2 "general_operand" "1")(match_operand:DI 3 "cgen_h_sint_10a1_immediate" "")] 3634))(set (match_operand:SI 1 "nonimmediate_operand" "=r")(unspec:SI [(match_dup 2)(match_dup 3)] 3636))]"CGEN_ENABLE_INSN_P (711)""lmcpa\\t%0,(%2+),%3"[(set_attr "may_trap" "no")(set_attr "latency" "0")(set_attr "length" "4")(set_attr "slot" "core")(set_attr "slots" "core")(set_attr "stall" "load")])(define_insn "cgen_intrinsic_smcpa"[(set (match_operand:SI 0 "nonimmediate_operand" "=r")(unspec:SI [(match_operand:DI 1 "general_operand" "em")(match_operand:SI 2 "general_operand" "0")(match_operand:SI 3 "cgen_h_sint_10a1_immediate" "")] 3638))]"CGEN_ENABLE_INSN_P (712)""smcpa\\t%1,(%2+),%3"[(set_attr "may_trap" "no")(set_attr "latency" "0")(set_attr "length" "4")(set_attr "slot" "core")(set_attr "slots" "core")(set_attr "stall" "store")])(define_insn "cgen_intrinsic_lwcpa"[(set (match_operand:SI 0 "nonimmediate_operand" "=em")(unspec:SI [(match_operand:SI 2 "general_operand" "1")(match_operand:SI 3 "cgen_h_sint_10a1_immediate" "")(mem:SI (scratch:SI))] 3640))(set (match_operand:SI 1 "nonimmediate_operand" "=r")(unspec:SI [(match_dup 2)(match_dup 3)(mem:SI (scratch:SI))] 3642))]"CGEN_ENABLE_INSN_P (713)""lwcpa\\t%0,(%2+),%3"[(set_attr "may_trap" "no")(set_attr "latency" "0")(set_attr "length" "4")(set_attr "slot" "core")(set_attr "slots" "core")(set_attr "stall" "load")])(define_insn "cgen_intrinsic_swcpa"[(set (match_operand:SI 0 "nonimmediate_operand" "=r")(unspec:SI [(match_operand:SI 1 "general_operand" "em")(match_operand:SI 2 "general_operand" "0")(match_operand:SI 3 "cgen_h_sint_10a1_immediate" "")] 3644))(set (mem:SI (scratch:SI))(unspec:SI [(match_dup 1)(match_dup 2)(match_dup 3)] 3646))]"CGEN_ENABLE_INSN_P (714)""swcpa\\t%1,(%2+),%3"[(set_attr "may_trap" "no")(set_attr "latency" "0")(set_attr "length" "4")(set_attr "slot" "core")(set_attr "slots" "core")(set_attr "stall" "store")])(define_insn "cgen_intrinsic_lhcpa"[(set (match_operand:SI 0 "nonimmediate_operand" "=em")(unspec:SI [(match_operand:SI 2 "general_operand" "1")(match_operand:SI 3 "cgen_h_sint_10a1_immediate" "")(mem:SI (scratch:SI))] 3648))(set (match_operand:SI 1 "nonimmediate_operand" "=r")(unspec:SI [(match_dup 2)(match_dup 3)(mem:SI (scratch:SI))] 3650))]"CGEN_ENABLE_INSN_P (715)""lhcpa\\t%0,(%2+),%3"[(set_attr "may_trap" "no")(set_attr "latency" "0")(set_attr "length" "4")(set_attr "slot" "core")(set_attr "slots" "core")(set_attr "stall" "load")])(define_insn "cgen_intrinsic_shcpa"[(set (match_operand:SI 0 "nonimmediate_operand" "=r")(unspec:SI [(match_operand:SI 1 "general_operand" "em")(match_operand:SI 2 "general_operand" "0")(match_operand:SI 3 "cgen_h_sint_10a1_immediate" "")] 3652))(set (mem:SI (scratch:SI))(unspec:SI [(match_dup 1)(match_dup 2)(match_dup 3)] 3654))]"CGEN_ENABLE_INSN_P (716)""shcpa\\t%1,(%2+),%3"[(set_attr "may_trap" "no")(set_attr "latency" "0")(set_attr "length" "4")(set_attr "slot" "core")(set_attr "slots" "core")(set_attr "stall" "store")])(define_insn "cgen_intrinsic_lbcpa"[(set (match_operand:SI 0 "nonimmediate_operand" "=em")(unspec:SI [(match_operand:SI 2 "general_operand" "1")(match_operand:SI 3 "cgen_h_sint_10a1_immediate" "")(mem:SI (scratch:SI))] 3656))(set (match_operand:SI 1 "nonimmediate_operand" "=r")(unspec:SI [(match_dup 2)(match_dup 3)(mem:SI (scratch:SI))] 3658))]"CGEN_ENABLE_INSN_P (717)""lbcpa\\t%0,(%2+),%3"[(set_attr "may_trap" "no")(set_attr "latency" "0")(set_attr "length" "4")(set_attr "slot" "core")(set_attr "slots" "core")(set_attr "stall" "load")])(define_insn "cgen_intrinsic_sbcpa"[(set (match_operand:SI 0 "nonimmediate_operand" "=r")(unspec:SI [(match_operand:SI 1 "general_operand" "em")(match_operand:SI 2 "general_operand" "0")(match_operand:SI 3 "cgen_h_sint_10a1_immediate" "")] 3660))(set (mem:SI (scratch:SI))(unspec:SI [(match_dup 1)(match_dup 2)(match_dup 3)] 3662))]"CGEN_ENABLE_INSN_P (718)""sbcpa\\t%1,(%2+),%3"[(set_attr "may_trap" "no")(set_attr "latency" "0")(set_attr "length" "4")(set_attr "slot" "core")(set_attr "slots" "core")(set_attr "stall" "store")])(define_insn "cgen_intrinsic_lmcp16"[(set (match_operand:DI 0 "nonimmediate_operand" "=em")(unspec:DI [(match_operand:DI 1 "cgen_h_sint_16a1_immediate" "")(match_operand:SI 2 "general_operand" "r")] 3664))]"CGEN_ENABLE_INSN_P (719)""lmcp\\t%0,%1(%2)"[(set_attr "may_trap" "no")(set_attr "latency" "0")(set_attr "length" "4")(set_attr "slot" "core")(set_attr "slots" "core")(set_attr "stall" "load")])(define_insn "cgen_intrinsic_smcp16"[(unspec_volatile [(match_operand:DI 0 "general_operand" "em")(match_operand:SI 1 "cgen_h_sint_16a1_immediate" "")(match_operand:SI 2 "general_operand" "r")] 3666)]"CGEN_ENABLE_INSN_P (720)""smcp\\t%0,%1(%2)"[(set_attr "may_trap" "no")(set_attr "latency" "0")(set_attr "length" "4")(set_attr "slot" "core")(set_attr "slots" "core")(set_attr "stall" "store")])(define_insn "cgen_intrinsic_lwcp16"[(set (match_operand:SI 0 "nonimmediate_operand" "=em")(unspec:SI [(match_operand:SI 1 "cgen_h_sint_16a1_immediate" "")(match_operand:SI 2 "general_operand" "r")(mem:SI (scratch:SI))] 3668))]"CGEN_ENABLE_INSN_P (721)""lwcp\\t%0,%1(%2)"[(set_attr "may_trap" "no")(set_attr "latency" "0")(set_attr "length" "4")(set_attr "slot" "core")(set_attr "slots" "core")(set_attr "stall" "load")])(define_insn "cgen_intrinsic_swcp16"[(set (mem:SI (scratch:SI))(unspec:SI [(match_operand:SI 0 "general_operand" "em")(match_operand:SI 1 "cgen_h_sint_16a1_immediate" "")(match_operand:SI 2 "general_operand" "r")] 3670))]"CGEN_ENABLE_INSN_P (722)""swcp\\t%0,%1(%2)"[(set_attr "may_trap" "no")(set_attr "latency" "0")(set_attr "length" "4")(set_attr "slot" "core")(set_attr "slots" "core")(set_attr "stall" "store")])(define_insn "cgen_intrinsic_lmcpi"[(set (match_operand:DI 0 "nonimmediate_operand" "=em")(unspec:DI [(match_operand:SI 2 "general_operand" "1")] 3672))(set (match_operand:SI 1 "nonimmediate_operand" "=r")(unspec:SI [(match_dup 2)] 3674))]"CGEN_ENABLE_INSN_P (723)""lmcpi\\t%0,(%2+)"[(set_attr "may_trap" "no")(set_attr "latency" "0")(set_attr "length" "2")(set_attr "slot" "core")(set_attr "slots" "core")(set_attr "stall" "load")])(define_insn "cgen_intrinsic_smcpi"[(set (match_operand:SI 0 "nonimmediate_operand" "=r")(unspec:SI [(match_operand:DI 1 "general_operand" "em")(match_operand:SI 2 "general_operand" "0")] 3676))]"CGEN_ENABLE_INSN_P (724)""smcpi\\t%1,(%2+)"[(set_attr "may_trap" "no")(set_attr "latency" "0")(set_attr "length" "2")(set_attr "slot" "core")(set_attr "slots" "core")(set_attr "stall" "store")])(define_insn "cgen_intrinsic_lwcpi"[(set (match_operand:SI 0 "nonimmediate_operand" "=em")(unspec:SI [(match_operand:SI 2 "general_operand" "1")(mem:SI (scratch:SI))] 3678))(set (match_operand:SI 1 "nonimmediate_operand" "=r")(unspec:SI [(match_dup 2)(mem:SI (scratch:SI))] 3680))]"CGEN_ENABLE_INSN_P (725)""lwcpi\\t%0,(%2+)"[(set_attr "may_trap" "no")(set_attr "latency" "0")(set_attr "length" "2")(set_attr "slot" "core")(set_attr "slots" "core")(set_attr "stall" "load")])(define_insn "cgen_intrinsic_swcpi"[(set (match_operand:SI 0 "nonimmediate_operand" "=r")(unspec:SI [(match_operand:SI 1 "general_operand" "em")(match_operand:SI 2 "general_operand" "0")] 3682))(set (mem:SI (scratch:SI))(unspec:SI [(match_dup 1)(match_dup 2)] 3684))]"CGEN_ENABLE_INSN_P (726)""swcpi\\t%1,(%2+)"[(set_attr "may_trap" "no")(set_attr "latency" "0")(set_attr "length" "2")(set_attr "slot" "core")(set_attr "slots" "core")(set_attr "stall" "store")])(define_insn "cgen_intrinsic_lmcp"[(set (match_operand:DI 0 "nonimmediate_operand" "=em")(unspec:DI [(match_operand:SI 1 "general_operand" "r")] 3686))]"CGEN_ENABLE_INSN_P (727)""lmcp\\t%0,(%1)"[(set_attr "may_trap" "no")(set_attr "latency" "0")(set_attr "length" "2")(set_attr "slot" "core")(set_attr "slots" "core")(set_attr "stall" "load")])(define_insn "cgen_intrinsic_smcp"[(unspec_volatile [(match_operand:DI 0 "general_operand" "em")(match_operand:SI 1 "general_operand" "r")] 3688)]"CGEN_ENABLE_INSN_P (728)""smcp\\t%0,(%1)"[(set_attr "may_trap" "no")(set_attr "latency" "0")(set_attr "length" "2")(set_attr "slot" "core")(set_attr "slots" "core")(set_attr "stall" "store")])(define_insn "cgen_intrinsic_lwcp"[(set (match_operand:SI 0 "nonimmediate_operand" "=em")(unspec:SI [(match_operand:SI 1 "general_operand" "r")(mem:SI (scratch:SI))] 3690))]"CGEN_ENABLE_INSN_P (729)""lwcp\\t%0,(%1)"[(set_attr "may_trap" "no")(set_attr "latency" "0")(set_attr "length" "2")(set_attr "slot" "core")(set_attr "slots" "core")(set_attr "stall" "load")])(define_insn "cgen_intrinsic_swcp"[(set (mem:SI (scratch:SI))(unspec:SI [(match_operand:SI 0 "general_operand" "em")(match_operand:SI 1 "general_operand" "r")] 3692))]"CGEN_ENABLE_INSN_P (730)""swcp\\t%0,(%1)"[(set_attr "may_trap" "no")(set_attr "latency" "0")(set_attr "length" "2")(set_attr "slot" "core")(set_attr "slots" "core")(set_attr "stall" "store")])(define_insn "cgen_intrinsic_ssubu"[(set (match_operand:SI 0 "nonimmediate_operand" "=r")(unspec:SI [(match_operand:SI 1 "general_operand" "0")(match_operand:SI 2 "general_operand" "r")] 3694))]"CGEN_ENABLE_INSN_P (731)""ssubu\\t%1,%2"[(set_attr "may_trap" "no")(set_attr "latency" "0")(set_attr "length" "4")(set_attr "slot" "core")(set_attr "slots" "core")(set_attr "stall" "int2")])(define_insn "cgen_intrinsic_saddu"[(set (match_operand:SI 0 "nonimmediate_operand" "=r")(unspec:SI [(match_operand:SI 1 "general_operand" "0")(match_operand:SI 2 "general_operand" "r")] 3696))]"CGEN_ENABLE_INSN_P (732)""saddu\\t%1,%2"[(set_attr "may_trap" "no")(set_attr "latency" "0")(set_attr "length" "4")(set_attr "slot" "core")(set_attr "slots" "core")(set_attr "stall" "int2")])(define_insn "cgen_intrinsic_ssub"[(set (match_operand:SI 0 "nonimmediate_operand" "=r")(unspec:SI [(match_operand:SI 1 "general_operand" "0")(match_operand:SI 2 "general_operand" "r")] 3698))]"CGEN_ENABLE_INSN_P (733)""ssub\\t%1,%2"[(set_attr "may_trap" "no")(set_attr "latency" "0")(set_attr "length" "4")(set_attr "slot" "core")(set_attr "slots" "core")(set_attr "stall" "int2")])(define_insn "cgen_intrinsic_sadd"[(set (match_operand:SI 0 "nonimmediate_operand" "=r")(unspec:SI [(match_operand:SI 1 "general_operand" "0")(match_operand:SI 2 "general_operand" "r")] 3700))]"CGEN_ENABLE_INSN_P (734)""sadd\\t%1,%2"[(set_attr "may_trap" "no")(set_attr "latency" "0")(set_attr "length" "4")(set_attr "slot" "core")(set_attr "slots" "core")(set_attr "stall" "int2")])(define_insn "cgen_intrinsic_clipu"[(set (match_operand:SI 0 "nonimmediate_operand" "=r")(unspec:SI [(match_operand:SI 1 "general_operand" "0")(match_operand:SI 2 "cgen_h_uint_5a1_immediate" "")] 3702))]"CGEN_ENABLE_INSN_P (735)""clipu\\t%1,%2"[(set_attr "may_trap" "no")(set_attr "latency" "0")(set_attr "length" "4")(set_attr "slot" "core")(set_attr "slots" "core")(set_attr "stall" "int2")])(define_insn "cgen_intrinsic_clip"[(set (match_operand:SI 0 "nonimmediate_operand" "=r")(unspec:SI [(match_operand:SI 1 "general_operand" "0")(match_operand:SI 2 "cgen_h_uint_5a1_immediate" "")] 3704))]"CGEN_ENABLE_INSN_P (736)""clip\\t%1,%2"[(set_attr "may_trap" "no")(set_attr "latency" "0")(set_attr "length" "4")(set_attr "slot" "core")(set_attr "slots" "core")(set_attr "stall" "int2")])(define_insn "cgen_intrinsic_maxu"[(set (match_operand:SI 0 "nonimmediate_operand" "=r")(unspec:SI [(match_operand:SI 1 "general_operand" "0")(match_operand:SI 2 "general_operand" "r")] 3706))]"CGEN_ENABLE_INSN_P (737)""maxu\\t%1,%2"[(set_attr "may_trap" "no")(set_attr "latency" "0")(set_attr "length" "4")(set_attr "slot" "core")(set_attr "slots" "core")(set_attr "stall" "int2")])(define_insn "cgen_intrinsic_minu"[(set (match_operand:SI 0 "nonimmediate_operand" "=r")(unspec:SI [(match_operand:SI 1 "general_operand" "0")(match_operand:SI 2 "general_operand" "r")] 3708))]"CGEN_ENABLE_INSN_P (738)""minu\\t%1,%2"[(set_attr "may_trap" "no")(set_attr "latency" "0")(set_attr "length" "4")(set_attr "slot" "core")(set_attr "slots" "core")(set_attr "stall" "int2")])(define_insn "cgen_intrinsic_max"[(set (match_operand:SI 0 "nonimmediate_operand" "=r")(unspec:SI [(match_operand:SI 1 "general_operand" "0")(match_operand:SI 2 "general_operand" "r")] 3710))]"CGEN_ENABLE_INSN_P (739)""max\\t%1,%2"[(set_attr "may_trap" "no")(set_attr "latency" "0")(set_attr "length" "4")(set_attr "slot" "core")(set_attr "slots" "core")(set_attr "stall" "int2")])(define_insn "cgen_intrinsic_min"[(set (match_operand:SI 0 "nonimmediate_operand" "=r")(unspec:SI [(match_operand:SI 1 "general_operand" "0")(match_operand:SI 2 "general_operand" "r")] 3712))]"CGEN_ENABLE_INSN_P (740)""min\\t%1,%2"[(set_attr "may_trap" "no")(set_attr "latency" "0")(set_attr "length" "4")(set_attr "slot" "core")(set_attr "slots" "core")(set_attr "stall" "int2")])(define_insn "cgen_intrinsic_ave"[(set (match_operand:SI 0 "nonimmediate_operand" "=r")(unspec:SI [(match_operand:SI 1 "general_operand" "0")(match_operand:SI 2 "general_operand" "r")] 3714))]"CGEN_ENABLE_INSN_P (741)""ave\\t%1,%2"[(set_attr "may_trap" "no")(set_attr "latency" "0")(set_attr "length" "4")(set_attr "slot" "core")(set_attr "slots" "core")(set_attr "stall" "int2")])(define_insn "cgen_intrinsic_abs"[(set (match_operand:SI 0 "nonimmediate_operand" "=r")(unspec:SI [(match_operand:SI 1 "general_operand" "0")(match_operand:SI 2 "general_operand" "r")] 3716))]"CGEN_ENABLE_INSN_P (742)""abs\\t%1,%2"[(set_attr "may_trap" "no")(set_attr "latency" "0")(set_attr "length" "4")(set_attr "slot" "core")(set_attr "slots" "core")(set_attr "stall" "int2")])(define_insn "cgen_intrinsic_ldz"[(set (match_operand:SI 0 "nonimmediate_operand" "=r")(unspec:SI [(match_operand:SI 1 "general_operand" "r")] 3718))]"CGEN_ENABLE_INSN_P (743)""ldz\\t%0,%1"[(set_attr "may_trap" "no")(set_attr "latency" "0")(set_attr "length" "4")(set_attr "slot" "core")(set_attr "slots" "core")(set_attr "stall" "int2")])(define_insn "cgen_intrinsic_dbreak"[(set (reg:SI 40)(unspec_volatile:SI [(reg:SI 40)] 3720))]"CGEN_ENABLE_INSN_P (744)""dbreak"[(set_attr "may_trap" "yes")(set_attr "latency" "0")(set_attr "length" "2")(set_attr "slot" "core")(set_attr "slots" "core")(set_attr "stall" "none")])(define_insn "cgen_intrinsic_dret"[(set (pc)(unspec:SI [(reg:SI 41)(reg:SI 40)] 3722))(set (reg:SI 40)(unspec:SI [(reg:SI 41)(reg:SI 40)] 3724))(set (reg:SI 115)(unspec:SI [(reg:SI 41)(reg:SI 40)] 3725))]"CGEN_ENABLE_INSN_P (745)""dret"[(set_attr "may_trap" "no")(set_attr "latency" "0")(set_attr "length" "2")(set_attr "slot" "core")(set_attr "slots" "core")(set_attr "stall" "none")])(define_insn "cgen_intrinsic_divu"[(set (pc)(unspec:SI [(match_operand:SI 0 "general_operand" "r")(match_operand:SI 1 "general_operand" "r")] 3726))(set (reg:SI 24)(unspec:SI [(match_dup 0)(match_dup 1)] 3728))(set (reg:SI 116)(unspec:SI [(match_dup 0)(match_dup 1)] 3729))(set (reg:SI 23)(unspec:SI [(match_dup 0)(match_dup 1)] 3730))(set (reg:SI 117)(unspec:SI [(match_dup 0)(match_dup 1)] 3731))]"CGEN_ENABLE_INSN_P (746)""divu\\t%0,%1"[(set_attr "may_trap" "yes")(set_attr "latency" "34")(set_attr "length" "2")(set_attr "slot" "core")(set_attr "slots" "core")(set_attr "stall" "div")])(define_insn "cgen_intrinsic_div"[(set (pc)(unspec:SI [(match_operand:SI 0 "general_operand" "r")(match_operand:SI 1 "general_operand" "r")] 3732))(set (reg:SI 24)(unspec:SI [(match_dup 0)(match_dup 1)] 3734))(set (reg:SI 116)(unspec:SI [(match_dup 0)(match_dup 1)] 3735))(set (reg:SI 23)(unspec:SI [(match_dup 0)(match_dup 1)] 3736))(set (reg:SI 117)(unspec:SI [(match_dup 0)(match_dup 1)] 3737))]"CGEN_ENABLE_INSN_P (747)""div\\t%0,%1"[(set_attr "may_trap" "yes")(set_attr "latency" "34")(set_attr "length" "2")(set_attr "slot" "core")(set_attr "slots" "core")(set_attr "stall" "div")])(define_insn "cgen_intrinsic_maddru"[(set (match_operand:SI 0 "nonimmediate_operand" "=r")(unspec:SI [(match_operand:SI 1 "general_operand" "0")(match_operand:SI 2 "general_operand" "r")(reg:SI 24)(reg:SI 23)] 3738))(set (reg:SI 24)(unspec:SI [(match_dup 1)(match_dup 2)(reg:SI 24)(reg:SI 23)] 3740))(set (reg:SI 116)(unspec:SI [(match_dup 1)(match_dup 2)(reg:SI 24)(reg:SI 23)] 3741))(set (reg:SI 23)(unspec:SI [(match_dup 1)(match_dup 2)(reg:SI 24)(reg:SI 23)] 3742))(set (reg:SI 117)(unspec:SI [(match_dup 1)(match_dup 2)(reg:SI 24)(reg:SI 23)] 3743))]"CGEN_ENABLE_INSN_P (748)""maddru\\t%1,%2"[(set_attr "may_trap" "no")(set_attr "latency" "3")(set_attr "length" "4")(set_attr "slot" "core")(set_attr "slots" "core")(set_attr "stall" "mulr")])(define_insn "cgen_intrinsic_maddr"[(set (match_operand:SI 0 "nonimmediate_operand" "=r")(unspec:SI [(match_operand:SI 1 "general_operand" "0")(match_operand:SI 2 "general_operand" "r")(reg:SI 24)(reg:SI 23)] 3744))(set (reg:SI 24)(unspec:SI [(match_dup 1)(match_dup 2)(reg:SI 24)(reg:SI 23)] 3746))(set (reg:SI 116)(unspec:SI [(match_dup 1)(match_dup 2)(reg:SI 24)(reg:SI 23)] 3747))(set (reg:SI 23)(unspec:SI [(match_dup 1)(match_dup 2)(reg:SI 24)(reg:SI 23)] 3748))(set (reg:SI 117)(unspec:SI [(match_dup 1)(match_dup 2)(reg:SI 24)(reg:SI 23)] 3749))]"CGEN_ENABLE_INSN_P (749)""maddr\\t%1,%2"[(set_attr "may_trap" "no")(set_attr "latency" "3")(set_attr "length" "4")(set_attr "slot" "core")(set_attr "slots" "core")(set_attr "stall" "mulr")])(define_insn "cgen_intrinsic_maddu"[(set (reg:SI 24)(unspec:SI [(match_operand:SI 0 "general_operand" "r")(match_operand:SI 1 "general_operand" "r")(reg:SI 24)(reg:SI 23)] 3750))(set (reg:SI 116)(unspec:SI [(match_dup 0)(match_dup 1)(reg:SI 24)(reg:SI 23)] 3751))(set (reg:SI 23)(unspec:SI [(match_dup 0)(match_dup 1)(reg:SI 24)(reg:SI 23)] 3752))(set (reg:SI 117)(unspec:SI [(match_dup 0)(match_dup 1)(reg:SI 24)(reg:SI 23)] 3753))]"CGEN_ENABLE_INSN_P (750)""maddu\\t%0,%1"[(set_attr "may_trap" "no")(set_attr "latency" "0")(set_attr "length" "4")(set_attr "slot" "core")(set_attr "slots" "core")(set_attr "stall" "mul")])(define_insn "cgen_intrinsic_madd"[(set (reg:SI 24)(unspec:SI [(match_operand:SI 0 "general_operand" "r")(match_operand:SI 1 "general_operand" "r")(reg:SI 24)(reg:SI 23)] 3754))(set (reg:SI 116)(unspec:SI [(match_dup 0)(match_dup 1)(reg:SI 24)(reg:SI 23)] 3755))(set (reg:SI 23)(unspec:SI [(match_dup 0)(match_dup 1)(reg:SI 24)(reg:SI 23)] 3756))(set (reg:SI 117)(unspec:SI [(match_dup 0)(match_dup 1)(reg:SI 24)(reg:SI 23)] 3757))]"CGEN_ENABLE_INSN_P (751)""madd\\t%0,%1"[(set_attr "may_trap" "no")(set_attr "latency" "0")(set_attr "length" "4")(set_attr "slot" "core")(set_attr "slots" "core")(set_attr "stall" "mul")])(define_insn "cgen_intrinsic_mulru"[(set (match_operand:SI 0 "nonimmediate_operand" "=r")(unspec:SI [(match_operand:SI 1 "general_operand" "0")(match_operand:SI 2 "general_operand" "r")] 3758))(set (reg:SI 24)(unspec:SI [(match_dup 1)(match_dup 2)] 3760))(set (reg:SI 116)(unspec:SI [(match_dup 1)(match_dup 2)] 3761))(set (reg:SI 23)(unspec:SI [(match_dup 1)(match_dup 2)] 3762))(set (reg:SI 117)(unspec:SI [(match_dup 1)(match_dup 2)] 3763))]"CGEN_ENABLE_INSN_P (752)""mulru\\t%1,%2"[(set_attr "may_trap" "no")(set_attr "latency" "3")(set_attr "length" "2")(set_attr "slot" "core")(set_attr "slots" "core")(set_attr "stall" "mulr")])(define_insn "cgen_intrinsic_mulr"[(set (match_operand:SI 0 "nonimmediate_operand" "=r")(unspec:SI [(match_operand:SI 1 "general_operand" "0")(match_operand:SI 2 "general_operand" "r")] 3764))(set (reg:SI 24)(unspec:SI [(match_dup 1)(match_dup 2)] 3766))(set (reg:SI 116)(unspec:SI [(match_dup 1)(match_dup 2)] 3767))(set (reg:SI 23)(unspec:SI [(match_dup 1)(match_dup 2)] 3768))(set (reg:SI 117)(unspec:SI [(match_dup 1)(match_dup 2)] 3769))]"CGEN_ENABLE_INSN_P (753)""mulr\\t%1,%2"[(set_attr "may_trap" "no")(set_attr "latency" "3")(set_attr "length" "2")(set_attr "slot" "core")(set_attr "slots" "core")(set_attr "stall" "mulr")])(define_insn "cgen_intrinsic_mulu"[(set (reg:SI 24)(unspec:SI [(match_operand:SI 0 "general_operand" "r")(match_operand:SI 1 "general_operand" "r")] 3770))(set (reg:SI 116)(unspec:SI [(match_dup 0)(match_dup 1)] 3771))(set (reg:SI 23)(unspec:SI [(match_dup 0)(match_dup 1)] 3772))(set (reg:SI 117)(unspec:SI [(match_dup 0)(match_dup 1)] 3773))]"CGEN_ENABLE_INSN_P (754)""mulu\\t%0,%1"[(set_attr "may_trap" "no")(set_attr "latency" "0")(set_attr "length" "2")(set_attr "slot" "core")(set_attr "slots" "core")(set_attr "stall" "mul")])(define_insn "cgen_intrinsic_mul"[(set (reg:SI 24)(unspec:SI [(match_operand:SI 0 "general_operand" "r")(match_operand:SI 1 "general_operand" "r")] 3774))(set (reg:SI 116)(unspec:SI [(match_dup 0)(match_dup 1)] 3775))(set (reg:SI 23)(unspec:SI [(match_dup 0)(match_dup 1)] 3776))(set (reg:SI 117)(unspec:SI [(match_dup 0)(match_dup 1)] 3777))]"CGEN_ENABLE_INSN_P (755)""mul\\t%0,%1"[(set_attr "may_trap" "no")(set_attr "latency" "0")(set_attr "length" "2")(set_attr "slot" "core")(set_attr "slots" "core")(set_attr "stall" "mul")])(define_insn "cgen_intrinsic_cache"[(unspec_volatile [(match_operand:SI 0 "cgen_h_uint_4a1_immediate" "")(match_operand:SI 1 "general_operand" "r")] 3778)]"CGEN_ENABLE_INSN_P (756)""cache\\t%0,(%1)"[(set_attr "may_trap" "no")(set_attr "latency" "0")(set_attr "length" "2")(set_attr "slot" "core")(set_attr "slots" "core")(set_attr "stall" "none")])(define_insn "cgen_intrinsic_tas"[(set (match_operand:SI 0 "nonimmediate_operand" "=r")(unspec:SI [(match_operand:SI 1 "general_operand" "r")(mem:SI (scratch:SI))] 3780))(set (mem:SI (scratch:SI))(unspec:SI [(match_dup 1)(mem:SI (scratch:SI))] 3782))]"CGEN_ENABLE_INSN_P (757)""tas\\t%0,(%1)"[(set_attr "may_trap" "no")(set_attr "latency" "0")(set_attr "length" "2")(set_attr "slot" "core")(set_attr "slots" "core")(set_attr "stall" "none")])(define_insn "cgen_intrinsic_btstm"[(set (match_operand:SI 0 "nonimmediate_operand" "=z")(unspec:SI [(match_operand:SI 1 "general_operand" "r")(match_operand:SI 2 "cgen_h_uint_3a1_immediate" "")(mem:SI (scratch:SI))] 3784))]"CGEN_ENABLE_INSN_P (758)""btstm\\t$0,(%1),%2"[(set_attr "may_trap" "no")(set_attr "latency" "0")(set_attr "length" "2")(set_attr "slot" "core")(set_attr "slots" "core")(set_attr "stall" "none")])(define_insn "cgen_intrinsic_bnotm"[(set (mem:SI (scratch:SI))(unspec:SI [(match_operand:SI 0 "general_operand" "r")(match_operand:SI 1 "cgen_h_uint_3a1_immediate" "")(mem:SI (scratch:SI))] 3786))]"CGEN_ENABLE_INSN_P (759)""bnotm\\t(%0),%1"[(set_attr "may_trap" "no")(set_attr "latency" "0")(set_attr "length" "2")(set_attr "slot" "core")(set_attr "slots" "core")(set_attr "stall" "none")])(define_insn "cgen_intrinsic_bclrm"[(set (mem:SI (scratch:SI))(unspec:SI [(match_operand:SI 0 "general_operand" "r")(match_operand:SI 1 "cgen_h_uint_3a1_immediate" "")(mem:SI (scratch:SI))] 3788))]"CGEN_ENABLE_INSN_P (760)""bclrm\\t(%0),%1"[(set_attr "may_trap" "no")(set_attr "latency" "0")(set_attr "length" "2")(set_attr "slot" "core")(set_attr "slots" "core")(set_attr "stall" "none")])(define_insn "cgen_intrinsic_bsetm"[(set (mem:SI (scratch:SI))(unspec:SI [(match_operand:SI 0 "general_operand" "r")(match_operand:SI 1 "cgen_h_uint_3a1_immediate" "")(mem:SI (scratch:SI))] 3790))]"CGEN_ENABLE_INSN_P (761)""bsetm\\t(%0),%1"[(set_attr "may_trap" "no")(set_attr "latency" "0")(set_attr "length" "2")(set_attr "slot" "core")(set_attr "slots" "core")(set_attr "stall" "none")])(define_insn "cgen_intrinsic_ldcb"[(set (match_operand:SI 0 "nonimmediate_operand" "=r")(unspec_volatile:SI [(match_operand:SI 1 "cgen_h_uint_16a1_immediate" "")] 3792))]"CGEN_ENABLE_INSN_P (762)""ldcb\\t%0,%1"[(set_attr "may_trap" "no")(set_attr "latency" "3")(set_attr "length" "4")(set_attr "slot" "core")(set_attr "slots" "core")(set_attr "stall" "ldcb")])(define_insn "cgen_intrinsic_stcb"[(unspec_volatile [(match_operand:SI 0 "general_operand" "r")(match_operand:SI 1 "cgen_h_uint_16a1_immediate" "")] 3794)]"CGEN_ENABLE_INSN_P (763)""stcb\\t%0,%1"[(set_attr "may_trap" "no")(set_attr "latency" "0")(set_attr "length" "4")(set_attr "slot" "core")(set_attr "slots" "core")(set_attr "stall" "stcb")])(define_insn "cgen_intrinsic_syncm"[(unspec_volatile [(const_int 0)] 3796)]"CGEN_ENABLE_INSN_P (764)""syncm"[(set_attr "may_trap" "no")(set_attr "latency" "0")(set_attr "length" "2")(set_attr "slot" "core")(set_attr "slots" "core")(set_attr "stall" "none")])(define_insn "cgen_intrinsic_break"[(set (pc)(unspec_volatile:SI [(const_int 0)] 3798))]"CGEN_ENABLE_INSN_P (765)""break"[(set_attr "may_trap" "yes")(set_attr "latency" "0")(set_attr "length" "2")(set_attr "slot" "core")(set_attr "slots" "core")(set_attr "stall" "none")])(define_insn "cgen_intrinsic_swi"[(set (reg:SI 36)(unspec_volatile:SI [(match_operand:SI 0 "cgen_h_uint_2a1_immediate" "")(reg:SI 36)] 3800))]"CGEN_ENABLE_INSN_P (766)""swi\\t%0"[(set_attr "may_trap" "yes")(set_attr "latency" "0")(set_attr "length" "2")(set_attr "slot" "core")(set_attr "slots" "core")(set_attr "stall" "none")])(define_insn "cgen_intrinsic_sleep"[(unspec_volatile [(const_int 0)] 3802)]"CGEN_ENABLE_INSN_P (767)""sleep"[(set_attr "may_trap" "no")(set_attr "latency" "0")(set_attr "length" "2")(set_attr "slot" "core")(set_attr "slots" "core")(set_attr "stall" "none")])(define_insn "cgen_intrinsic_halt"[(unspec_volatile [(reg:SI 32)] 3804)]"CGEN_ENABLE_INSN_P (768)""halt"[(set_attr "may_trap" "no")(set_attr "latency" "0")(set_attr "length" "2")(set_attr "slot" "core")(set_attr "slots" "core")(set_attr "stall" "none")])(define_insn "cgen_intrinsic_reti"[(set (pc)(unspec:SI [(reg:SI 32)(reg:SI 42)(reg:SI 39)(reg:SI 35)] 3806))]"CGEN_ENABLE_INSN_P (769)""reti"[(set_attr "may_trap" "no")(set_attr "latency" "0")(set_attr "length" "2")(set_attr "slot" "core")(set_attr "slots" "core")(set_attr "stall" "ret")])(define_insn "cgen_intrinsic_ei"[(set (reg:SI 32)(unspec_volatile:SI [(reg:SI 32)] 3808))]"CGEN_ENABLE_INSN_P (770)""ei"[(set_attr "may_trap" "no")(set_attr "latency" "0")(set_attr "length" "2")(set_attr "slot" "core")(set_attr "slots" "core")(set_attr "stall" "none")])(define_insn "cgen_intrinsic_di"[(set (reg:SI 32)(unspec_volatile:SI [(reg:SI 32)] 3810))]"CGEN_ENABLE_INSN_P (771)""di"[(set_attr "may_trap" "no")(set_attr "latency" "0")(set_attr "length" "2")(set_attr "slot" "core")(set_attr "slots" "core")(set_attr "stall" "none")])(define_insn "cgen_intrinsic_ldc"[(set (match_operand:SI 0 "nonimmediate_operand" "=r")(unspec_volatile:SI [(match_operand:SI 1 "general_operand" "c")(reg:SI 32)(reg:SI 42)] 3812))]"CGEN_ENABLE_INSN_P (772)""ldc\\t%0,%1"[(set_attr "may_trap" "no")(set_attr "latency" "2")(set_attr "length" "2")(set_attr "slot" "core")(set_attr "slots" "core")(set_attr "stall" "ldc")])(define_insn "cgen_intrinsic_ldc_lo"[(set (match_operand:SI 0 "nonimmediate_operand" "=r")(unspec:SI [(reg:SI 24)] 3814))]"CGEN_ENABLE_INSN_P (773)""ldc\\t%0,$lo"[(set_attr "may_trap" "no")(set_attr "latency" "0")(set_attr "length" "2")(set_attr "slot" "core")(set_attr "slots" "core")(set_attr "stall" "ldc")])(define_insn "cgen_intrinsic_ldc_hi"[(set (match_operand:SI 0 "nonimmediate_operand" "=r")(unspec:SI [(reg:SI 23)] 3816))]"CGEN_ENABLE_INSN_P (774)""ldc\\t%0,$hi"[(set_attr "may_trap" "no")(set_attr "latency" "0")(set_attr "length" "2")(set_attr "slot" "core")(set_attr "slots" "core")(set_attr "stall" "ldc")])(define_insn "cgen_intrinsic_ldc_lp"[(set (match_operand:SI 0 "nonimmediate_operand" "=r")(unspec:SI [(reg:SI 17)] 3818))]"CGEN_ENABLE_INSN_P (775)""ldc\\t%0,$lp"[(set_attr "may_trap" "no")(set_attr "latency" "0")(set_attr "length" "2")(set_attr "slot" "core")(set_attr "slots" "core")(set_attr "stall" "ldc")])(define_insn "cgen_intrinsic_stc"[(set (match_operand:SI 0 "nonimmediate_operand" "=c")(unspec_volatile:SI [(match_operand:SI 1 "general_operand" "r")] 3820))]"CGEN_ENABLE_INSN_P (776)""stc\\t%1,%0"[(set_attr "may_trap" "no")(set_attr "latency" "0")(set_attr "length" "2")(set_attr "slot" "core")(set_attr "slots" "core")(set_attr "stall" "stc")])(define_insn "cgen_intrinsic_stc_lo"[(set (reg:SI 24)(unspec:SI [(match_operand:SI 0 "general_operand" "r")] 3822))(set (reg:SI 116)(unspec:SI [(match_dup 0)] 3823))]"CGEN_ENABLE_INSN_P (777)""stc\\t%0,$lo"[(set_attr "may_trap" "no")(set_attr "latency" "0")(set_attr "length" "2")(set_attr "slot" "core")(set_attr "slots" "core")(set_attr "stall" "stc")])(define_insn "cgen_intrinsic_stc_hi"[(set (reg:SI 23)(unspec:SI [(match_operand:SI 0 "general_operand" "r")] 3824))(set (reg:SI 117)(unspec:SI [(match_dup 0)] 3825))]"CGEN_ENABLE_INSN_P (778)""stc\\t%0,$hi"[(set_attr "may_trap" "no")(set_attr "latency" "0")(set_attr "length" "2")(set_attr "slot" "core")(set_attr "slots" "core")(set_attr "stall" "stc")])(define_insn "cgen_intrinsic_stc_lp"[(set (reg:SI 17)(unspec:SI [(match_operand:SI 0 "general_operand" "r")] 3826))(set (reg:SI 114)(unspec:SI [(match_dup 0)] 3827))]"CGEN_ENABLE_INSN_P (779)""stc\\t%0,$lp"[(set_attr "may_trap" "no")(set_attr "latency" "0")(set_attr "length" "2")(set_attr "slot" "core")(set_attr "slots" "core")(set_attr "stall" "stc")])(define_insn "cgen_intrinsic_erepeat"[(set (reg:SI 22)(unspec:SI [(match_operand:SI 0 "immediate_operand" "")(reg:SI 32)(reg:SI 42)] 3828))(set (reg:SI 118)(unspec:SI [(match_dup 0)(reg:SI 32)(reg:SI 42)] 3829))(set (reg:SI 21)(unspec:SI [(match_dup 0)(reg:SI 32)(reg:SI 42)] 3830))(set (reg:SI 119)(unspec:SI [(match_dup 0)(reg:SI 32)(reg:SI 42)] 3831))(set (reg:SI 20)(unspec:SI [(match_dup 0)(reg:SI 32)(reg:SI 42)] 3832))(set (reg:SI 120)(unspec:SI [(match_dup 0)(reg:SI 32)(reg:SI 42)] 3833))]"CGEN_ENABLE_INSN_P (780)""erepeat\\t%l0"[(set_attr "may_trap" "no")(set_attr "latency" "0")(set_attr "length" "4")(set_attr "slot" "core")(set_attr "slots" "core")(set_attr "stall" "none")])(define_insn "cgen_intrinsic_repeat"[(set (reg:SI 22)(unspec:SI [(match_operand:SI 0 "general_operand" "r")(match_operand:SI 1 "immediate_operand" "")(reg:SI 32)(reg:SI 42)] 3834))(set (reg:SI 118)(unspec:SI [(match_dup 0)(match_dup 1)(reg:SI 32)(reg:SI 42)] 3835))(set (reg:SI 21)(unspec:SI [(match_dup 0)(match_dup 1)(reg:SI 32)(reg:SI 42)] 3836))(set (reg:SI 119)(unspec:SI [(match_dup 0)(match_dup 1)(reg:SI 32)(reg:SI 42)] 3837))(set (reg:SI 20)(unspec:SI [(match_dup 0)(match_dup 1)(reg:SI 32)(reg:SI 42)] 3838))(set (reg:SI 120)(unspec:SI [(match_dup 0)(match_dup 1)(reg:SI 32)(reg:SI 42)] 3839))]"CGEN_ENABLE_INSN_P (781)""repeat\\t%0,%l1"[(set_attr "may_trap" "no")(set_attr "latency" "0")(set_attr "length" "4")(set_attr "slot" "core")(set_attr "slots" "core")(set_attr "stall" "none")])(define_insn "cgen_intrinsic_ret"[(set (pc)(unspec:SI [(reg:SI 32)(reg:SI 42)(reg:SI 17)] 3840))]"CGEN_ENABLE_INSN_P (782)""ret"[(set_attr "may_trap" "no")(set_attr "latency" "0")(set_attr "length" "2")(set_attr "slot" "core")(set_attr "slots" "core")(set_attr "stall" "ret")])(define_insn "cgen_intrinsic_jsr"[(set (pc)(unspec:SI [(match_operand:SI 0 "general_operand" "r")(reg:SI 32)(reg:SI 42)] 3842))(set (reg:SI 17)(unspec:SI [(match_dup 0)(reg:SI 32)(reg:SI 42)] 3844))(set (reg:SI 114)(unspec:SI [(match_dup 0)(reg:SI 32)(reg:SI 42)] 3845))]"CGEN_ENABLE_INSN_P (783)""jsr\\t%0"[(set_attr "may_trap" "no")(set_attr "latency" "0")(set_attr "length" "2")(set_attr "slot" "core")(set_attr "slots" "core")(set_attr "stall" "none")])(define_insn "cgen_intrinsic_jmp24"[(set (pc)(if_then_else (eq (unspec [(match_operand:SI 0 "immediate_operand" "")(reg:SI 32)(reg:SI 42)] 3846)(const_int 0))(match_dup 0)(pc)))]"CGEN_ENABLE_INSN_P (784)""jmp\\t%l0"[(set_attr "may_trap" "no")(set_attr "latency" "0")(set_attr "length" "4")(set_attr "slot" "core")(set_attr "slots" "core")(set_attr "stall" "none")])(define_insn "cgen_intrinsic_jmp"[(set (pc)(unspec:SI [(match_operand:SI 0 "general_operand" "r")(reg:SI 32)(reg:SI 42)] 3848))]"CGEN_ENABLE_INSN_P (785)""jmp\\t%0"[(set_attr "may_trap" "no")(set_attr "latency" "0")(set_attr "length" "2")(set_attr "slot" "core")(set_attr "slots" "core")(set_attr "stall" "none")])(define_insn "cgen_intrinsic_bsr12"[(set (pc)(if_then_else (eq (unspec [(match_operand:SI 0 "immediate_operand" "")(reg:SI 32)(reg:SI 42)] 3854)(const_int 0))(match_dup 0)(pc)))(set (reg:SI 17)(unspec:SI [(match_dup 0)(reg:SI 32)(reg:SI 42)] 3856))(set (reg:SI 114)(unspec:SI [(match_dup 0)(reg:SI 32)(reg:SI 42)] 3857))]"CGEN_ENABLE_INSN_P (786)""bsr\\t%l0"[(set_attr "may_trap" "no")(set_attr "latency" "0")(set_attr "length" "2")(set_attr "slot" "core")(set_attr "slots" "core")(set_attr "stall" "none")])(define_insn "cgen_intrinsic_bsr24"[(set (pc)(if_then_else (eq (unspec [(match_operand:SI 0 "immediate_operand" "")(reg:SI 32)(reg:SI 42)] 3850)(const_int 0))(match_dup 0)(pc)))(set (reg:SI 17)(unspec:SI [(match_dup 0)(reg:SI 32)(reg:SI 42)] 3852))(set (reg:SI 114)(unspec:SI [(match_dup 0)(reg:SI 32)(reg:SI 42)] 3853))]"CGEN_ENABLE_INSN_P (787)""bsr\\t%l0"[(set_attr "may_trap" "no")(set_attr "latency" "0")(set_attr "length" "4")(set_attr "slot" "core")(set_attr "slots" "core")(set_attr "stall" "none")])(define_insn "cgen_intrinsic_bne"[(set (pc)(if_then_else (eq (unspec [(match_operand:SI 0 "general_operand" "r")(match_operand:SI 1 "general_operand" "r")(match_operand:SI 2 "immediate_operand" "")(reg:SI 32)(reg:SI 42)] 3858)(const_int 0))(match_dup 2)(pc)))]"CGEN_ENABLE_INSN_P (788)""bne\\t%0,%1,%l2"[(set_attr "may_trap" "no")(set_attr "latency" "0")(set_attr "length" "4")(set_attr "slot" "core")(set_attr "slots" "core")(set_attr "stall" "none")])(define_insn "cgen_intrinsic_beq"[(set (pc)(if_then_else (eq (unspec [(match_operand:SI 0 "general_operand" "r")(match_operand:SI 1 "general_operand" "r")(match_operand:SI 2 "immediate_operand" "")(reg:SI 32)(reg:SI 42)] 3860)(const_int 0))(match_dup 2)(pc)))]"CGEN_ENABLE_INSN_P (789)""beq\\t%0,%1,%l2"[(set_attr "may_trap" "no")(set_attr "latency" "0")(set_attr "length" "4")(set_attr "slot" "core")(set_attr "slots" "core")(set_attr "stall" "none")])(define_insn "cgen_intrinsic_bgei"[(set (pc)(if_then_else (eq (unspec [(match_operand:SI 0 "general_operand" "r")(match_operand:SI 1 "cgen_h_uint_4a1_immediate" "")(match_operand:SI 2 "immediate_operand" "")(reg:SI 32)(reg:SI 42)] 3862)(const_int 0))(match_dup 2)(pc)))]"CGEN_ENABLE_INSN_P (790)""bgei\\t%0,%1,%l2"[(set_attr "may_trap" "no")(set_attr "latency" "0")(set_attr "length" "4")(set_attr "slot" "core")(set_attr "slots" "core")(set_attr "stall" "none")])(define_insn "cgen_intrinsic_blti"[(set (pc)(if_then_else (eq (unspec [(match_operand:SI 0 "general_operand" "r")(match_operand:SI 1 "cgen_h_uint_4a1_immediate" "")(match_operand:SI 2 "immediate_operand" "")(reg:SI 32)(reg:SI 42)] 3864)(const_int 0))(match_dup 2)(pc)))]"CGEN_ENABLE_INSN_P (791)""blti\\t%0,%1,%l2"[(set_attr "may_trap" "no")(set_attr "latency" "0")(set_attr "length" "4")(set_attr "slot" "core")(set_attr "slots" "core")(set_attr "stall" "none")])(define_insn "cgen_intrinsic_bnei"[(set (pc)(if_then_else (eq (unspec [(match_operand:SI 0 "general_operand" "r")(match_operand:SI 1 "cgen_h_uint_4a1_immediate" "")(match_operand:SI 2 "immediate_operand" "")(reg:SI 32)(reg:SI 42)] 3866)(const_int 0))(match_dup 2)(pc)))]"CGEN_ENABLE_INSN_P (792)""bnei\\t%0,%1,%l2"[(set_attr "may_trap" "no")(set_attr "latency" "0")(set_attr "length" "4")(set_attr "slot" "core")(set_attr "slots" "core")(set_attr "stall" "none")])(define_insn "cgen_intrinsic_beqi"[(set (pc)(if_then_else (eq (unspec [(match_operand:SI 0 "general_operand" "r")(match_operand:SI 1 "cgen_h_uint_4a1_immediate" "")(match_operand:SI 2 "immediate_operand" "")(reg:SI 32)(reg:SI 42)] 3868)(const_int 0))(match_dup 2)(pc)))]"CGEN_ENABLE_INSN_P (793)""beqi\\t%0,%1,%l2"[(set_attr "may_trap" "no")(set_attr "latency" "0")(set_attr "length" "4")(set_attr "slot" "core")(set_attr "slots" "core")(set_attr "stall" "none")])(define_insn "cgen_intrinsic_bnez"[(set (pc)(if_then_else (eq (unspec [(match_operand:SI 0 "general_operand" "r")(match_operand:SI 1 "immediate_operand" "")(reg:SI 32)(reg:SI 42)] 3870)(const_int 0))(match_dup 1)(pc)))]"CGEN_ENABLE_INSN_P (794)""bnez\\t%0,%l1"[(set_attr "may_trap" "no")(set_attr "latency" "0")(set_attr "length" "2")(set_attr "slot" "core")(set_attr "slots" "core")(set_attr "stall" "none")])(define_insn "cgen_intrinsic_beqz"[(set (pc)(if_then_else (eq (unspec [(match_operand:SI 0 "general_operand" "r")(match_operand:SI 1 "immediate_operand" "")(reg:SI 32)(reg:SI 42)] 3872)(const_int 0))(match_dup 1)(pc)))]"CGEN_ENABLE_INSN_P (795)""beqz\\t%0,%l1"[(set_attr "may_trap" "no")(set_attr "latency" "0")(set_attr "length" "2")(set_attr "slot" "core")(set_attr "slots" "core")(set_attr "stall" "none")])(define_insn "cgen_intrinsic_bra"[(set (pc)(if_then_else (eq (unspec [(match_operand:SI 0 "immediate_operand" "")(reg:SI 32)(reg:SI 42)] 3874)(const_int 0))(match_dup 0)(pc)))]"CGEN_ENABLE_INSN_P (796)""bra\\t%l0"[(set_attr "may_trap" "no")(set_attr "latency" "0")(set_attr "length" "2")(set_attr "slot" "core")(set_attr "slots" "core")(set_attr "stall" "none")])(define_insn "cgen_intrinsic_fsft"[(set (match_operand:SI 0 "nonimmediate_operand" "=r")(unspec_volatile:SI [(match_operand:SI 1 "general_operand" "0")(match_operand:SI 2 "general_operand" "r")(reg:SI 18)] 3876))]"CGEN_ENABLE_INSN_P (797)""fsft\\t%1,%2"[(set_attr "may_trap" "no")(set_attr "latency" "0")(set_attr "length" "2")(set_attr "slot" "core")(set_attr "slots" "core")(set_attr "stall" "fsft")])(define_insn "cgen_intrinsic_sll3"[(set (match_operand:SI 0 "nonimmediate_operand" "=z")(unspec:SI [(match_operand:SI 1 "general_operand" "r")(match_operand:SI 2 "cgen_h_uint_5a1_immediate" "")] 3878))]"CGEN_ENABLE_INSN_P (798)""sll3\\t$0,%1,%2"[(set_attr "may_trap" "no")(set_attr "latency" "0")(set_attr "length" "2")(set_attr "slot" "core")(set_attr "slots" "core")(set_attr "stall" "int2")])(define_insn "cgen_intrinsic_slli"[(set (match_operand:SI 0 "nonimmediate_operand" "=r")(unspec:SI [(match_operand:SI 1 "general_operand" "0")(match_operand:SI 2 "cgen_h_uint_5a1_immediate" "")] 3880))]"CGEN_ENABLE_INSN_P (799)""sll\\t%1,%2"[(set_attr "may_trap" "no")(set_attr "latency" "0")(set_attr "length" "2")(set_attr "slot" "core")(set_attr "slots" "core")(set_attr "shiftop" "operand2")])(define_insn "cgen_intrinsic_srli"[(set (match_operand:SI 0 "nonimmediate_operand" "=r")(unspec:SI [(match_operand:SI 1 "general_operand" "0")(match_operand:SI 2 "cgen_h_uint_5a1_immediate" "")] 3882))]"CGEN_ENABLE_INSN_P (800)""srl\\t%1,%2"[(set_attr "may_trap" "no")(set_attr "latency" "0")(set_attr "length" "2")(set_attr "slot" "core")(set_attr "slots" "core")(set_attr "shiftop" "operand2")])(define_insn "cgen_intrinsic_srai"[(set (match_operand:SI 0 "nonimmediate_operand" "=r")(unspec:SI [(match_operand:SI 1 "general_operand" "0")(match_operand:SI 2 "cgen_h_uint_5a1_immediate" "")] 3884))]"CGEN_ENABLE_INSN_P (801)""sra\\t%1,%2"[(set_attr "may_trap" "no")(set_attr "latency" "0")(set_attr "length" "2")(set_attr "slot" "core")(set_attr "slots" "core")(set_attr "shiftop" "operand2")])(define_insn "cgen_intrinsic_sll"[(set (match_operand:SI 0 "nonimmediate_operand" "=r")(unspec:SI [(match_operand:SI 1 "general_operand" "0")(match_operand:SI 2 "general_operand" "r")] 3886))]"CGEN_ENABLE_INSN_P (802)""sll\\t%1,%2"[(set_attr "may_trap" "no")(set_attr "latency" "0")(set_attr "length" "2")(set_attr "slot" "core")(set_attr "slots" "core")(set_attr "stall" "int2")])(define_insn "cgen_intrinsic_srl"[(set (match_operand:SI 0 "nonimmediate_operand" "=r")(unspec:SI [(match_operand:SI 1 "general_operand" "0")(match_operand:SI 2 "general_operand" "r")] 3888))]"CGEN_ENABLE_INSN_P (803)""srl\\t%1,%2"[(set_attr "may_trap" "no")(set_attr "latency" "0")(set_attr "length" "2")(set_attr "slot" "core")(set_attr "slots" "core")(set_attr "stall" "int2")])(define_insn "cgen_intrinsic_sra"[(set (match_operand:SI 0 "nonimmediate_operand" "=r")(unspec:SI [(match_operand:SI 1 "general_operand" "0")(match_operand:SI 2 "general_operand" "r")] 3890))]"CGEN_ENABLE_INSN_P (804)""sra\\t%1,%2"[(set_attr "may_trap" "no")(set_attr "latency" "0")(set_attr "length" "2")(set_attr "slot" "core")(set_attr "slots" "core")(set_attr "stall" "int2")])(define_insn "cgen_intrinsic_xor3"[(set (match_operand:SI 0 "nonimmediate_operand" "=r")(unspec:SI [(match_operand:SI 1 "general_operand" "r")(match_operand:SI 2 "cgen_h_uint_16a1_immediate" "")] 3892))]"CGEN_ENABLE_INSN_P (805)""xor3\\t%0,%1,%2"[(set_attr "may_trap" "no")(set_attr "latency" "0")(set_attr "length" "4")(set_attr "slot" "core")(set_attr "slots" "core")(set_attr "stall" "none")])(define_insn "cgen_intrinsic_and3"[(set (match_operand:SI 0 "nonimmediate_operand" "=r")(unspec:SI [(match_operand:SI 1 "general_operand" "r")(match_operand:SI 2 "cgen_h_uint_16a1_immediate" "")] 3894))]"CGEN_ENABLE_INSN_P (806)""and3\\t%0,%1,%2"[(set_attr "may_trap" "no")(set_attr "latency" "0")(set_attr "length" "4")(set_attr "slot" "core")(set_attr "slots" "core")(set_attr "stall" "none")])(define_insn "cgen_intrinsic_or3"[(set (match_operand:SI 0 "nonimmediate_operand" "=r")(unspec:SI [(match_operand:SI 1 "general_operand" "r")(match_operand:SI 2 "cgen_h_uint_16a1_immediate" "")] 3896))]"CGEN_ENABLE_INSN_P (807)""or3\\t%0,%1,%2"[(set_attr "may_trap" "no")(set_attr "latency" "0")(set_attr "length" "4")(set_attr "slot" "core")(set_attr "slots" "core")(set_attr "stall" "none")])(define_insn "cgen_intrinsic_nor"[(set (match_operand:SI 0 "nonimmediate_operand" "=r")(unspec:SI [(match_operand:SI 1 "general_operand" "0")(match_operand:SI 2 "general_operand" "r")] 3898))]"CGEN_ENABLE_INSN_P (808)""nor\\t%1,%2"[(set_attr "may_trap" "no")(set_attr "latency" "0")(set_attr "length" "2")(set_attr "slot" "core")(set_attr "slots" "core")(set_attr "stall" "none")])(define_insn "cgen_intrinsic_xor"[(set (match_operand:SI 0 "nonimmediate_operand" "=r")(unspec:SI [(match_operand:SI 1 "general_operand" "0")(match_operand:SI 2 "general_operand" "r")] 3900))]"CGEN_ENABLE_INSN_P (809)""xor\\t%1,%2"[(set_attr "may_trap" "no")(set_attr "latency" "0")(set_attr "length" "2")(set_attr "slot" "core")(set_attr "slots" "core")(set_attr "stall" "none")])(define_insn "cgen_intrinsic_and"[(set (match_operand:SI 0 "nonimmediate_operand" "=r")(unspec:SI [(match_operand:SI 1 "general_operand" "0")(match_operand:SI 2 "general_operand" "r")] 3902))]"CGEN_ENABLE_INSN_P (810)""and\\t%1,%2"[(set_attr "may_trap" "no")(set_attr "latency" "0")(set_attr "length" "2")(set_attr "slot" "core")(set_attr "slots" "core")(set_attr "stall" "none")])(define_insn "cgen_intrinsic_or"[(set (match_operand:SI 0 "nonimmediate_operand" "=r")(unspec:SI [(match_operand:SI 1 "general_operand" "0")(match_operand:SI 2 "general_operand" "r")] 3904))]"CGEN_ENABLE_INSN_P (811)""or\\t%1,%2"[(set_attr "may_trap" "no")(set_attr "latency" "0")(set_attr "length" "2")(set_attr "slot" "core")(set_attr "slots" "core")(set_attr "stall" "none")])(define_insn "cgen_intrinsic_sltu3x"[(set (match_operand:SI 0 "nonimmediate_operand" "=r")(unspec:SI [(match_operand:SI 1 "general_operand" "r")(match_operand:SI 2 "cgen_h_uint_16a1_immediate" "")] 3906))]"CGEN_ENABLE_INSN_P (812)""sltu3\\t%0,%1,%2"[(set_attr "may_trap" "no")(set_attr "latency" "0")(set_attr "length" "4")(set_attr "slot" "core")(set_attr "slots" "core")(set_attr "stall" "none")])(define_insn "cgen_intrinsic_slt3x"[(set (match_operand:SI 0 "nonimmediate_operand" "=r")(unspec:SI [(match_operand:SI 1 "general_operand" "r")(match_operand:SI 2 "cgen_h_sint_16a1_immediate" "")] 3908))]"CGEN_ENABLE_INSN_P (813)""slt3\\t%0,%1,%2"[(set_attr "may_trap" "no")(set_attr "latency" "0")(set_attr "length" "4")(set_attr "slot" "core")(set_attr "slots" "core")(set_attr "stall" "none")])(define_insn "cgen_intrinsic_add3x"[(set (match_operand:SI 0 "nonimmediate_operand" "=r")(unspec:SI [(match_operand:SI 1 "general_operand" "r")(match_operand:SI 2 "cgen_h_sint_16a1_immediate" "")] 3910))]"CGEN_ENABLE_INSN_P (814)""add3\\t%0,%1,%2"[(set_attr "may_trap" "no")(set_attr "latency" "0")(set_attr "length" "4")(set_attr "slot" "core")(set_attr "slots" "core")(set_attr "stall" "none")])(define_insn "cgen_intrinsic_sl2ad3"[(set (match_operand:SI 0 "nonimmediate_operand" "=z")(unspec:SI [(match_operand:SI 1 "general_operand" "r")(match_operand:SI 2 "general_operand" "r")] 3912))]"CGEN_ENABLE_INSN_P (815)""sl2ad3\\t$0,%1,%2"[(set_attr "may_trap" "no")(set_attr "latency" "0")(set_attr "length" "2")(set_attr "slot" "core")(set_attr "slots" "core")(set_attr "stall" "int2")])(define_insn "cgen_intrinsic_sl1ad3"[(set (match_operand:SI 0 "nonimmediate_operand" "=z")(unspec:SI [(match_operand:SI 1 "general_operand" "r")(match_operand:SI 2 "general_operand" "r")] 3914))]"CGEN_ENABLE_INSN_P (816)""sl1ad3\\t$0,%1,%2"[(set_attr "may_trap" "no")(set_attr "latency" "0")(set_attr "length" "2")(set_attr "slot" "core")(set_attr "slots" "core")(set_attr "stall" "int2")])(define_insn "cgen_intrinsic_sltu3i"[(set (match_operand:SI 0 "nonimmediate_operand" "=z")(unspec:SI [(match_operand:SI 1 "general_operand" "r")(match_operand:SI 2 "cgen_h_uint_5a1_immediate" "")] 3916))]"CGEN_ENABLE_INSN_P (817)""sltu3\\t$0,%1,%2"[(set_attr "may_trap" "no")(set_attr "latency" "0")(set_attr "length" "2")(set_attr "slot" "core")(set_attr "slots" "core")(set_attr "stall" "none")])(define_insn "cgen_intrinsic_slt3i"[(set (match_operand:SI 0 "nonimmediate_operand" "=z")(unspec:SI [(match_operand:SI 1 "general_operand" "r")(match_operand:SI 2 "cgen_h_uint_5a1_immediate" "")] 3918))]"CGEN_ENABLE_INSN_P (818)""slt3\\t$0,%1,%2"[(set_attr "may_trap" "no")(set_attr "latency" "0")(set_attr "length" "2")(set_attr "slot" "core")(set_attr "slots" "core")(set_attr "stall" "none")])(define_insn "cgen_intrinsic_sltu3"[(set (match_operand:SI 0 "nonimmediate_operand" "=z")(unspec:SI [(match_operand:SI 1 "general_operand" "r")(match_operand:SI 2 "general_operand" "r")] 3920))]"CGEN_ENABLE_INSN_P (819)""sltu3\\t$0,%1,%2"[(set_attr "may_trap" "no")(set_attr "latency" "0")(set_attr "length" "2")(set_attr "slot" "core")(set_attr "slots" "core")(set_attr "stall" "none")])(define_insn "cgen_intrinsic_slt3"[(set (match_operand:SI 0 "nonimmediate_operand" "=z")(unspec:SI [(match_operand:SI 1 "general_operand" "r")(match_operand:SI 2 "general_operand" "r")] 3922))]"CGEN_ENABLE_INSN_P (820)""slt3\\t$0,%1,%2"[(set_attr "may_trap" "no")(set_attr "latency" "0")(set_attr "length" "2")(set_attr "slot" "core")(set_attr "slots" "core")(set_attr "stall" "none")])(define_insn "cgen_intrinsic_neg"[(set (match_operand:SI 0 "nonimmediate_operand" "=r")(unspec:SI [(match_operand:SI 1 "general_operand" "r")] 3924))]"CGEN_ENABLE_INSN_P (821)""neg\\t%0,%1"[(set_attr "may_trap" "no")(set_attr "latency" "0")(set_attr "length" "2")(set_attr "slot" "core")(set_attr "slots" "core")(set_attr "stall" "none")])(define_insn "cgen_intrinsic_sbvck3"[(set (match_operand:SI 0 "nonimmediate_operand" "=z")(unspec:SI [(match_operand:SI 1 "general_operand" "r")(match_operand:SI 2 "general_operand" "r")] 3926))]"CGEN_ENABLE_INSN_P (822)""sbvck3\\t$0,%1,%2"[(set_attr "may_trap" "no")(set_attr "latency" "0")(set_attr "length" "2")(set_attr "slot" "core")(set_attr "slots" "core")(set_attr "stall" "advck")])(define_insn "cgen_intrinsic_sub"[(set (match_operand:SI 0 "nonimmediate_operand" "=r")(unspec:SI [(match_operand:SI 1 "general_operand" "0")(match_operand:SI 2 "general_operand" "r")] 3928))]"CGEN_ENABLE_INSN_P (823)""sub\\t%1,%2"[(set_attr "may_trap" "no")(set_attr "latency" "0")(set_attr "length" "2")(set_attr "slot" "core")(set_attr "slots" "core")(set_attr "stall" "none")])(define_insn "cgen_intrinsic_advck3"[(set (match_operand:SI 0 "nonimmediate_operand" "=z")(unspec:SI [(match_operand:SI 1 "general_operand" "r")(match_operand:SI 2 "general_operand" "r")] 3930))]"CGEN_ENABLE_INSN_P (824)""advck3\\t$0,%1,%2"[(set_attr "may_trap" "no")(set_attr "latency" "0")(set_attr "length" "2")(set_attr "slot" "core")(set_attr "slots" "core")(set_attr "stall" "advck")])(define_insn "cgen_intrinsic_add3i"[(set (match_operand:SI 0 "nonimmediate_operand" "=r")(unspec:SI [(match_operand:SI 1 "cgen_h_uint_5a4_immediate" "")(reg:SI 15)] 3932))]"CGEN_ENABLE_INSN_P (825)""add3\\t%0,$sp,%1"[(set_attr "may_trap" "no")(set_attr "latency" "0")(set_attr "length" "2")(set_attr "slot" "core")(set_attr "slots" "core")(set_attr "stall" "none")])(define_insn "cgen_intrinsic_add"[(set (match_operand:SI 0 "nonimmediate_operand" "=r")(unspec:SI [(match_operand:SI 1 "general_operand" "0")(match_operand:SI 2 "cgen_h_sint_6a1_immediate" "")] 3934))]"CGEN_ENABLE_INSN_P (826)""add\\t%1,%2"[(set_attr "may_trap" "no")(set_attr "latency" "0")(set_attr "length" "2")(set_attr "slot" "core")(set_attr "slots" "core")(set_attr "stall" "none")])(define_insn "cgen_intrinsic_add3"[(set (match_operand:SI 0 "nonimmediate_operand" "=r")(unspec:SI [(match_operand:SI 1 "general_operand" "r")(match_operand:SI 2 "general_operand" "r")] 3936))]"CGEN_ENABLE_INSN_P (827)""add3\\t%0,%1,%2"[(set_attr "may_trap" "no")(set_attr "latency" "0")(set_attr "length" "2")(set_attr "slot" "core")(set_attr "slots" "core")(set_attr "stall" "none")])(define_insn "cgen_intrinsic_movh"[(set (match_operand:SI 0 "nonimmediate_operand" "=r")(unspec:SI [(match_operand:SI 1 "cgen_h_uint_16a1_immediate" "")] 3938))]"CGEN_ENABLE_INSN_P (828)""movh\\t%0,%1"[(set_attr "may_trap" "no")(set_attr "latency" "0")(set_attr "length" "4")(set_attr "slot" "core")(set_attr "slots" "core")(set_attr "stall" "none")])(define_insn "cgen_intrinsic_movu16"[(set (match_operand:SI 0 "nonimmediate_operand" "=r")(unspec:SI [(match_operand:SI 1 "cgen_h_uint_16a1_immediate" "")] 3940))]"CGEN_ENABLE_INSN_P (829)""movu\\t%0,%1"[(set_attr "may_trap" "no")(set_attr "latency" "0")(set_attr "length" "4")(set_attr "slot" "core")(set_attr "slots" "core")(set_attr "stall" "none")])(define_insn "cgen_intrinsic_movu24"[(set (match_operand:SI 0 "nonimmediate_operand" "=t")(unspec:SI [(match_operand:SI 1 "cgen_h_uint_24a1_immediate" "")] 3942))]"CGEN_ENABLE_INSN_P (830)""movu\\t%0,%1"[(set_attr "may_trap" "no")(set_attr "latency" "0")(set_attr "length" "4")(set_attr "slot" "core")(set_attr "slots" "core")(set_attr "stall" "none")])(define_insn "cgen_intrinsic_movi8"[(set (match_operand:SI 0 "nonimmediate_operand" "=r")(unspec:SI [(match_operand:SI 1 "cgen_h_sint_8a1_immediate" "")] 3946))]"CGEN_ENABLE_INSN_P (831)""mov\\t%0,%1"[(set_attr "may_trap" "no")(set_attr "latency" "0")(set_attr "length" "2")(set_attr "slot" "core")(set_attr "slots" "core")(set_attr "stall" "none")])(define_insn "cgen_intrinsic_movi16"[(set (match_operand:SI 0 "nonimmediate_operand" "=r")(unspec:SI [(match_operand:SI 1 "cgen_h_sint_16a1_immediate" "")] 3944))]"CGEN_ENABLE_INSN_P (832)""mov\\t%0,%1"[(set_attr "may_trap" "no")(set_attr "latency" "0")(set_attr "length" "4")(set_attr "slot" "core")(set_attr "slots" "core")(set_attr "stall" "none")])(define_insn "cgen_intrinsic_mov"[(set (match_operand:SI 0 "nonimmediate_operand" "=r")(unspec:SI [(match_operand:SI 1 "general_operand" "r")] 3948))]"CGEN_ENABLE_INSN_P (833)""mov\\t%0,%1"[(set_attr "may_trap" "no")(set_attr "latency" "0")(set_attr "length" "2")(set_attr "slot" "core")(set_attr "slots" "core")(set_attr "stall" "none")])(define_insn "cgen_intrinsic_ssarb"[(set (reg:SI 18)(unspec_volatile:SI [(match_operand:SI 0 "cgen_h_sint_2a1_immediate" "")(match_operand:SI 1 "general_operand" "r")] 3950))]"CGEN_ENABLE_INSN_P (834)""ssarb\\t%0(%1)"[(set_attr "may_trap" "no")(set_attr "latency" "0")(set_attr "length" "2")(set_attr "slot" "core")(set_attr "slots" "core")(set_attr "stall" "ssarb")])(define_insn "cgen_intrinsic_extuh"[(set (match_operand:SI 0 "nonimmediate_operand" "=r")(unspec:SI [(match_operand:SI 1 "general_operand" "0")] 3952))]"CGEN_ENABLE_INSN_P (835)""extuh\\t%1"[(set_attr "may_trap" "no")(set_attr "latency" "0")(set_attr "length" "2")(set_attr "slot" "core")(set_attr "slots" "core")(set_attr "stall" "none")])(define_insn "cgen_intrinsic_extub"[(set (match_operand:SI 0 "nonimmediate_operand" "=r")(unspec:SI [(match_operand:SI 1 "general_operand" "0")] 3954))]"CGEN_ENABLE_INSN_P (836)""extub\\t%1"[(set_attr "may_trap" "no")(set_attr "latency" "0")(set_attr "length" "2")(set_attr "slot" "core")(set_attr "slots" "core")(set_attr "stall" "none")])(define_insn "cgen_intrinsic_exth"[(set (match_operand:SI 0 "nonimmediate_operand" "=r")(unspec:SI [(match_operand:SI 1 "general_operand" "0")] 3956))]"CGEN_ENABLE_INSN_P (837)""exth\\t%1"[(set_attr "may_trap" "no")(set_attr "latency" "0")(set_attr "length" "2")(set_attr "slot" "core")(set_attr "slots" "core")(set_attr "stall" "none")])(define_insn "cgen_intrinsic_extb"[(set (match_operand:SI 0 "nonimmediate_operand" "=r")(unspec:SI [(match_operand:SI 1 "general_operand" "0")] 3958))]"CGEN_ENABLE_INSN_P (838)""extb\\t%1"[(set_attr "may_trap" "no")(set_attr "latency" "0")(set_attr "length" "2")(set_attr "slot" "core")(set_attr "slots" "core")(set_attr "stall" "none")])(define_insn "cgen_intrinsic_lw24"[(set (match_operand:SI 0 "nonimmediate_operand" "=r")(unspec:SI [(match_operand:SI 1 "cgen_h_uint_22a4_immediate" "")(mem:SI (scratch:SI))] 3960))]"CGEN_ENABLE_INSN_P (839)""lw\\t%0,(%1)"[(set_attr "may_trap" "no")(set_attr "latency" "2")(set_attr "length" "4")(set_attr "slot" "core")(set_attr "slots" "core")(set_attr "stall" "load")])(define_insn "cgen_intrinsic_sw24"[(set (mem:SI (scratch:SI))(unspec:SI [(match_operand:SI 0 "general_operand" "r")(match_operand:SI 1 "cgen_h_uint_22a4_immediate" "")] 3962))]"CGEN_ENABLE_INSN_P (840)""sw\\t%0,(%1)"[(set_attr "may_trap" "no")(set_attr "latency" "0")(set_attr "length" "4")(set_attr "slot" "core")(set_attr "slots" "core")(set_attr "stall" "store")])(define_insn "cgen_intrinsic_lhu16"[(set (match_operand:SI 0 "nonimmediate_operand" "=r")(unspec:SI [(match_operand:SI 1 "cgen_h_sint_16a1_immediate" "")(match_operand:SI 2 "general_operand" "r")(mem:SI (scratch:SI))] 3964))]"CGEN_ENABLE_INSN_P (841)""lhu\\t%0,%1(%2)"[(set_attr "may_trap" "no")(set_attr "latency" "2")(set_attr "length" "4")(set_attr "slot" "core")(set_attr "slots" "core")(set_attr "stall" "load")])(define_insn "cgen_intrinsic_lbu16"[(set (match_operand:SI 0 "nonimmediate_operand" "=r")(unspec:SI [(match_operand:SI 1 "cgen_h_sint_16a1_immediate" "")(match_operand:SI 2 "general_operand" "r")(mem:SI (scratch:SI))] 3966))]"CGEN_ENABLE_INSN_P (842)""lbu\\t%0,%1(%2)"[(set_attr "may_trap" "no")(set_attr "latency" "2")(set_attr "length" "4")(set_attr "slot" "core")(set_attr "slots" "core")(set_attr "stall" "load")])(define_insn "cgen_intrinsic_lw16"[(set (match_operand:SI 0 "nonimmediate_operand" "=r")(unspec:SI [(match_operand:SI 1 "cgen_h_sint_16a1_immediate" "")(match_operand:SI 2 "general_operand" "r")(mem:SI (scratch:SI))] 3968))]"CGEN_ENABLE_INSN_P (843)""lw\\t%0,%1(%2)"[(set_attr "may_trap" "no")(set_attr "latency" "2")(set_attr "length" "4")(set_attr "slot" "core")(set_attr "slots" "core")(set_attr "stall" "load")])(define_insn "cgen_intrinsic_lh16"[(set (match_operand:SI 0 "nonimmediate_operand" "=r")(unspec:SI [(match_operand:SI 1 "cgen_h_sint_16a1_immediate" "")(match_operand:SI 2 "general_operand" "r")(mem:SI (scratch:SI))] 3970))]"CGEN_ENABLE_INSN_P (844)""lh\\t%0,%1(%2)"[(set_attr "may_trap" "no")(set_attr "latency" "2")(set_attr "length" "4")(set_attr "slot" "core")(set_attr "slots" "core")(set_attr "stall" "load")])(define_insn "cgen_intrinsic_lb16"[(set (match_operand:SI 0 "nonimmediate_operand" "=r")(unspec:SI [(match_operand:SI 1 "cgen_h_sint_16a1_immediate" "")(match_operand:SI 2 "general_operand" "r")(mem:SI (scratch:SI))] 3972))]"CGEN_ENABLE_INSN_P (845)""lb\\t%0,%1(%2)"[(set_attr "may_trap" "no")(set_attr "latency" "2")(set_attr "length" "4")(set_attr "slot" "core")(set_attr "slots" "core")(set_attr "stall" "load")])(define_insn "cgen_intrinsic_sw16"[(set (mem:SI (scratch:SI))(unspec:SI [(match_operand:SI 0 "general_operand" "r")(match_operand:SI 1 "cgen_h_sint_16a1_immediate" "")(match_operand:SI 2 "general_operand" "r")] 3974))]"CGEN_ENABLE_INSN_P (846)""sw\\t%0,%1(%2)"[(set_attr "may_trap" "no")(set_attr "latency" "0")(set_attr "length" "4")(set_attr "slot" "core")(set_attr "slots" "core")(set_attr "stall" "store")])(define_insn "cgen_intrinsic_sh16"[(set (mem:SI (scratch:SI))(unspec:SI [(match_operand:SI 0 "general_operand" "r")(match_operand:SI 1 "cgen_h_sint_16a1_immediate" "")(match_operand:SI 2 "general_operand" "r")] 3976))]"CGEN_ENABLE_INSN_P (847)""sh\\t%0,%1(%2)"[(set_attr "may_trap" "no")(set_attr "latency" "0")(set_attr "length" "4")(set_attr "slot" "core")(set_attr "slots" "core")(set_attr "stall" "store")])(define_insn "cgen_intrinsic_sb16"[(set (mem:SI (scratch:SI))(unspec:SI [(match_operand:SI 0 "general_operand" "r")(match_operand:SI 1 "cgen_h_sint_16a1_immediate" "")(match_operand:SI 2 "general_operand" "r")] 3978))]"CGEN_ENABLE_INSN_P (848)""sb\\t%0,%1(%2)"[(set_attr "may_trap" "no")(set_attr "latency" "0")(set_attr "length" "4")(set_attr "slot" "core")(set_attr "slots" "core")(set_attr "stall" "store")])(define_insn "cgen_intrinsic_lhu_tp"[(set (match_operand:SI 0 "nonimmediate_operand" "=t")(unspec:SI [(match_operand:SI 1 "cgen_h_uint_6a2_immediate" "")(reg:SI 13)(mem:SI (scratch:SI))] 3980))]"CGEN_ENABLE_INSN_P (849)""lhu\\t%0,%1($tp)"[(set_attr "may_trap" "no")(set_attr "latency" "2")(set_attr "length" "2")(set_attr "slot" "core")(set_attr "slots" "core")(set_attr "stall" "load")])(define_insn "cgen_intrinsic_lbu_tp"[(set (match_operand:SI 0 "nonimmediate_operand" "=t")(unspec:SI [(match_operand:SI 1 "cgen_h_uint_7a1_immediate" "")(reg:SI 13)(mem:SI (scratch:SI))] 3982))]"CGEN_ENABLE_INSN_P (850)""lbu\\t%0,%1($tp)"[(set_attr "may_trap" "no")(set_attr "latency" "2")(set_attr "length" "2")(set_attr "slot" "core")(set_attr "slots" "core")(set_attr "stall" "load")])(define_insn "cgen_intrinsic_lw_tp"[(set (match_operand:SI 0 "nonimmediate_operand" "=t")(unspec:SI [(match_operand:SI 1 "cgen_h_uint_5a4_immediate" "")(reg:SI 13)(mem:SI (scratch:SI))] 3984))]"CGEN_ENABLE_INSN_P (851)""lw\\t%0,%1($tp)"[(set_attr "may_trap" "no")(set_attr "latency" "2")(set_attr "length" "2")(set_attr "slot" "core")(set_attr "slots" "core")(set_attr "stall" "load")])(define_insn "cgen_intrinsic_lh_tp"[(set (match_operand:SI 0 "nonimmediate_operand" "=t")(unspec:SI [(match_operand:SI 1 "cgen_h_uint_6a2_immediate" "")(reg:SI 13)(mem:SI (scratch:SI))] 3986))]"CGEN_ENABLE_INSN_P (852)""lh\\t%0,%1($tp)"[(set_attr "may_trap" "no")(set_attr "latency" "2")(set_attr "length" "2")(set_attr "slot" "core")(set_attr "slots" "core")(set_attr "stall" "load")])(define_insn "cgen_intrinsic_lb_tp"[(set (match_operand:SI 0 "nonimmediate_operand" "=t")(unspec:SI [(match_operand:SI 1 "cgen_h_uint_7a1_immediate" "")(reg:SI 13)(mem:SI (scratch:SI))] 3988))]"CGEN_ENABLE_INSN_P (853)""lb\\t%0,%1($tp)"[(set_attr "may_trap" "no")(set_attr "latency" "2")(set_attr "length" "2")(set_attr "slot" "core")(set_attr "slots" "core")(set_attr "stall" "load")])(define_insn "cgen_intrinsic_sw_tp"[(set (mem:SI (scratch:SI))(unspec:SI [(match_operand:SI 0 "general_operand" "t")(match_operand:SI 1 "cgen_h_uint_5a4_immediate" "")(reg:SI 13)] 3990))]"CGEN_ENABLE_INSN_P (854)""sw\\t%0,%1($tp)"[(set_attr "may_trap" "no")(set_attr "latency" "0")(set_attr "length" "2")(set_attr "slot" "core")(set_attr "slots" "core")(set_attr "stall" "store")])(define_insn "cgen_intrinsic_sh_tp"[(set (mem:SI (scratch:SI))(unspec:SI [(match_operand:SI 0 "general_operand" "t")(match_operand:SI 1 "cgen_h_uint_6a2_immediate" "")(reg:SI 13)] 3992))]"CGEN_ENABLE_INSN_P (855)""sh\\t%0,%1($tp)"[(set_attr "may_trap" "no")(set_attr "latency" "0")(set_attr "length" "2")(set_attr "slot" "core")(set_attr "slots" "core")(set_attr "stall" "store")])(define_insn "cgen_intrinsic_sb_tp"[(set (mem:SI (scratch:SI))(unspec:SI [(match_operand:SI 0 "general_operand" "t")(match_operand:SI 1 "cgen_h_uint_7a1_immediate" "")(reg:SI 13)] 3994))]"CGEN_ENABLE_INSN_P (856)""sb\\t%0,%1($tp)"[(set_attr "may_trap" "no")(set_attr "latency" "0")(set_attr "length" "2")(set_attr "slot" "core")(set_attr "slots" "core")(set_attr "stall" "store")])(define_insn "cgen_intrinsic_lw_sp"[(set (match_operand:SI 0 "nonimmediate_operand" "=r")(unspec:SI [(match_operand:SI 1 "cgen_h_uint_5a4_immediate" "")(reg:SI 15)(mem:SI (scratch:SI))] 3996))]"CGEN_ENABLE_INSN_P (857)""lw\\t%0,%1($sp)"[(set_attr "may_trap" "no")(set_attr "latency" "2")(set_attr "length" "2")(set_attr "slot" "core")(set_attr "slots" "core")(set_attr "stall" "load")])(define_insn "cgen_intrinsic_sw_sp"[(set (mem:SI (scratch:SI))(unspec:SI [(match_operand:SI 0 "general_operand" "r")(match_operand:SI 1 "cgen_h_uint_5a4_immediate" "")(reg:SI 15)] 3998))]"CGEN_ENABLE_INSN_P (858)""sw\\t%0,%1($sp)"[(set_attr "may_trap" "no")(set_attr "latency" "0")(set_attr "length" "2")(set_attr "slot" "core")(set_attr "slots" "core")(set_attr "stall" "store")])(define_insn "cgen_intrinsic_lhu"[(set (match_operand:SI 0 "nonimmediate_operand" "=r")(unspec:SI [(match_operand:SI 1 "general_operand" "r")(mem:SI (scratch:SI))] 4000))]"CGEN_ENABLE_INSN_P (859)""lhu\\t%0,(%1)"[(set_attr "may_trap" "no")(set_attr "latency" "2")(set_attr "length" "2")(set_attr "slot" "core")(set_attr "slots" "core")(set_attr "stall" "load")])(define_insn "cgen_intrinsic_lbu"[(set (match_operand:SI 0 "nonimmediate_operand" "=r")(unspec:SI [(match_operand:SI 1 "general_operand" "r")(mem:SI (scratch:SI))] 4002))]"CGEN_ENABLE_INSN_P (860)""lbu\\t%0,(%1)"[(set_attr "may_trap" "no")(set_attr "latency" "2")(set_attr "length" "2")(set_attr "slot" "core")(set_attr "slots" "core")(set_attr "stall" "load")])(define_insn "cgen_intrinsic_lw"[(set (match_operand:SI 0 "nonimmediate_operand" "=r")(unspec:SI [(match_operand:SI 1 "general_operand" "r")(mem:SI (scratch:SI))] 4004))]"CGEN_ENABLE_INSN_P (861)""lw\\t%0,(%1)"[(set_attr "may_trap" "no")(set_attr "latency" "2")(set_attr "length" "2")(set_attr "slot" "core")(set_attr "slots" "core")(set_attr "stall" "load")])(define_insn "cgen_intrinsic_lh"[(set (match_operand:SI 0 "nonimmediate_operand" "=r")(unspec:SI [(match_operand:SI 1 "general_operand" "r")(mem:SI (scratch:SI))] 4006))]"CGEN_ENABLE_INSN_P (862)""lh\\t%0,(%1)"[(set_attr "may_trap" "no")(set_attr "latency" "2")(set_attr "length" "2")(set_attr "slot" "core")(set_attr "slots" "core")(set_attr "stall" "load")])(define_insn "cgen_intrinsic_lb"[(set (match_operand:SI 0 "nonimmediate_operand" "=r")(unspec:SI [(match_operand:SI 1 "general_operand" "r")(mem:SI (scratch:SI))] 4008))]"CGEN_ENABLE_INSN_P (863)""lb\\t%0,(%1)"[(set_attr "may_trap" "no")(set_attr "latency" "2")(set_attr "length" "2")(set_attr "slot" "core")(set_attr "slots" "core")(set_attr "stall" "load")])(define_insn "cgen_intrinsic_sw"[(set (mem:SI (scratch:SI))(unspec:SI [(match_operand:SI 0 "general_operand" "r")(match_operand:SI 1 "general_operand" "r")] 4010))]"CGEN_ENABLE_INSN_P (864)""sw\\t%0,(%1)"[(set_attr "may_trap" "no")(set_attr "latency" "0")(set_attr "length" "2")(set_attr "slot" "core")(set_attr "slots" "core")(set_attr "stall" "store")])(define_insn "cgen_intrinsic_sh"[(set (mem:SI (scratch:SI))(unspec:SI [(match_operand:SI 0 "general_operand" "r")(match_operand:SI 1 "general_operand" "r")] 4012))]"CGEN_ENABLE_INSN_P (865)""sh\\t%0,(%1)"[(set_attr "may_trap" "no")(set_attr "latency" "0")(set_attr "length" "2")(set_attr "slot" "core")(set_attr "slots" "core")(set_attr "stall" "store")])(define_insn "cgen_intrinsic_sb"[(set (mem:SI (scratch:SI))(unspec:SI [(match_operand:SI 0 "general_operand" "r")(match_operand:SI 1 "general_operand" "r")] 4014))]"CGEN_ENABLE_INSN_P (866)""sb\\t%0,(%1)"[(set_attr "may_trap" "no")(set_attr "latency" "0")(set_attr "length" "2")(set_attr "slot" "core")(set_attr "slots" "core")(set_attr "stall" "store")])(define_insn "cgen_intrinsic_dsp1"[(set (match_operand:SI 0 "nonimmediate_operand" "=r")(unspec_volatile:SI [(match_operand:SI 1 "general_operand" "0")(match_operand:SI 2 "cgen_h_uint_20a1_immediate" "")] 4016))]"CGEN_ENABLE_INSN_P (867)""dsp1\\t%1,%2"[(set_attr "may_trap" "no")(set_attr "latency" "0")(set_attr "length" "4")(set_attr "slot" "core")(set_attr "slots" "core")(set_attr "stall" "none")])(define_insn "cgen_intrinsic_dsp0"[(unspec_volatile [(match_operand:SI 0 "cgen_h_uint_24a1_immediate" "")] 4018)]"CGEN_ENABLE_INSN_P (868)""dsp0\\t%0"[(set_attr "may_trap" "no")(set_attr "latency" "0")(set_attr "length" "4")(set_attr "slot" "core")(set_attr "slots" "core")(set_attr "stall" "none")])(define_insn "cgen_intrinsic_dsp"[(set (match_operand:SI 0 "nonimmediate_operand" "=r")(unspec_volatile:SI [(match_operand:SI 1 "general_operand" "0")(match_operand:SI 2 "general_operand" "r")(match_operand:SI 3 "cgen_h_uint_16a1_immediate" "")] 4020))]"CGEN_ENABLE_INSN_P (869)""dsp\\t%1,%2,%3"[(set_attr "may_trap" "no")(set_attr "latency" "0")(set_attr "length" "4")(set_attr "slot" "core")(set_attr "slots" "core")(set_attr "stall" "none")])(define_insn "cgen_intrinsic_uci"[(set (match_operand:SI 0 "nonimmediate_operand" "=r")(unspec_volatile:SI [(match_operand:SI 1 "general_operand" "0")(match_operand:SI 2 "general_operand" "r")(match_operand:SI 3 "cgen_h_uint_16a1_immediate" "")] 4022))]"CGEN_ENABLE_INSN_P (870)""uci\\t%1,%2,%3"[(set_attr "may_trap" "no")(set_attr "latency" "0")(set_attr "length" "4")(set_attr "slot" "core")(set_attr "slots" "core")(set_attr "stall" "none")])(define_insn "cgen_intrinsic_lhucpm1"[(set (match_operand:SI 0 "nonimmediate_operand" "=em")(unspec:SI [(match_operand:SI 2 "general_operand" "1")(match_operand:SI 3 "cgen_h_sint_10a1_immediate" "")(reg:SI 31)(reg:SI 30)(mem:SI (scratch:SI))] 4024))(set (match_operand:SI 1 "nonimmediate_operand" "=r")(unspec:SI [(match_dup 2)(match_dup 3)(reg:SI 31)(reg:SI 30)(mem:SI (scratch:SI))] 4026))]"CGEN_ENABLE_INSN_P (871)""lhucpm1\\t%0,(%2+),%3"[(set_attr "may_trap" "no")(set_attr "latency" "0")(set_attr "length" "4")(set_attr "slot" "core")(set_attr "slots" "core")(set_attr "stall" "none")])(define_insn "cgen_intrinsic_lbucpm1"[(set (match_operand:SI 0 "nonimmediate_operand" "=em")(unspec:SI [(match_operand:SI 2 "general_operand" "1")(match_operand:SI 3 "cgen_h_sint_10a1_immediate" "")(reg:SI 31)(reg:SI 30)(mem:SI (scratch:SI))] 4028))(set (match_operand:SI 1 "nonimmediate_operand" "=r")(unspec:SI [(match_dup 2)(match_dup 3)(reg:SI 31)(reg:SI 30)(mem:SI (scratch:SI))] 4030))]"CGEN_ENABLE_INSN_P (872)""lbucpm1\\t%0,(%2+),%3"[(set_attr "may_trap" "no")(set_attr "latency" "0")(set_attr "length" "4")(set_attr "slot" "core")(set_attr "slots" "core")(set_attr "stall" "none")])(define_insn "cgen_intrinsic_lhucpm0"[(set (match_operand:SI 0 "nonimmediate_operand" "=em")(unspec:SI [(match_operand:SI 2 "general_operand" "1")(match_operand:SI 3 "cgen_h_sint_10a1_immediate" "")(reg:SI 29)(reg:SI 28)(mem:SI (scratch:SI))] 4032))(set (match_operand:SI 1 "nonimmediate_operand" "=r")(unspec:SI [(match_dup 2)(match_dup 3)(reg:SI 29)(reg:SI 28)(mem:SI (scratch:SI))] 4034))]"CGEN_ENABLE_INSN_P (873)""lhucpm0\\t%0,(%2+),%3"[(set_attr "may_trap" "no")(set_attr "latency" "0")(set_attr "length" "4")(set_attr "slot" "core")(set_attr "slots" "core")(set_attr "stall" "none")])(define_insn "cgen_intrinsic_lbucpm0"[(set (match_operand:SI 0 "nonimmediate_operand" "=em")(unspec:SI [(match_operand:SI 2 "general_operand" "1")(match_operand:SI 3 "cgen_h_sint_10a1_immediate" "")(reg:SI 29)(reg:SI 28)(mem:SI (scratch:SI))] 4036))(set (match_operand:SI 1 "nonimmediate_operand" "=r")(unspec:SI [(match_dup 2)(match_dup 3)(reg:SI 29)(reg:SI 28)(mem:SI (scratch:SI))] 4038))]"CGEN_ENABLE_INSN_P (874)""lbucpm0\\t%0,(%2+),%3"[(set_attr "may_trap" "no")(set_attr "latency" "0")(set_attr "length" "4")(set_attr "slot" "core")(set_attr "slots" "core")(set_attr "stall" "none")])(define_insn "cgen_intrinsic_lhucpa"[(set (match_operand:SI 0 "nonimmediate_operand" "=em")(unspec:SI [(match_operand:SI 2 "general_operand" "1")(match_operand:SI 3 "cgen_h_sint_10a1_immediate" "")(mem:SI (scratch:SI))] 4040))(set (match_operand:SI 1 "nonimmediate_operand" "=r")(unspec:SI [(match_dup 2)(match_dup 3)(mem:SI (scratch:SI))] 4042))]"CGEN_ENABLE_INSN_P (875)""lhucpa\\t%0,(%2+),%3"[(set_attr "may_trap" "no")(set_attr "latency" "0")(set_attr "length" "4")(set_attr "slot" "core")(set_attr "slots" "core")(set_attr "stall" "load")])(define_insn "cgen_intrinsic_lbucpa"[(set (match_operand:SI 0 "nonimmediate_operand" "=em")(unspec:SI [(match_operand:SI 2 "general_operand" "1")(match_operand:SI 3 "cgen_h_sint_10a1_immediate" "")(mem:SI (scratch:SI))] 4044))(set (match_operand:SI 1 "nonimmediate_operand" "=r")(unspec:SI [(match_dup 2)(match_dup 3)(mem:SI (scratch:SI))] 4046))]"CGEN_ENABLE_INSN_P (876)""lbucpa\\t%0,(%2+),%3"[(set_attr "may_trap" "no")(set_attr "latency" "0")(set_attr "length" "4")(set_attr "slot" "core")(set_attr "slots" "core")(set_attr "stall" "load")])(define_insn "cgen_intrinsic_lhucp"[(set (match_operand:SI 0 "nonimmediate_operand" "=em")(unspec:SI [(match_operand:SI 1 "cgen_h_sint_12a1_immediate" "")(match_operand:SI 2 "general_operand" "r")(mem:SI (scratch:SI))] 4048))]"CGEN_ENABLE_INSN_P (877)""lhucp\\t%0,%1(%2)"[(set_attr "may_trap" "no")(set_attr "latency" "0")(set_attr "length" "4")(set_attr "slot" "core")(set_attr "slots" "core")(set_attr "stall" "store")])(define_insn "cgen_intrinsic_lhcp"[(set (match_operand:SI 0 "nonimmediate_operand" "=em")(unspec:SI [(match_operand:SI 1 "cgen_h_sint_12a1_immediate" "")(match_operand:SI 2 "general_operand" "r")(mem:SI (scratch:SI))] 4050))]"CGEN_ENABLE_INSN_P (878)""lhcp\\t%0,%1(%2)"[(set_attr "may_trap" "no")(set_attr "latency" "0")(set_attr "length" "4")(set_attr "slot" "core")(set_attr "slots" "core")(set_attr "stall" "store")])(define_insn "cgen_intrinsic_shcp"[(set (mem:SI (scratch:SI))(unspec:SI [(match_operand:SI 0 "general_operand" "em")(match_operand:SI 1 "cgen_h_sint_12a1_immediate" "")(match_operand:SI 2 "general_operand" "r")] 4052))]"CGEN_ENABLE_INSN_P (879)""shcp\\t%0,%1(%2)"[(set_attr "may_trap" "no")(set_attr "latency" "0")(set_attr "length" "4")(set_attr "slot" "core")(set_attr "slots" "core")(set_attr "stall" "store")])(define_insn "cgen_intrinsic_lbucp"[(set (match_operand:SI 0 "nonimmediate_operand" "=em")(unspec:SI [(match_operand:SI 1 "cgen_h_sint_12a1_immediate" "")(match_operand:SI 2 "general_operand" "r")(mem:SI (scratch:SI))] 4054))]"CGEN_ENABLE_INSN_P (880)""lbucp\\t%0,%1(%2)"[(set_attr "may_trap" "no")(set_attr "latency" "0")(set_attr "length" "4")(set_attr "slot" "core")(set_attr "slots" "core")(set_attr "stall" "store")])(define_insn "cgen_intrinsic_lbcp"[(set (match_operand:SI 0 "nonimmediate_operand" "=em")(unspec:SI [(match_operand:SI 1 "cgen_h_sint_12a1_immediate" "")(match_operand:SI 2 "general_operand" "r")(mem:SI (scratch:SI))] 4056))]"CGEN_ENABLE_INSN_P (881)""lbcp\\t%0,%1(%2)"[(set_attr "may_trap" "no")(set_attr "latency" "0")(set_attr "length" "4")(set_attr "slot" "core")(set_attr "slots" "core")(set_attr "stall" "store")])(define_insn "cgen_intrinsic_sbcp"[(set (mem:SI (scratch:SI))(unspec:SI [(match_operand:SI 0 "general_operand" "em")(match_operand:SI 1 "cgen_h_sint_12a1_immediate" "")(match_operand:SI 2 "general_operand" "r")] 4058))]"CGEN_ENABLE_INSN_P (882)""sbcp\\t%0,%1(%2)"[(set_attr "may_trap" "no")(set_attr "latency" "0")(set_attr "length" "4")(set_attr "slot" "core")(set_attr "slots" "core")(set_attr "stall" "store")])(define_insn "cgen_intrinsic_casw3"[(set (match_operand:SI 0 "nonimmediate_operand" "=r")(unspec_volatile:SI [(match_operand:SI 1 "general_operand" "0")(match_operand:SI 2 "general_operand" "r")(match_operand:SI 3 "general_operand" "r")] 4060))]"CGEN_ENABLE_INSN_P (883)""casw3\\t%1,%2,(%3)"[(set_attr "may_trap" "no")(set_attr "latency" "0")(set_attr "length" "4")(set_attr "slot" "core")(set_attr "slots" "core")(set_attr "stall" "none")])(define_insn "cgen_intrinsic_cash3"[(set (match_operand:SI 0 "nonimmediate_operand" "=r")(unspec_volatile:SI [(match_operand:SI 1 "general_operand" "0")(match_operand:SI 2 "general_operand" "r")(match_operand:SI 3 "general_operand" "r")] 4062))]"CGEN_ENABLE_INSN_P (884)""cash3\\t%1,%2,(%3)"[(set_attr "may_trap" "no")(set_attr "latency" "0")(set_attr "length" "4")(set_attr "slot" "core")(set_attr "slots" "core")(set_attr "stall" "none")])(define_insn "cgen_intrinsic_casb3"[(set (match_operand:SI 0 "nonimmediate_operand" "=r")(unspec_volatile:SI [(match_operand:SI 1 "general_operand" "0")(match_operand:SI 2 "general_operand" "r")(match_operand:SI 3 "general_operand" "r")] 4064))]"CGEN_ENABLE_INSN_P (885)""casb3\\t%1,%2,(%3)"[(set_attr "may_trap" "no")(set_attr "latency" "0")(set_attr "length" "4")(set_attr "slot" "core")(set_attr "slots" "core")(set_attr "stall" "none")])(define_insn "cgen_intrinsic_prefd"[(unspec_volatile [(match_operand:SI 0 "cgen_h_uint_4a1_immediate" "")(match_operand:SI 1 "cgen_h_sint_16a1_immediate" "")(match_operand:SI 2 "general_operand" "r")] 4066)]"CGEN_ENABLE_INSN_P (886)""pref\\t%0,%1(%2)"[(set_attr "may_trap" "no")(set_attr "latency" "0")(set_attr "length" "4")(set_attr "slot" "core")(set_attr "slots" "core")(set_attr "stall" "none")])(define_insn "cgen_intrinsic_pref"[(unspec_volatile [(match_operand:SI 0 "cgen_h_uint_4a1_immediate" "")(match_operand:SI 1 "general_operand" "r")] 4068)]"CGEN_ENABLE_INSN_P (887)""pref\\t%0,(%1)"[(set_attr "may_trap" "no")(set_attr "latency" "0")(set_attr "length" "2")(set_attr "slot" "core")(set_attr "slots" "core")(set_attr "stall" "none")])(define_insn "cgen_intrinsic_ldcb_r"[(set (match_operand:SI 0 "nonimmediate_operand" "=r")(unspec_volatile:SI [(match_operand:SI 1 "general_operand" "r")] 4070))]"CGEN_ENABLE_INSN_P (888)""ldcb\\t%0,(%1)"[(set_attr "may_trap" "no")(set_attr "latency" "3")(set_attr "length" "2")(set_attr "slot" "core")(set_attr "slots" "core")(set_attr "stall" "none")])(define_insn "cgen_intrinsic_stcb_r"[(unspec_volatile [(match_operand:SI 0 "general_operand" "r")(match_operand:SI 1 "general_operand" "r")] 4072)]"CGEN_ENABLE_INSN_P (889)""stcb\\t%0,(%1)"[(set_attr "may_trap" "no")(set_attr "latency" "0")(set_attr "length" "2")(set_attr "slot" "core")(set_attr "slots" "core")(set_attr "stall" "none")])
Go to most recent revision | Compare with Previous | Blame | View Log