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[/] [openrisc/] [trunk/] [gnu-dev/] [or1k-gcc/] [gcc/] [config/] [score/] [score.opt] - Rev 806

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; Options for the Sunnorth port of the compiler.

; Copyright (C) 2005, 2007, 2010, 2011 Free Software Foundation, Inc.
;
; This file is part of GCC.
;
; GCC is free software; you can redistribute it and/or modify it under
; the terms of the GNU General Public License as published by the Free
; Software Foundation; either version 3, or (at your option) any later
; version.
;
; GCC is distributed in the hope that it will be useful, but WITHOUT ANY
; WARRANTY; without even the implied warranty of MERCHANTABILITY or
; FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License
; for more details.
;
; You should have received a copy of the GNU General Public License
; along with GCC; see the file COPYING3.  If not see
; <http://www.gnu.org/licenses/>.

meb
Target RejectNegative Report InverseMask(LITTLE_ENDIAN)
Generate big-endian code

mel
Target RejectNegative Report Mask(LITTLE_ENDIAN)
Generate little-endian code

mnhwloop
Target RejectNegative Report Mask(NHWLOOP)
Disable bcnz instruction

muls
Target RejectNegative Report Mask(ULS)
Enable unaligned load/store instruction

mscore7
Target RejectNegative Report Mask(SCORE7)
Support SCORE 7 ISA

mscore7d
Target RejectNegative Report Mask(SCORE7D)
Support SCORE 7D ISA

march=
Target RejectNegative Joined Enum(score_arch)
Specify the name of the target architecture

Enum
Name(score_arch) Type(int)
Known SCORE architectures (for use with the -march= option):

EnumValue
Enum(score_arch) String(score7) Value(MASK_SCORE7)

EnumValue
Enum(score_arch) String(score7d) Value(MASK_SCORE7 | MASK_SCORE7D)

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