URL
https://opencores.org/ocsvn/openrisc/openrisc/trunk
Subversion Repositories openrisc
[/] [openrisc/] [trunk/] [gnu-dev/] [or1k-gcc/] [gcc/] [config/] [sparc/] [sparc.opt] - Rev 867
Go to most recent revision | Compare with Previous | Blame | View Log
; Options for the SPARC port of the compiler
;
; Copyright (C) 2005, 2007, 2010, 2011 Free Software Foundation, Inc.
;
; This file is part of GCC.
;
; GCC is free software; you can redistribute it and/or modify it under
; the terms of the GNU General Public License as published by the Free
; Software Foundation; either version 3, or (at your option) any later
; version.
;
; GCC is distributed in the hope that it will be useful, but WITHOUT
; ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
; or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public
; License for more details.
;
; You should have received a copy of the GNU General Public License
; along with GCC; see the file COPYING3. If not see
; <http://www.gnu.org/licenses/>.
HeaderInclude
config/sparc/sparc-opts.h
;; Debug flags
TargetVariable
unsigned int sparc_debug
mfpu
Target Report Mask(FPU)
Use hardware FP
mhard-float
Target RejectNegative Mask(FPU) MaskExists
Use hardware FP
msoft-float
Target RejectNegative InverseMask(FPU)
Do not use hardware FP
mflat
Target Report Mask(FLAT)
Use flat register window model
munaligned-doubles
Target Report Mask(UNALIGNED_DOUBLES)
Assume possible double misalignment
mapp-regs
Target Report Mask(APP_REGS)
Use ABI reserved registers
mhard-quad-float
Target Report RejectNegative Mask(HARD_QUAD)
Use hardware quad FP instructions
msoft-quad-float
Target Report RejectNegative InverseMask(HARD_QUAD)
Do not use hardware quad fp instructions
mv8plus
Target Report Mask(V8PLUS)
Compile for V8+ ABI
mvis
Target Report Mask(VIS)
Use UltraSPARC Visual Instruction Set version 1.0 extensions
mvis2
Target Report Mask(VIS2)
Use UltraSPARC Visual Instruction Set version 2.0 extensions
mvis3
Target Report Mask(VIS3)
Use UltraSPARC Visual Instruction Set version 3.0 extensions
mfmaf
Target Report Mask(FMAF)
Use UltraSPARC Fused Multiply-Add extensions
mpopc
Target Report Mask(POPC)
Use UltraSPARC Population-Count instruction
mptr64
Target Report RejectNegative Mask(PTR64)
Pointers are 64-bit
mptr32
Target Report RejectNegative InverseMask(PTR64)
Pointers are 32-bit
m64
Target Report RejectNegative Mask(64BIT)
Use 64-bit ABI
m32
Target Report RejectNegative InverseMask(64BIT)
Use 32-bit ABI
mstack-bias
Target Report Mask(STACK_BIAS)
Use stack bias
mfaster-structs
Target Report Mask(FASTER_STRUCTS)
Use structs on stronger alignment for double-word copies
mrelax
Target
Optimize tail call instructions in assembler and linker
mcpu=
Target RejectNegative Joined Var(sparc_cpu_and_features) Enum(sparc_processor_type) Init(PROCESSOR_V7)
Use features of and schedule code for given CPU
mtune=
Target RejectNegative Joined Var(sparc_cpu) Enum(sparc_processor_type) Init(PROCESSOR_V7)
Schedule code for given CPU
Enum
Name(sparc_processor_type) Type(enum processor_type)
EnumValue
Enum(sparc_processor_type) String(native) Value(PROCESSOR_NATIVE) DriverOnly
EnumValue
Enum(sparc_processor_type) String(v7) Value(PROCESSOR_V7)
EnumValue
Enum(sparc_processor_type) String(cypress) Value(PROCESSOR_CYPRESS)
EnumValue
Enum(sparc_processor_type) String(v8) Value(PROCESSOR_V8)
EnumValue
Enum(sparc_processor_type) String(supersparc) Value(PROCESSOR_SUPERSPARC)
EnumValue
Enum(sparc_processor_type) String(hypersparc) Value(PROCESSOR_HYPERSPARC)
EnumValue
Enum(sparc_processor_type) String(leon) Value(PROCESSOR_LEON)
EnumValue
Enum(sparc_processor_type) String(sparclite) Value(PROCESSOR_SPARCLITE)
EnumValue
Enum(sparc_processor_type) String(f930) Value(PROCESSOR_F930)
EnumValue
Enum(sparc_processor_type) String(f934) Value(PROCESSOR_F934)
EnumValue
Enum(sparc_processor_type) String(sparclite86x) Value(PROCESSOR_SPARCLITE86X)
EnumValue
Enum(sparc_processor_type) String(sparclet) Value(PROCESSOR_SPARCLET)
EnumValue
Enum(sparc_processor_type) String(tsc701) Value(PROCESSOR_TSC701)
EnumValue
Enum(sparc_processor_type) String(v9) Value(PROCESSOR_V9)
EnumValue
Enum(sparc_processor_type) String(ultrasparc) Value(PROCESSOR_ULTRASPARC)
EnumValue
Enum(sparc_processor_type) String(ultrasparc3) Value(PROCESSOR_ULTRASPARC3)
EnumValue
Enum(sparc_processor_type) String(niagara) Value(PROCESSOR_NIAGARA)
EnumValue
Enum(sparc_processor_type) String(niagara2) Value(PROCESSOR_NIAGARA2)
EnumValue
Enum(sparc_processor_type) String(niagara3) Value(PROCESSOR_NIAGARA3)
EnumValue
Enum(sparc_processor_type) String(niagara4) Value(PROCESSOR_NIAGARA4)
mcmodel=
Target RejectNegative Joined Var(sparc_cmodel_string)
Use given SPARC-V9 code model
mdebug=
Target RejectNegative Joined Var(sparc_debug_string)
Enable debug output
mstd-struct-return
Target Report RejectNegative Var(sparc_std_struct_return)
Enable strict 32-bit psABI struct return checking.
mfix-at697f
Target Report RejectNegative Var(sparc_fix_at697f)
Enable workaround for single erratum of AT697F processor
(corresponding to erratum #13 of AT697E processor)
Mask(LONG_DOUBLE_128)
;; Use 128-bit long double
Mask(SPARCLITE)
;; Generate code for SPARClite
Mask(SPARCLET)
;; Generate code for SPARClet
Mask(V8)
;; Generate code for SPARC-V8
Mask(V9)
;; Generate code for SPARC-V9
Mask(DEPRECATED_V8_INSNS)
;; Generate code that uses the V8 instructions deprecated
;; in the V9 architecture.
mmemory-model=
Target RejectNegative Joined Var(sparc_memory_model) Enum(sparc_memory_model) Init(SMM_DEFAULT)
Specify the memory model in effect for the program.
Enum
Name(sparc_memory_model) Type(enum sparc_memory_model_type)
EnumValue
Enum(sparc_memory_model) String(default) Value(SMM_DEFAULT)
EnumValue
Enum(sparc_memory_model) String(rmo) Value(SMM_RMO)
EnumValue
Enum(sparc_memory_model) String(pso) Value(SMM_PSO)
EnumValue
Enum(sparc_memory_model) String(tso) Value(SMM_TSO)
EnumValue
Enum(sparc_memory_model) String(sc) Value(SMM_SC)
Go to most recent revision | Compare with Previous | Blame | View Log