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/* This file contains definitions for the register renamer.
   Copyright (C) 2011
   Free Software Foundation, Inc.
 
This file is part of GCC.
 
GCC is free software; you can redistribute it and/or modify it under
the terms of the GNU General Public License as published by the Free
Software Foundation; either version 3, or (at your option) any later
version.
 
GCC is distributed in the hope that it will be useful, but WITHOUT ANY
WARRANTY; without even the implied warranty of MERCHANTABILITY or
FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License
for more details.
 
You should have received a copy of the GNU General Public License
along with GCC; see the file COPYING3.  If not see
<http://www.gnu.org/licenses/>.  */
 
#ifndef GCC_REGRENAME_H
#define GCC_REGRENAME_H
 
/* We keep linked lists of DU_HEAD structures, each of which describes
   a chain of occurrences of a reg.  */
struct du_head
{
  /* The next chain.  */
  struct du_head *next_chain;
  /* The first and last elements of this chain.  */
  struct du_chain *first, *last;
  /* Describes the register being tracked.  */
  unsigned regno;
  int nregs;
 
  /* A unique id to be used as an index into the conflicts bitmaps.  */
  unsigned id;
  /* A bitmap to record conflicts with other chains.  */
  bitmap_head conflicts;
  /* Conflicts with untracked hard registers.  */
  HARD_REG_SET hard_conflicts;
 
  /* Nonzero if the chain crosses a call.  */
  unsigned int need_caller_save_reg:1;
  /* Nonzero if the register is used in a way that prevents renaming,
     such as the SET_DEST of a CALL_INSN or an asm operand that used
     to be a hard register.  */
  unsigned int cannot_rename:1;
};
 
typedef struct du_head *du_head_p;
DEF_VEC_P (du_head_p);
DEF_VEC_ALLOC_P (du_head_p, heap);
 
/* This struct describes a single occurrence of a register.  */
struct du_chain
{
  /* Links to the next occurrence of the register.  */
  struct du_chain *next_use;
 
  /* The insn where the register appears.  */
  rtx insn;
  /* The location inside the insn.  */
  rtx *loc;
  /* The register class required by the insn at this location.  */
  ENUM_BITFIELD(reg_class) cl : 16;
};
 
/* This struct describes data gathered during regrename_analyze about
   a single operand of an insn.  */
typedef struct
{
  /* The number of chains recorded for this operand.  */
  int n_chains;
  /* Holds either the chain for the operand itself, or for the registers in
     a memory operand.  */
  struct du_chain *chains[MAX_REGS_PER_ADDRESS];
  struct du_head *heads[MAX_REGS_PER_ADDRESS];
} operand_rr_info;
 
/* A struct to hold a vector of operand_rr_info structures describing the
   operands of an insn.  */
typedef struct
{
  operand_rr_info *op_info;
} insn_rr_info;
 
DEF_VEC_O (insn_rr_info);
DEF_VEC_ALLOC_O (insn_rr_info, heap);
 
extern VEC(insn_rr_info, heap) *insn_rr;
 
extern void regrename_init (bool);
extern void regrename_finish (void);
extern void regrename_analyze (bitmap);
extern du_head_p regrename_chain_from_id (unsigned int);
extern int find_best_rename_reg (du_head_p, enum reg_class, HARD_REG_SET *,
				 int);
extern void regrename_do_replace (du_head_p, int);
 
#endif