OpenCores
URL https://opencores.org/ocsvn/openrisc/openrisc/trunk

Subversion Repositories openrisc

[/] [openrisc/] [trunk/] [gnu-dev/] [or1k-gcc/] [gcc/] [testsuite/] [gcc.c-torture/] [compile/] [20010112-1.c] - Rev 801

Go to most recent revision | Compare with Previous | Blame | View Log

/* Test that putting an initialized variable in a register works. */
 
#ifdef __i386__
#define REGISTER asm ("eax")
#elif defined (__arm__)
#define REGISTER asm ("r0")
#else
/* Put examples for other architectures here. */
#define REGISTER
#endif
 
void f() {
  register int i REGISTER = 3;
}
 

Go to most recent revision | Compare with Previous | Blame | View Log

powered by: WebSVN 2.1.0

© copyright 1999-2024 OpenCores.org, equivalent to Oliscience, all rights reserved. OpenCores®, registered trademark.