URL
https://opencores.org/ocsvn/openrisc/openrisc/trunk
Subversion Repositories openrisc
[/] [openrisc/] [trunk/] [gnu-dev/] [or1k-gcc/] [gcc/] [testsuite/] [gcc.target/] [i386/] [pr27266.c] - Rev 704
Go to most recent revision | Compare with Previous | Blame | View Log
/* PR target/27266. The testcase below used to trigger an ICE. */ /* { dg-do compile } */ /* { dg-require-effective-target ia32 } */ /* { dg-options "-march=pentium" } */ signed long long sll; void foo (void) { __sync_fetch_and_add (&sll, 1); }
Go to most recent revision | Compare with Previous | Blame | View Log