OpenCores
URL https://opencores.org/ocsvn/openrisc/openrisc/trunk

Subversion Repositories openrisc

[/] [openrisc/] [trunk/] [gnu-dev/] [or1k-gcc/] [gcc/] [testsuite/] [gcc.target/] [m68k/] [pr36133.c] - Rev 764

Go to most recent revision | Compare with Previous | Blame | View Log

/* pr36133.c
 
   This test ensures that conditional branches can use the condition codes
   written by shift instructions, without the need for an extra TST.  */
 
/* { dg-do compile }  */
/* { dg-options "-O2" }  */
/* { dg-final { scan-assembler-not "tst" } } */
 
void
f (unsigned int a)
{
  if (a >> 4)
    asm volatile ("nop");
  asm volatile ("nop");
}
 

Go to most recent revision | Compare with Previous | Blame | View Log

powered by: WebSVN 2.1.0

© copyright 1999-2024 OpenCores.org, equivalent to Oliscience, all rights reserved. OpenCores®, registered trademark.