OpenCores
URL https://opencores.org/ocsvn/openrisc/openrisc/trunk

Subversion Repositories openrisc

[/] [openrisc/] [trunk/] [gnu-dev/] [or1k-gcc/] [gcc/] [testsuite/] [gcc.target/] [powerpc/] [20040622-1.c] - Rev 696

Go to most recent revision | Compare with Previous | Blame | View Log

/* { dg-options "-Os -mlong-double-128" } */
/* { dg-do compile { target { { rs6000-*-* } || { powerpc*-*-* && lp64 } } } } */
/* Make sure compiler doesn't generate [reg+reg] address mode
   for long doubles. */
union arg {
  int intarg;
  long double longdoublearg;
};
long double d;
int va(int n, union arg **argtable)
{
  (*argtable)[n].longdoublearg = d;
}
 

Go to most recent revision | Compare with Previous | Blame | View Log

powered by: WebSVN 2.1.0

© copyright 1999-2024 OpenCores.org, equivalent to Oliscience, all rights reserved. OpenCores®, registered trademark.