OpenCores
URL https://opencores.org/ocsvn/openrisc/openrisc/trunk

Subversion Repositories openrisc

[/] [openrisc/] [trunk/] [gnu-dev/] [or1k-gcc/] [gcc/] [testsuite/] [gcc.target/] [powerpc/] [altivec-20.c] - Rev 801

Go to most recent revision | Compare with Previous | Blame | View Log

/* { dg-do compile { target powerpc_altivec_ok } } */
/* { dg-options "-maltivec -mcpu=G5 -O2" } */
 
#include <altivec.h>
 
void foo( float scalar)
{
    unsigned long width;
    unsigned long x;
    vector float vColor;
    vector unsigned int selectMask;
    vColor = vec_perm( vec_ld( 0, &scalar), vec_ld( 3, &scalar), vec_lvsl( 0, &scalar) );
 
    float *destRow;
    vector float store, load0;
 
    for( ; x < width; x++)
    {
            load0 = vec_sel( vColor, load0, selectMask );
            vec_st( store, 0, destRow );
            store = load0;
    }
}
 

Go to most recent revision | Compare with Previous | Blame | View Log

powered by: WebSVN 2.1.0

© copyright 1999-2024 OpenCores.org, equivalent to Oliscience, all rights reserved. OpenCores®, registered trademark.