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https://opencores.org/ocsvn/openrisc/openrisc/trunk
Subversion Repositories openrisc
[/] [openrisc/] [trunk/] [gnu-old/] [binutils-2.18.50/] [gas/] [testsuite/] [gas/] [h8300/] [h8sx_disp2.d] - Rev 856
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# objdump: -d
.*: *file format elf32-h8300
Disassembly of section \.text:
0+00 <\.text>:
.*: 01 75 68 08.*add.b #0x2,@\(0x1:2,er0\)
.*: 80 02
.*: 01 76 68 08.*add.b #0x2,@\(0x2:2,er0\)
.*: 80 02
.*: 01 77 68 08.*add.b #0x2,@\(0x3:2,er0\)
.*: 80 02
.*: 01 74 6e 08.*add.b #0x2,@\(0x4:16,er0\)
.*: 00 04 80 02
.*: 78 04 6a 28.*add.b #0x2,@\(0x0:32,er0\)
.*: 00 00 00 00
.*: 80 02
.*: 01 5e c0 10.*add.w #0x2,@\(0x1:16,er0\)
.*: 00 01 00 02
.*: 01 5e 10 10.*add.w #0x2,@\(0x2:2,er0\)
.*: 00 02
.*: 01 5e 20 10.*add.w #0x2,@\(0x4:2,er0\)
.*: 00 02
.*: 01 5e 30 10.*add.w #0x2,@\(0x6:2,er0\)
.*: 00 02
.*: 01 5e c0 10.*add.w #0x2,@\(0x8:16,er0\)
.*: 00 08 00 02
.*: 01 5e c8 10.*add.w #0x2,@\(0x0:32,er0\)
.*: 00 00 00 00
.*: 00 02
.*: 01 0e c0 10.*add.l #0x2,@\(0x1:16,er0\)
.*: 00 01 00 02
.*: 01 0e c0 10.*add.l #0x2,@\(0x2:16,er0\)
.*: 00 02 00 02
.*: 01 0e 10 10.*add.l #0x2,@\(0x4:2,er0\)
.*: 00 02
.*: 01 0e 20 10.*add.l #0x2,@\(0x8:2,er0\)
.*: 00 02
.*: 01 0e 30 10.*add.l #0x2,@\(0xc:2,er0\)
.*: 00 02
.*: 01 0e c0 10.*add.l #0x2,@\(0x10:16,er0\)
.*: 00 10 00 02
.*: 01 0e c8 10.*add.l #0x2,@\(0x0:32,er0\)
.*: 00 00 00 00
.*: 00 02
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