OpenCores
URL https://opencores.org/ocsvn/openrisc/openrisc/trunk

Subversion Repositories openrisc

[/] [openrisc/] [trunk/] [gnu-old/] [binutils-2.18.50/] [gas/] [testsuite/] [gas/] [i386/] [svme.d] - Rev 856

Go to most recent revision | Compare with Previous | Blame | View Log

#objdump: -dw
#name: 32-bit SVME

.*: +file format .*

Disassembly of section .text:

0+000 <common>:
[        ]*[0-9a-f]+:[   ]+0f 01 dd[     ]+clgi[         ]*
[        ]*[0-9a-f]+:[   ]+0f 01 df[     ]+invlpga[      ]*
[        ]*[0-9a-f]+:[   ]+0f 01 de[     ]+skinit[       ]*
[        ]*[0-9a-f]+:[   ]+0f 01 dc[     ]+stgi[         ]*
[        ]*[0-9a-f]+:[   ]+0f 01 da[     ]+vmload[       ]*
[        ]*[0-9a-f]+:[   ]+0f 01 d9[     ]+vmmcall[      ]*
[        ]*[0-9a-f]+:[   ]+0f 01 d8[     ]+vmrun[        ]*
[        ]*[0-9a-f]+:[   ]+0f 01 db[     ]+vmsave[       ]*
[0-9a-f]+ <att32>:
[        ]*[0-9a-f]+:[   ]+0f 01 de[     ]+skinit[       ]*
[        ]*[0-9a-f]+:[   ]+0f 01 df[     ]+invlpga[      ]*
[        ]*[0-9a-f]+:[   ]+0f 01 da[     ]+vmload[       ]*
[        ]*[0-9a-f]+:[   ]+0f 01 d8[     ]+vmrun[        ]*
[        ]*[0-9a-f]+:[   ]+0f 01 db[     ]+vmsave[       ]*
[0-9a-f]+ <intel32>:
[        ]*[0-9a-f]+:[   ]+0f 01 de[     ]+skinit[       ]*
[        ]*[0-9a-f]+:[   ]+0f 01 df[     ]+invlpga[      ]*
[        ]*[0-9a-f]+:[   ]+0f 01 da[     ]+vmload[       ]*
[        ]*[0-9a-f]+:[   ]+0f 01 d8[     ]+vmrun[        ]*
[        ]*[0-9a-f]+:[   ]+0f 01 db[     ]+vmsave[       ]*
#pass

Go to most recent revision | Compare with Previous | Blame | View Log

powered by: WebSVN 2.1.0

© copyright 1999-2024 OpenCores.org, equivalent to Oliscience, all rights reserved. OpenCores®, registered trademark.