OpenCores
URL https://opencores.org/ocsvn/openrisc/openrisc/trunk

Subversion Repositories openrisc

[/] [openrisc/] [trunk/] [gnu-old/] [binutils-2.18.50/] [gas/] [testsuite/] [gas/] [mips/] [fpr-names-n32.d] - Rev 830

Go to most recent revision | Compare with Previous | Blame | View Log

#objdump: -dr --prefix-addresses --show-raw-insn -M gpr-names=numeric,fpr-names=n32
#name: MIPS FPR disassembly (n32)
#source: fpr-names.s

# Check objdump's handling of -M fpr-names=foo options.

.*: +file format .*mips.*

Disassembly of section .text:
0+0000 <[^>]*> 44800000         mtc1    \$0,fv0
0+0004 <[^>]*> 44800800         mtc1    \$0,ft14
0+0008 <[^>]*> 44801000         mtc1    \$0,fv1
0+000c <[^>]*> 44801800         mtc1    \$0,ft15
0+0010 <[^>]*> 44802000         mtc1    \$0,ft0
0+0014 <[^>]*> 44802800         mtc1    \$0,ft1
0+0018 <[^>]*> 44803000         mtc1    \$0,ft2
0+001c <[^>]*> 44803800         mtc1    \$0,ft3
0+0020 <[^>]*> 44804000         mtc1    \$0,ft4
0+0024 <[^>]*> 44804800         mtc1    \$0,ft5
0+0028 <[^>]*> 44805000         mtc1    \$0,ft6
0+002c <[^>]*> 44805800         mtc1    \$0,ft7
0+0030 <[^>]*> 44806000         mtc1    \$0,fa0
0+0034 <[^>]*> 44806800         mtc1    \$0,fa1
0+0038 <[^>]*> 44807000         mtc1    \$0,fa2
0+003c <[^>]*> 44807800         mtc1    \$0,fa3
0+0040 <[^>]*> 44808000         mtc1    \$0,fa4
0+0044 <[^>]*> 44808800         mtc1    \$0,fa5
0+0048 <[^>]*> 44809000         mtc1    \$0,fa6
0+004c <[^>]*> 44809800         mtc1    \$0,fa7
0+0050 <[^>]*> 4480a000         mtc1    \$0,fs0
0+0054 <[^>]*> 4480a800         mtc1    \$0,ft8
0+0058 <[^>]*> 4480b000         mtc1    \$0,fs1
0+005c <[^>]*> 4480b800         mtc1    \$0,ft9
0+0060 <[^>]*> 4480c000         mtc1    \$0,fs2
0+0064 <[^>]*> 4480c800         mtc1    \$0,ft10
0+0068 <[^>]*> 4480d000         mtc1    \$0,fs3
0+006c <[^>]*> 4480d800         mtc1    \$0,ft11
0+0070 <[^>]*> 4480e000         mtc1    \$0,fs4
0+0074 <[^>]*> 4480e800         mtc1    \$0,ft12
0+0078 <[^>]*> 4480f000         mtc1    \$0,fs5
0+007c <[^>]*> 4480f800         mtc1    \$0,ft13
        \.\.\.

Go to most recent revision | Compare with Previous | Blame | View Log

powered by: WebSVN 2.1.0

© copyright 1999-2024 OpenCores.org, equivalent to Oliscience, all rights reserved. OpenCores®, registered trademark.