OpenCores
URL https://opencores.org/ocsvn/openrisc/openrisc/trunk

Subversion Repositories openrisc

[/] [openrisc/] [trunk/] [gnu-old/] [binutils-2.18.50/] [gas/] [testsuite/] [gas/] [mn10300/] [am33_2.s] - Rev 38

Go to most recent revision | Compare with Previous | Blame | View Log

	.text
	.am33
	mov r0,r1
	ext r2
	extb r3,r4
	extbu r4,r5
	exth r6,r7
	exthu r7,r8
	clr r9
	add r10,r11
	addc r12,r13
	sub r14,r15
	subc r15,r14
	inc r13
	inc4 r12
	cmp r11,r10
	mov xr0, r1
	mov r1, xr2
	and r0,r1
	or r2,r3
	xor r4,r5
	not r6
	asr r7,r8
	lsr r9,r10
	asl r11,r12
	asl2 r13
	ror r14
	rol r15
	mul r1,r2
	mulu r3,r4
	div r5,r6
	divu r7,r8
	mov (r1),r2
	mov r3,(r4)
	movbu (r5),r6
	movbu r7,(r8)
	movhu (r9),r10
	movhu r11,(r12)
	mov (r1+),r2
	mov r3,(r4+)
	mov (sp),r5
	mov r6,(sp)
	movbu (sp),r7
	movbu r8,(sp)
	movhu (sp),r9
	movhu r10,(sp)
	movhu (r6+),r7
	movhu r8,(r9+)
	mac r1,r2
	macu r3,r4
	macb r5,r6
	macbu r7,r8
	mach r9,r10
	machu r11,r12
	dmach r13,r14
	dmachu r15,r14
	dmulh r13,r12
	dmulhu r11,r10
	sat16 r9,r8
	mcste r7,r6
	swap r5,r4
	swaph r3,r2
	swhw  r1,r0
	bsch r1,r2
 

Go to most recent revision | Compare with Previous | Blame | View Log

powered by: WebSVN 2.1.0

© copyright 1999-2024 OpenCores.org, equivalent to Oliscience, all rights reserved. OpenCores®, registered trademark.