OpenCores
URL https://opencores.org/ocsvn/openrisc/openrisc/trunk

Subversion Repositories openrisc

[/] [openrisc/] [trunk/] [gnu-old/] [binutils-2.18.50/] [ld/] [testsuite/] [ld-sparc/] [tlssunnopic32.dd] - Rev 856

Go to most recent revision | Compare with Previous | Blame | View Log

#source: tlssunnopic32.s
#source: tlsnopic.s
#as: --32
#ld: -shared -melf32_sparc
#objdump: -drj.text
#target: sparc*-*-*

.*: +file format elf32-sparc

Disassembly of section .text:

00001000 <fn3>:
 +1000: 9d e3 bf 98     save  %sp, -104, %sp
 +1004: 23 00 00 00     sethi  %hi\(0\), %l1
 +1008: a2 14 60 00     mov  %l1, %l1   ! 0 <.*>
 +100c: 01 00 00 00     nop *
 +1010: 01 00 00 00     nop *
 +1014: 01 00 00 00     nop *
 +1018: 01 00 00 00     nop *
 +101c: 17 00 00 00     sethi  %hi\(0\), %o3
 +1020: 96 02 e0 0c     add  %o3, 0xc, %o3      ! c <.*>
 +1024: d4 04 40 0b     ld  \[ %l1 \+ %o3 \], %o2
 +1028: 98 01 c0 0a     add  %g7, %o2, %o4
 +102c: 01 00 00 00     nop *
 +1030: 01 00 00 00     nop *
 +1034: 01 00 00 00     nop *
 +1038: 01 00 00 00     nop *
 +103c: 11 00 00 00     sethi  %hi\(0\), %o0
 +1040: 90 02 20 10     add  %o0, 0x10, %o0     ! 10 <.*>
 +1044: d0 04 40 08     ld  \[ %l1 \+ %o0 \], %o0
 +1048: d0 01 c0 08     ld  \[ %g7 \+ %o0 \], %o0
 +104c: 01 00 00 00     nop *
 +1050: 01 00 00 00     nop *
 +1054: 01 00 00 00     nop *
 +1058: 01 00 00 00     nop *
 +105c: 11 00 00 00     sethi  %hi\(0\), %o0
 +1060: 90 02 20 14     add  %o0, 0x14, %o0     ! 14 <.*>
 +1064: d0 04 40 08     ld  \[ %l1 \+ %o0 \], %o0
 +1068: 90 01 c0 08     add  %g7, %o0, %o0
 +106c: 01 00 00 00     nop *
 +1070: 01 00 00 00     nop *
 +1074: 01 00 00 00     nop *
 +1078: 01 00 00 00     nop *
 +107c: 1b 00 00 00     sethi  %hi\(0\), %o5
 +1080: 92 03 60 18     add  %o5, 0x18, %o1     ! 18 <.*>
 +1084: d4 04 40 09     ld  \[ %l1 \+ %o1 \], %o2
 +1088: d6 29 c0 0a     stb  %o3, \[ %g7 \+ %o2 \]
 +108c: 01 00 00 00     nop *
 +1090: 01 00 00 00     nop *
 +1094: 01 00 00 00     nop *
 +1098: 01 00 00 00     nop *
 +109c: 11 00 00 00     sethi  %hi\(0\), %o0
 +10a0: 90 02 20 04     add  %o0, 4, %o0        ! 4 <.*>
 +10a4: d0 04 40 08     ld  \[ %l1 \+ %o0 \], %o0
 +10a8: 90 01 c0 08     add  %g7, %o0, %o0
 +10ac: 01 00 00 00     nop *
 +10b0: 01 00 00 00     nop *
 +10b4: 01 00 00 00     nop *
 +10b8: 01 00 00 00     nop *
 +10bc: 1b 00 00 00     sethi  %hi\(0\), %o5
 +10c0: 92 03 60 08     add  %o5, 8, %o1        ! 8 <.*>
 +10c4: d4 04 40 09     ld  \[ %l1 \+ %o1 \], %o2
 +10c8: d6 29 c0 0a     stb  %o3, \[ %g7 \+ %o2 \]
 +10cc: 01 00 00 00     nop *
 +10d0: 01 00 00 00     nop *
 +10d4: 01 00 00 00     nop *
 +10d8: 01 00 00 00     nop *
 +10dc: 15 00 00 00     sethi  %hi\(0\), %o2
 +10e0: 98 1a a0 00     xor  %o2, 0, %o4
 +10e4: 90 01 c0 0c     add  %g7, %o4, %o0
 +10e8: 01 00 00 00     nop *
 +10ec: 01 00 00 00     nop *
 +10f0: 01 00 00 00     nop *
 +10f4: 01 00 00 00     nop *
 +10f8: 15 00 00 00     sethi  %hi\(0\), %o2
 +10fc: 94 1a a0 00     xor  %o2, 0, %o2
 +1100: d4 01 c0 0a     ld  \[ %g7 \+ %o2 \], %o2
 +1104: 01 00 00 00     nop *
 +1108: 01 00 00 00     nop *
 +110c: 01 00 00 00     nop *
 +1110: 01 00 00 00     nop *
 +1114: 81 c7 e0 08     ret *
 +1118: 81 e8 00 00     restore *
#pass

Go to most recent revision | Compare with Previous | Blame | View Log

powered by: WebSVN 2.1.0

© copyright 1999-2024 OpenCores.org, equivalent to Oliscience, all rights reserved. OpenCores®, registered trademark.