OpenCores
URL https://opencores.org/ocsvn/openrisc/openrisc/trunk

Subversion Repositories openrisc

[/] [openrisc/] [trunk/] [gnu-old/] [gcc-4.2.2/] [gcc/] [config/] [h8300/] [h8300.opt] - Rev 825

Go to most recent revision | Compare with Previous | Blame | View Log

; Options for the Renesas H8/300 port of the compiler
;
; Copyright (C) 2005, 2007 Free Software Foundation, Inc.
;
; This file is part of GCC.
;
; GCC is free software; you can redistribute it and/or modify it under
; the terms of the GNU General Public License as published by the Free
; Software Foundation; either version 3, or (at your option) any later
; version.
;
; GCC is distributed in the hope that it will be useful, but WITHOUT
; ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
; or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public
; License for more details.
;
; You should have received a copy of the GNU General Public License
; along with GCC; see the file COPYING3.  If not see
; <http://www.gnu.org/licenses/>.

ms
Target Mask(H8300S_1)
Generate H8S code

msx
Target Mask(H8300SX)
Generate H8SX code

ms2600
Target Mask(MAC)
Generate H8S/2600 code

mint32
Target RejectNegative Mask(INT32)
Make integers 32 bits wide

maddresses
Target Undocumented RejectNegative Mask(ADDRESSES)

mquickcall
Target Mask(QUICKCALL)
Use registers for argument passing

mslowbyte
Target RejectNegative Mask(SLOWBYTE)
Consider access to byte sized memory slow

mrelax
Target RejectNegative Mask(RELAX)
Enable linker relaxing

mh
Target Mask(H8300H)
Generate H8/300H code

mn
Target Mask(NORMAL_MODE)
Enable the normal mode

malign-300
Target RejectNegative Mask(ALIGN_300)
Use H8/300 alignment rules

Go to most recent revision | Compare with Previous | Blame | View Log

powered by: WebSVN 2.1.0

© copyright 1999-2024 OpenCores.org, equivalent to Oliscience, all rights reserved. OpenCores®, registered trademark.