OpenCores
URL https://opencores.org/ocsvn/openrisc/openrisc/trunk

Subversion Repositories openrisc

[/] [openrisc/] [trunk/] [gnu-old/] [gcc-4.2.2/] [gcc/] [testsuite/] [gcc.dg/] [arm-g2.c] - Rev 816

Compare with Previous | Blame | View Log

/* Verify that hardware multiply is preferred on XScale. */
/* { dg-do compile } */
/* { dg-options "-mcpu=xscale -O2" } */
/* { dg-require-effective-target arm32 } */
 
/* Brett Gaines' test case. */
unsigned BCPL(unsigned) __attribute__ ((naked));
unsigned BCPL(unsigned seed)
{
    /* Best code would be:
       ldr r1, =2147001325
       ldr r2, =715136305
       mla r0, r1, r0, r2
       mov pc, lr */
 
    return seed * 2147001325U + 715136305U;
}
 
/* { dg-final { scan-assembler "mla\[ 	].*" } } */
 

Compare with Previous | Blame | View Log

powered by: WebSVN 2.1.0

© copyright 1999-2024 OpenCores.org, equivalent to Oliscience, all rights reserved. OpenCores®, registered trademark.