OpenCores
URL https://opencores.org/ocsvn/openrisc/openrisc/trunk

Subversion Repositories openrisc

[/] [openrisc/] [trunk/] [gnu-old/] [gcc-4.2.2/] [gcc/] [testsuite/] [gcc.target/] [powerpc/] [405-macchw-2.c] - Rev 825

Go to most recent revision | Compare with Previous | Blame | View Log

/* Test generation of macchw. on 405.  */
/* Origin: Joseph Myers <joseph@codesourcery.com> */
/* { dg-do compile } */
/* { dg-require-effective-target ilp32 } */
/* { dg-options "-O2 -mcpu=405" } */
 
/* { dg-final { scan-assembler "macchw\\. " } } */
 
int
f(int a, int b, int c)
{
  a += (short)b * (c >> 16);
  if (!a)
    return 10;
  return a;
}
 

Go to most recent revision | Compare with Previous | Blame | View Log

powered by: WebSVN 2.1.0

© copyright 1999-2024 OpenCores.org, equivalent to Oliscience, all rights reserved. OpenCores®, registered trademark.