URL
https://opencores.org/ocsvn/openrisc/openrisc/trunk
Subversion Repositories openrisc
[/] [openrisc/] [trunk/] [gnu-old/] [gdb-6.8/] [sim/] [testsuite/] [sim/] [arm/] [and.cgs] - Rev 856
Go to most recent revision | Compare with Previous | Blame | View Log
# arm testcase for and
# mach: all
# ??? Unfinished, more tests needed.
.include "testutils.inc"
start
# and$cond${set-cc?} $rd,$rn,$imm12
.global and_imm
and_imm:
mvi_h_gr r4,1
mvi_h_cnvz 0,0,0,0
and r5,r4,#1
test_h_cnvz 0,0,0,0
test_h_gr r5,1
# and$cond${set-cc?} $rd,$rn,$rm,${operand2-shifttype} ${operand2-shiftimm}
.global and_reg_imm_shift
and_reg_imm_shift:
mvi_h_gr r4,1
mvi_h_gr r5,1
mvi_h_cnvz 0,0,0,0
and r6,r4,r5,lsl #1
test_h_cnvz 0,0,0,0
test_h_gr r6,0
# and$cond${set-cc?} $rd,$rn,$rm,${operand2-shifttype} ${operand2-shiftreg}
.global and_reg_reg_shift
and_reg_reg_shift:
mvi_h_gr r4,1
mvi_h_gr r5,1
mvi_h_gr r6,1
mvi_h_cnvz 0,0,0,0
and r7,r4,r5,lsl r6
test_h_cnvz 0,0,0,0
test_h_gr r7,0
pass
Go to most recent revision | Compare with Previous | Blame | View Log