Subversion Repositories openrisc

# Intel(r) Wireless MMX(tm) technology testcase for TMOVMSK
# mach: xscale
# as: -mcpu=xscale+iwmmxt

        .include "testutils.inc"

        start

        .global tmovmsk
tmovmsk:
        # Enable access to CoProcessors 0 & 1 before
        # we attempt these instructions.

        mvi_h_gr   r1, 3
        mcr        p15, 0, r1, cr15, cr1, 0

        # Test Byte Wide Mask Transfer
        
        mvi_h_gr   r0, 0x12345678
        mvi_h_gr   r1, 0x9abcdef0
        mvi_h_gr   r2, 0

        tmcrr      wr0, r0, r1

        tmovmskb   r2, wr0
        
        tmrrc      r0, r1, wr0
        
        test_h_gr  r0, 0x12345678
        test_h_gr  r1, 0x9abcdef0
        test_h_gr  r2, 0x000000f0

        # Test Half Word Wide Mask Transfer
        
        mvi_h_gr   r0, 0x12345678
        mvi_h_gr   r1, 0x9abcdef0
        mvi_h_gr   r2, 0

        tmcrr      wr0, r0, r1

        tmovmskh   r2, wr0
        
        tmrrc      r0, r1, wr0
        
        test_h_gr  r0, 0x12345678
        test_h_gr  r1, 0x9abcdef0
        test_h_gr  r2, 0x0000000c

        # Test Word Wide Mask Transfer
        
        mvi_h_gr   r0, 0x12345678
        mvi_h_gr   r1, 0x9abcdef0
        mvi_h_gr   r2, 0

        tmcrr      wr0, r0, r1

        tmovmskw   r2, wr0
        
        tmrrc      r0, r1, wr0
        
        test_h_gr  r0, 0x12345678
        test_h_gr  r1, 0x9abcdef0
        test_h_gr  r2, 0x00000002

        pass