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[/] [openrisc/] [trunk/] [gnu-old/] [gdb-6.8/] [sim/] [testsuite/] [sim/] [arm/] [iwmmxt/] [walignr.cgs] - Rev 24
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# Intel(r) Wireless MMX(tm) technology testcase for WALIGNR# mach: xscale# as: -mcpu=xscale+iwmmxt.include "testutils.inc"start.global walignrwalignr:# Enable access to CoProcessors 0 & 1 before# we attempt these instructions.mvi_h_gr r1, 3mcr p15, 0, r1, cr15, cr1, 0# Test 0 byte alignmvi_h_gr r0, 0x12345678mvi_h_gr r1, 0x9abcdef0mvi_h_gr r2, 0x11111111mvi_h_gr r3, 0x00000000mvi_h_gr r4, 0mvi_h_gr r5, 0mvi_h_gr r6, 3tmcrr wr0, r0, r1tmcrr wr1, r2, r3tmcrr wr2, r4, r5tmcr wcgr0, r6walignr0 wr2, wr0, wr1tmrrc r0, r1, wr0tmrrc r2, r3, wr1tmrrc r4, r5, wr2tmrc r6, wcgr0test_h_gr r0, 0x12345678test_h_gr r1, 0x9abcdef0test_h_gr r2, 0x11111111test_h_gr r3, 0x00000000test_h_gr r4, 0xbcdef012test_h_gr r5, 0x1111119atest_h_gr r6, 3# Test 1 byte alignmvi_h_gr r0, 0x12345678mvi_h_gr r1, 0x9abcdef0mvi_h_gr r2, 0x11111111mvi_h_gr r3, 0x00000000mvi_h_gr r4, 0mvi_h_gr r5, 0mvi_h_gr r6, 4tmcrr wr0, r0, r1tmcrr wr1, r2, r3tmcrr wr2, r4, r5tmcr wcgr1, r6walignr1 wr2, wr0, wr1tmrrc r0, r1, wr0tmrrc r2, r3, wr1tmrrc r4, r5, wr2tmrc r6, wcgr1test_h_gr r0, 0x12345678test_h_gr r1, 0x9abcdef0test_h_gr r2, 0x11111111test_h_gr r3, 0x00000000test_h_gr r4, 0x9abcdef0test_h_gr r5, 0x11111111test_h_gr r6, 4# Test 2 byte alignmvi_h_gr r0, 0x12345678mvi_h_gr r1, 0x9abcdef0mvi_h_gr r2, 0x11111111mvi_h_gr r3, 0x00000000mvi_h_gr r4, 0mvi_h_gr r5, 0mvi_h_gr r6, 2tmcrr wr0, r0, r1tmcrr wr1, r2, r3tmcrr wr2, r4, r5tmcr wcgr2, r6walignr2 wr2, wr0, wr1tmrrc r0, r1, wr0tmrrc r2, r3, wr1tmrrc r4, r5, wr2tmrc r6, wcgr2test_h_gr r0, 0x12345678test_h_gr r1, 0x9abcdef0test_h_gr r2, 0x11111111test_h_gr r3, 0x00000000test_h_gr r4, 0xdef01234test_h_gr r5, 0x11119abctest_h_gr r6, 2# Test 3 byte alignmvi_h_gr r0, 0x12345678mvi_h_gr r1, 0x9abcdef0mvi_h_gr r2, 0x11111111mvi_h_gr r3, 0x00000000mvi_h_gr r4, 0mvi_h_gr r5, 0mvi_h_gr r6, 5tmcrr wr0, r0, r1tmcrr wr1, r2, r3tmcrr wr2, r4, r5tmcr wcgr3, r6walignr3 wr2, wr0, wr1tmrrc r0, r1, wr0tmrrc r2, r3, wr1tmrrc r4, r5, wr2tmrc r6, wcgr3test_h_gr r0, 0x12345678test_h_gr r1, 0x9abcdef0test_h_gr r2, 0x11111111test_h_gr r3, 0x00000000test_h_gr r4, 0x119abcdetest_h_gr r5, 0x00111111test_h_gr r6, 5pass
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