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[/] [openrisc/] [trunk/] [gnu-old/] [gdb-6.8/] [sim/] [testsuite/] [sim/] [arm/] [iwmmxt/] [wmin.cgs] - Rev 157
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# Intel(r) Wireless MMX(tm) technology testcase for WMIN# mach: xscale# as: -mcpu=xscale+iwmmxt.include "testutils.inc"start.global wminwmin:# Enable access to CoProcessors 0 & 1 before# we attempt these instructions.mvi_h_gr r1, 3mcr p15, 0, r1, cr15, cr1, 0# Test Unsigned Byte Minimummvi_h_gr r0, 0x12345678mvi_h_gr r1, 0x9abcde00mvi_h_gr r2, 0x11111111mvi_h_gr r3, 0x11111111mvi_h_gr r4, 0mvi_h_gr r5, 0tmcrr wr0, r0, r1tmcrr wr1, r2, r3tmcrr wr2, r4, r5wminub wr2, wr0, wr1tmrrc r0, r1, wr0tmrrc r2, r3, wr1tmrrc r4, r5, wr2test_h_gr r0, 0x12345678test_h_gr r1, 0x9abcde00test_h_gr r2, 0x11111111test_h_gr r3, 0x11111111test_h_gr r4, 0x11111111test_h_gr r5, 0x11111100# Test Signed Byte Minimummvi_h_gr r0, 0x12345678mvi_h_gr r1, 0x9abcde00mvi_h_gr r2, 0x11111111mvi_h_gr r3, 0x11111111mvi_h_gr r4, 0mvi_h_gr r5, 0tmcrr wr0, r0, r1tmcrr wr1, r2, r3tmcrr wr2, r4, r5wminsb wr2, wr0, wr1tmrrc r0, r1, wr0tmrrc r2, r3, wr1tmrrc r4, r5, wr2test_h_gr r0, 0x12345678test_h_gr r1, 0x9abcde00test_h_gr r2, 0x11111111test_h_gr r3, 0x11111111test_h_gr r4, 0x11111111test_h_gr r5, 0x9abcde00# Test Unsigned Halfword Minimummvi_h_gr r0, 0x12345678mvi_h_gr r1, 0x9abcde00mvi_h_gr r2, 0x11111111mvi_h_gr r3, 0x11111111mvi_h_gr r4, 0mvi_h_gr r5, 0tmcrr wr0, r0, r1tmcrr wr1, r2, r3tmcrr wr2, r4, r5wminuh wr2, wr0, wr1tmrrc r0, r1, wr0tmrrc r2, r3, wr1tmrrc r4, r5, wr2test_h_gr r0, 0x12345678test_h_gr r1, 0x9abcde00test_h_gr r2, 0x11111111test_h_gr r3, 0x11111111test_h_gr r4, 0x11111111test_h_gr r5, 0x11111111# Test Signed Halfword Minimummvi_h_gr r0, 0x12345678mvi_h_gr r1, 0x9abcde00mvi_h_gr r2, 0x11111111mvi_h_gr r3, 0x11111111mvi_h_gr r4, 0mvi_h_gr r5, 0tmcrr wr0, r0, r1tmcrr wr1, r2, r3tmcrr wr2, r4, r5wminsh wr2, wr0, wr1tmrrc r0, r1, wr0tmrrc r2, r3, wr1tmrrc r4, r5, wr2test_h_gr r0, 0x12345678test_h_gr r1, 0x9abcde00test_h_gr r2, 0x11111111test_h_gr r3, 0x11111111test_h_gr r4, 0x11111111test_h_gr r5, 0x9abcde00# Test Unsigned Word Minimummvi_h_gr r0, 0x12345678mvi_h_gr r1, 0x9abcde00mvi_h_gr r2, 0x11111111mvi_h_gr r3, 0x11111111mvi_h_gr r4, 0mvi_h_gr r5, 0tmcrr wr0, r0, r1tmcrr wr1, r2, r3tmcrr wr2, r4, r5wminuw wr2, wr0, wr1tmrrc r0, r1, wr0tmrrc r2, r3, wr1tmrrc r4, r5, wr2test_h_gr r0, 0x12345678test_h_gr r1, 0x9abcde00test_h_gr r2, 0x11111111test_h_gr r3, 0x11111111test_h_gr r4, 0x11111111test_h_gr r5, 0x11111111# Test Signed Word Minimummvi_h_gr r0, 0x12345678mvi_h_gr r1, 0x9abcde00mvi_h_gr r2, 0x11111111mvi_h_gr r3, 0x11111111mvi_h_gr r4, 0mvi_h_gr r5, 0tmcrr wr0, r0, r1tmcrr wr1, r2, r3tmcrr wr2, r4, r5wminsw wr2, wr0, wr1tmrrc r0, r1, wr0tmrrc r2, r3, wr1tmrrc r4, r5, wr2test_h_gr r0, 0x12345678test_h_gr r1, 0x9abcde00test_h_gr r2, 0x11111111test_h_gr r3, 0x11111111test_h_gr r4, 0x11111111test_h_gr r5, 0x9abcde00pass
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