URL
https://opencores.org/ocsvn/openrisc/openrisc/trunk
Subversion Repositories openrisc
[/] [openrisc/] [trunk/] [gnu-old/] [gdb-6.8/] [sim/] [testsuite/] [sim/] [arm/] [iwmmxt/] [wunpckeh.cgs] - Rev 840
Compare with Previous | Blame | View Log
# Intel(r) Wireless MMX(tm) technology testcase for WUNPCKEH# mach: xscale# as: -mcpu=xscale+iwmmxt.include "testutils.inc"start.global wunpckehwunpckeh:# Enable access to CoProcessors 0 & 1 before# we attempt these instructions.mvi_h_gr r1, 3mcr p15, 0, r1, cr15, cr1, 0# Test Unsigned Byte Unpackingmvi_h_gr r0, 0x12345687mvi_h_gr r1, 0x9abcdef0mvi_h_gr r2, 0mvi_h_gr r3, 0tmcrr wr0, r0, r1tmcrr wr1, r2, r3wunpckehub wr1, wr0tmrrc r0, r1, wr0tmrrc r2, r3, wr1test_h_gr r0, 0x12345687test_h_gr r1, 0x9abcdef0test_h_gr r2, 0x00de00f0test_h_gr r3, 0x009a00bc# Test Signed Byte Unpackingmvi_h_gr r0, 0x12345687mvi_h_gr r1, 0x7abcdef0mvi_h_gr r2, 0mvi_h_gr r3, 0tmcrr wr0, r0, r1tmcrr wr1, r2, r3wunpckehsb wr1, wr0tmrrc r0, r1, wr0tmrrc r2, r3, wr1test_h_gr r0, 0x12345687test_h_gr r1, 0x7abcdef0test_h_gr r2, 0xffdefff0test_h_gr r3, 0x007affbc# Test Unsigned Halfword Unpackingmvi_h_gr r0, 0x12345678mvi_h_gr r1, 0x9abcdef0mvi_h_gr r2, 0mvi_h_gr r3, 0tmcrr wr0, r0, r1tmcrr wr1, r2, r3wunpckehuh wr1, wr0tmrrc r0, r1, wr0tmrrc r2, r3, wr1test_h_gr r0, 0x12345678test_h_gr r1, 0x9abcdef0test_h_gr r2, 0x0000def0test_h_gr r3, 0x00009abc# Test Signed Halfword Unpackingmvi_h_gr r0, 0x12348678mvi_h_gr r1, 0x7abcdef0mvi_h_gr r2, 0mvi_h_gr r3, 0tmcrr wr0, r0, r1tmcrr wr1, r2, r3wunpckehsh wr1, wr0tmrrc r0, r1, wr0tmrrc r2, r3, wr1test_h_gr r0, 0x12348678test_h_gr r1, 0x7abcdef0test_h_gr r2, 0xffffdef0test_h_gr r3, 0x00007abc# Test Unsigned Word Unpackingmvi_h_gr r0, 0x12345678mvi_h_gr r1, 0x9abcdef0mvi_h_gr r2, 0mvi_h_gr r3, 0tmcrr wr0, r0, r1tmcrr wr1, r2, r3wunpckehuw wr1, wr0tmrrc r0, r1, wr0tmrrc r2, r3, wr1test_h_gr r0, 0x12345678test_h_gr r1, 0x9abcdef0test_h_gr r2, 0x9abcdef0test_h_gr r3, 0x00000000# Test Signed Word Unpackingmvi_h_gr r0, 0x82345678mvi_h_gr r1, 0x9abcdef0mvi_h_gr r2, 0mvi_h_gr r3, 0tmcrr wr0, r0, r1tmcrr wr1, r2, r3wunpckehsw wr1, wr0tmrrc r0, r1, wr0tmrrc r2, r3, wr1test_h_gr r0, 0x82345678test_h_gr r1, 0x9abcdef0test_h_gr r2, 0x9abcdef0test_h_gr r3, 0xffffffffpass