URL
https://opencores.org/ocsvn/openrisc/openrisc/trunk
Subversion Repositories openrisc
[/] [openrisc/] [trunk/] [gnu-old/] [gdb-6.8/] [sim/] [testsuite/] [sim/] [fr30/] [dmovh.cgs] - Rev 840
Compare with Previous | Blame | View Log
# fr30 testcase for dmovh
# mach(): fr30
.include "testutils.inc"
START
.text
.global dmovh
dmovh:
; Test dmovh @$dir9,$R13
mvi_h_gr 0xdeadbeef,r1
mvi_h_gr 0x100,r2
mvr_h_mem r1,r2
set_cc 0x0f ; Condition codes shouldn't change
dmovh @0x100,r13
test_cc 1 1 1 1
test_h_gr 0xffffdead,r13
; Test dmovh $R13,@$dir9
mvi_h_gr 0xdeadbeef,r13
set_cc 0x0e ; Condition codes shouldn't change
dmovh r13,@0x100
test_cc 1 1 1 0
test_h_mem 0xbeefbeef,r2
; Test dmovh @$dir9,@R13+
mvi_h_gr 0x1fc,r13
mvi_h_mem 0xdeadbeef,r13
set_cc 0x0d ; Condition codes shouldn't change
dmovh @0x1fe,@r13+
test_cc 1 1 0 1
mvi_h_gr 0x1fc,r2
test_h_mem 0xbeefbeef,r2
test_h_gr 0x1fe,r13
; Test dmovh @$R13+,@$dir9
mvi_h_gr 0x1fc,r13
mvi_h_mem 0xbeefdead,r13
set_cc 0x0c ; Condition codes shouldn't change
dmovh @r13+,@0x1fe
test_cc 1 1 0 0
mvi_h_gr 0x1fc,r2
test_h_mem 0xbeefbeef,r2
test_h_gr 0x1fe,r13
pass