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# frv testcase for bcralr $ccond
# mach: all

        .include "testutils.inc"

        start

        .global bcralr
bcralr:
        ; ccond is true
        set_spr_immed   128,lcr
        set_spr_addr    ok1,lr
        set_icc         0x0 0
        bcralr          0
        fail
ok1:
        set_spr_addr    ok2,lr
        set_icc         0x1 1
        bcralr          0
        fail
ok2:
        set_spr_addr    ok3,lr
        set_icc         0x2 2
        bcralr          0
        fail
ok3:
        set_spr_addr    ok4,lr
        set_icc         0x3 3
        bcralr          0
        fail
ok4:
        set_spr_addr    ok5,lr
        set_icc         0x4 0
        bcralr          0
        fail
ok5:
        set_spr_addr    ok6,lr
        set_icc         0x5 1
        bcralr          0
        fail
ok6:
        set_spr_addr    ok7,lr
        set_icc         0x6 2
        bcralr          0
        fail
ok7:
        set_spr_addr    ok8,lr
        set_icc         0x7 3
        bcralr          0
        fail
ok8:
        set_spr_addr    ok9,lr
        set_icc         0x8 0
        bcralr          0
        fail
ok9:
        set_spr_addr    oka,lr
        set_icc         0x9 1
        bcralr          0
        fail
oka:
        set_spr_addr    okb,lr
        set_icc         0xa 2
        bcralr          0
        fail
okb:
        set_spr_addr    okc,lr
        set_icc         0xb 3
        bcralr          0
        fail
okc:
        set_spr_addr    okd,lr
        set_icc         0xc 0
        bcralr          0
        fail
okd:
        set_spr_addr    oke,lr
        set_icc         0xd 1
        bcralr          0
        fail
oke:
        set_spr_addr    okf,lr
        set_icc         0xe 2
        bcralr          0
        fail
okf:
        set_spr_addr    okg,lr
        set_icc         0xf 3
        bcralr          0
        fail
okg:

        ; ccond is true
        set_spr_immed   1,lcr
        set_spr_addr    okh,lr
        set_icc         0x0 0
        bcralr          1
        fail
okh:
        set_spr_immed   1,lcr
        set_spr_addr    oki,lr
        set_icc         0x1 1
        bcralr          1
        fail
oki:
        set_spr_immed   1,lcr
        set_spr_addr    okj,lr
        set_icc         0x2 2
        bcralr          1
        fail
okj:
        set_spr_immed   1,lcr
        set_spr_addr    okk,lr
        set_icc         0x3 3
        bcralr          1
        fail
okk:
        set_spr_immed   1,lcr
        set_spr_addr    okl,lr
        set_icc         0x4 0
        bcralr          1
        fail
okl:
        set_spr_immed   1,lcr
        set_spr_addr    okm,lr
        set_icc         0x5 1
        bcralr          1
        fail
okm:
        set_spr_immed   1,lcr
        set_spr_addr    okn,lr
        set_icc         0x6 2
        bcralr          1
        fail
okn:
        set_spr_immed   1,lcr
        set_spr_addr    oko,lr
        set_icc         0x7 3
        bcralr          1
        fail
oko:
        set_spr_immed   1,lcr
        set_spr_addr    okp,lr
        set_icc         0x8 0
        bcralr          1
        fail
okp:
        set_spr_immed   1,lcr
        set_spr_addr    okq,lr
        set_icc         0x9 1
        bcralr          1
        fail
okq:
        set_spr_immed   1,lcr
        set_spr_addr    okr,lr
        set_icc         0xa 2
        bcralr          1
        fail
okr:
        set_spr_immed   1,lcr
        set_spr_addr    oks,lr
        set_icc         0xb 3
        bcralr          1
        fail
oks:
        set_spr_immed   1,lcr
        set_spr_addr    okt,lr
        set_icc         0xc 0
        bcralr          1
        fail
okt:
        set_spr_immed   1,lcr
        set_spr_addr    oku,lr
        set_icc         0xd 1
        bcralr          1
        fail
oku:
        set_spr_immed   1,lcr
        set_spr_addr    okv,lr
        set_icc         0xe 2
        bcralr          1
        fail
okv:
        set_spr_immed   1,lcr
        set_spr_addr    okw,lr
        set_icc         0xf 3
        bcralr          1
        fail
okw:
        ; ccond is false
        set_spr_immed   128,lcr
        set_spr_addr    bad,lr
        set_icc         0x0 0
        bcralr          1

        set_icc         0x1 1
        bcralr          1

        set_icc         0x2 2
        bcralr          1

        set_icc         0x3 3
        bcralr          1

        set_icc         0x4 0
        bcralr          1

        set_icc         0x5 1
        bcralr          1

        set_icc         0x6 2
        bcralr          1

        set_icc         0x7 3
        bcralr          1

        set_icc         0x8 0
        bcralr          1

        set_icc         0x9 1
        bcralr          1

        set_icc         0xa 2
        bcralr          1

        set_icc         0xb 3
        bcralr          1

        set_icc         0xc 0
        bcralr          1

        set_icc         0xd 1
        bcralr          1

        set_icc         0xe 2
        bcralr          1

        set_icc         0xf 3
        bcralr          1

        ; ccond is false
        set_spr_immed   1,lcr
        set_spr_addr    bad,lr
        set_icc         0x0 0
        bcralr          0

        set_spr_immed   1,lcr
        set_icc         0x1 1
        bcralr          0

        set_spr_immed   1,lcr
        set_icc         0x2 2
        bcralr          0

        set_spr_immed   1,lcr
        set_icc         0x3 3
        bcralr          0

        set_spr_immed   1,lcr
        set_icc         0x4 0
        bcralr          0

        set_spr_immed   1,lcr
        set_icc         0x5 1
        bcralr          0

        set_spr_immed   1,lcr
        set_icc         0x6 2
        bcralr          0

        set_spr_immed   1,lcr
        set_icc         0x7 3
        bcralr          0

        set_spr_immed   1,lcr
        set_icc         0x8 0
        bcralr          0

        set_spr_immed   1,lcr
        set_icc         0x9 1
        bcralr          0

        set_spr_immed   1,lcr
        set_icc         0xa 2
        bcralr          0

        set_spr_immed   1,lcr
        set_icc         0xb 3
        bcralr          0

        set_spr_immed   1,lcr
        set_icc         0xc 0
        bcralr          0

        set_spr_immed   1,lcr
        set_icc         0xd 1
        bcralr          0

        set_spr_immed   1,lcr
        set_icc         0xe 2
        bcralr          0

        set_spr_immed   1,lcr
        set_icc         0xf 3
        bcralr          0

        pass
bad:
        fail