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https://opencores.org/ocsvn/openrisc/openrisc/trunk
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[/] [openrisc/] [trunk/] [gnu-old/] [gdb-6.8/] [sim/] [testsuite/] [sim/] [frv/] [bcvlr.cgs] - Rev 840
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# frv testcase for bcvlr $ICCi,$ccond,$hint# mach: all.include "testutils.inc"start.global bcvlrbcvlr:; ccond is trueset_spr_immed 128,lcrset_spr_addr bad,lrset_icc 0x0 0bcvlr icc0,0,0set_spr_addr bad,lrset_icc 0x1 1bcvlr icc1,0,1set_spr_addr ok3,lrset_icc 0x2 2bcvlr icc2,0,2failok3:set_spr_addr ok4,lrset_icc 0x3 3bcvlr icc3,0,3failok4:set_spr_addr bad,lrset_icc 0x4 0bcvlr icc0,0,0set_spr_addr bad,lrset_icc 0x5 1bcvlr icc1,0,1set_spr_addr ok7,lrset_icc 0x6 2bcvlr icc2,0,2failok7:set_spr_addr ok8,lrset_icc 0x7 3bcvlr icc3,0,3failok8:set_spr_addr bad,lrset_icc 0x8 0bcvlr icc0,0,0set_spr_addr bad,lrset_icc 0x9 1bcvlr icc1,0,1set_spr_addr okb,lrset_icc 0xa 2bcvlr icc2,0,2failokb:set_spr_addr okc,lrset_icc 0xb 3bcvlr icc3,0,3failokc:set_spr_addr bad,lrset_icc 0xc 0bcvlr icc0,0,0set_spr_addr bad,lrset_icc 0xd 1bcvlr icc1,0,1set_spr_addr okf,lrset_icc 0xe 2bcvlr icc2,0,2failokf:set_spr_addr okg,lrset_icc 0xf 3bcvlr icc3,0,3failokg:; ccond is trueset_spr_immed 1,lcrset_spr_addr bad,lrset_icc 0x0 0bcvlr icc0,1,0set_spr_immed 1,lcrset_spr_addr bad,lrset_icc 0x1 1bcvlr icc1,1,1set_spr_immed 1,lcrset_spr_addr okj,lrset_icc 0x2 2bcvlr icc2,1,2failokj:set_spr_immed 1,lcrset_spr_addr okk,lrset_icc 0x3 3bcvlr icc3,1,3failokk:set_spr_immed 1,lcrset_spr_addr bad,lrset_icc 0x4 0bcvlr icc0,1,0set_spr_immed 1,lcrset_spr_addr bad,lrset_icc 0x5 1bcvlr icc1,1,1set_spr_immed 1,lcrset_spr_addr okn,lrset_icc 0x6 2bcvlr icc2,1,2failokn:set_spr_immed 1,lcrset_spr_addr oko,lrset_icc 0x7 3bcvlr icc3,1,3failoko:set_spr_immed 1,lcrset_spr_addr bad,lrset_icc 0x8 0bcvlr icc0,1,0set_spr_immed 1,lcrset_spr_addr bad,lrset_icc 0x9 1bcvlr icc1,1,1set_spr_immed 1,lcrset_spr_addr okr,lrset_icc 0xa 2bcvlr icc2,1,2failokr:set_spr_immed 1,lcrset_spr_addr oks,lrset_icc 0xb 3bcvlr icc3,1,3failoks:set_spr_immed 1,lcrset_spr_addr bad,lrset_icc 0xc 0bcvlr icc0,1,0set_spr_immed 1,lcrset_spr_addr bad,lrset_icc 0xd 1bcvlr icc1,1,1set_spr_immed 1,lcrset_spr_addr okv,lrset_icc 0xe 2bcvlr icc2,1,2failokv:set_spr_immed 1,lcrset_spr_addr okw,lrset_icc 0xf 3bcvlr icc3,1,3failokw:; ccond is falseset_spr_immed 128,lcrset_spr_addr bad,lrset_icc 0x0 0bcvlr icc0,1,0set_icc 0x1 1bcvlr icc1,1,1set_icc 0x2 2bcvlr icc2,1,2set_icc 0x3 3bcvlr icc3,1,3set_icc 0x4 0bcvlr icc0,1,0set_icc 0x5 1bcvlr icc1,1,1set_icc 0x6 2bcvlr icc2,1,2set_icc 0x7 3bcvlr icc3,1,3set_icc 0x8 0bcvlr icc0,1,0set_icc 0x9 1bcvlr icc1,1,1set_icc 0xa 2bcvlr icc2,1,2set_icc 0xb 3bcvlr icc3,1,3set_icc 0xc 0bcvlr icc0,1,0set_icc 0xd 1bcvlr icc1,1,1set_icc 0xe 2bcvlr icc2,1,2set_icc 0xf 3bcvlr icc3,1,3; ccond is falseset_spr_immed 1,lcrset_spr_addr bad,lrset_icc 0x0 0bcvlr icc0,0,0set_spr_immed 1,lcrset_icc 0x1 1bcvlr icc1,0,1set_spr_immed 1,lcrset_icc 0x2 2bcvlr icc2,0,2set_spr_immed 1,lcrset_icc 0x3 3bcvlr icc3,0,3set_spr_immed 1,lcrset_icc 0x4 0bcvlr icc0,0,0set_spr_immed 1,lcrset_icc 0x5 1bcvlr icc1,0,1set_spr_immed 1,lcrset_icc 0x6 2bcvlr icc2,0,2set_spr_immed 1,lcrset_icc 0x7 3bcvlr icc3,0,3set_spr_immed 1,lcrset_icc 0x8 0bcvlr icc0,0,0set_spr_immed 1,lcrset_icc 0x9 1bcvlr icc1,0,1set_spr_immed 1,lcrset_icc 0xa 2bcvlr icc2,0,2set_spr_immed 1,lcrset_icc 0xb 3bcvlr icc3,0,3set_spr_immed 1,lcrset_icc 0xc 0bcvlr icc0,0,0set_spr_immed 1,lcrset_icc 0xd 1bcvlr icc1,0,1set_spr_immed 1,lcrset_icc 0xe 2bcvlr icc2,0,2set_spr_immed 1,lcrset_icc 0xf 3bcvlr icc3,0,3passbad:fail