URL
https://opencores.org/ocsvn/openrisc/openrisc/trunk
Subversion Repositories openrisc
[/] [openrisc/] [trunk/] [gnu-old/] [gdb-6.8/] [sim/] [testsuite/] [sim/] [frv/] [fckul.cgs] - Rev 24
Go to most recent revision | Compare with Previous | Blame | View Log
# frv testcase for fckul $FCCi,$CCj_float
# mach: all
.include "testutils.inc"
start
.global fckul
fckul:
set_spr_immed 0x1b1b,cccr
set_fcc 0x0 0
fckul fcc0,cc3
test_spr_immed 0x1b9b,cccr
set_spr_immed 0x1b1b,cccr
set_fcc 0x1 0
fckul fcc0,cc3
test_spr_immed 0x1bdb,cccr
set_spr_immed 0x1b1b,cccr
set_fcc 0x2 0
fckul fcc0,cc3
test_spr_immed 0x1b9b,cccr
set_spr_immed 0x1b1b,cccr
set_fcc 0x3 0
fckul fcc0,cc3
test_spr_immed 0x1bdb,cccr
set_spr_immed 0x1b1b,cccr
set_fcc 0x4 0
fckul fcc0,cc3
test_spr_immed 0x1bdb,cccr
set_spr_immed 0x1b1b,cccr
set_fcc 0x5 0
fckul fcc0,cc3
test_spr_immed 0x1bdb,cccr
set_spr_immed 0x1b1b,cccr
set_fcc 0x6 0
fckul fcc0,cc3
test_spr_immed 0x1bdb,cccr
set_spr_immed 0x1b1b,cccr
set_fcc 0x7 0
fckul fcc0,cc3
test_spr_immed 0x1bdb,cccr
set_spr_immed 0x1b1b,cccr
set_fcc 0x8 0
fckul fcc0,cc3
test_spr_immed 0x1b9b,cccr
set_spr_immed 0x1b1b,cccr
set_fcc 0x9 0
fckul fcc0,cc3
test_spr_immed 0x1bdb,cccr
set_spr_immed 0x1b1b,cccr
set_fcc 0xa 0
fckul fcc0,cc3
test_spr_immed 0x1b9b,cccr
set_spr_immed 0x1b1b,cccr
set_fcc 0xb 0
fckul fcc0,cc3
test_spr_immed 0x1bdb,cccr
set_spr_immed 0x1b1b,cccr
set_fcc 0xc 0
fckul fcc0,cc3
test_spr_immed 0x1bdb,cccr
set_spr_immed 0x1b1b,cccr
set_fcc 0xd 0
fckul fcc0,cc3
test_spr_immed 0x1bdb,cccr
set_spr_immed 0x1b1b,cccr
set_fcc 0xe 0
fckul fcc0,cc3
test_spr_immed 0x1bdb,cccr
set_spr_immed 0x1b1b,cccr
set_fcc 0xf 0
fckul fcc0,cc3
test_spr_immed 0x1bdb,cccr
pass
Go to most recent revision | Compare with Previous | Blame | View Log