OpenCores
URL https://opencores.org/ocsvn/openrisc/openrisc/trunk

Subversion Repositories openrisc

[/] [openrisc/] [trunk/] [gnu-old/] [gdb-6.8/] [sim/] [testsuite/] [sim/] [frv/] [ldc.cgs] - Rev 840

Compare with Previous | Blame | View Log

# frv testcase for ldc @($GRi,$GRj),$GRk
# mach: frv
# as(frv): -mcpu=frv

        .include "testutils.inc"

        start

        .global ldc
ldc:
        set_mem_limmed  0xdead,0xbeef,sp
        set_cpr_limmed  0xbeef,0xdead,cpr8

        set_gr_immed    0,gr7
        ldc             @(sp,gr7),cpr8
        test_cpr_limmed 0xdead,0xbeef,cpr8

        set_cpr_limmed  0xbeef,0xdead,cpr8
        inc_gr_immed    -4,sp
        set_gr_immed    4,gr7
        ldc             @(sp,gr7),cpr8
        test_cpr_limmed 0xdead,0xbeef,cpr8

        set_cpr_limmed  0xbeef,0xdead,cpr8
        inc_gr_immed    8,sp
        set_gr_immed    -4,gr7
        ldc             @(sp,gr7),cpr8
        test_cpr_limmed 0xdead,0xbeef,cpr8

        pass

Compare with Previous | Blame | View Log

powered by: WebSVN 2.1.0

© copyright 1999-2024 OpenCores.org, equivalent to Oliscience, all rights reserved. OpenCores®, registered trademark.