OpenCores
URL https://opencores.org/ocsvn/openrisc/openrisc/trunk

Subversion Repositories openrisc

[/] [openrisc/] [trunk/] [gnu-old/] [gdb-6.8/] [sim/] [testsuite/] [sim/] [sh/] [fpchg.s] - Rev 840

Compare with Previous | Blame | View Log

# sh testcase for fpchg
# mach: sh
# as(sh):	-defsym sim_cpu=0
 
	.include "testutils.inc"
 
	start
	set_grs_a5a5
	set_fprs_a5a5
	sts	fpscr, r0
	assertreg0	0
	fpchg
	sts	fpscr, r0
	assertreg0	0x80000
	fpchg
	sts	fpscr, r0
	assertreg0	0
	fpchg
	sts	fpscr, r0
	assertreg0	0x80000
	fpchg
	sts	fpscr, r0
	assertreg0	0
 
	set_greg	0xa5a5a5a5, r0
	test_grs_a5a5
	test_fprs_a5a5
 
	pass
	exit 0
 

Compare with Previous | Blame | View Log

powered by: WebSVN 2.1.0

© copyright 1999-2024 OpenCores.org, equivalent to Oliscience, all rights reserved. OpenCores®, registered trademark.