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[/] [openrisc/] [trunk/] [gnu-old/] [gdb-7.1/] [sim/] [testsuite/] [sim/] [arm/] [iwmmxt/] [tmiaxy.cgs] - Rev 842

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# Intel(r) Wireless MMX(tm) technology testcase for TMIAxy
# mach: xscale
# as: -mcpu=xscale+iwmmxt

        .include "testutils.inc"

        start

        .global tmiaXY
tmiaXY:
        # Enable access to CoProcessors 0 & 1 before
        # we attempt these instructions.

        mvi_h_gr   r1, 3
        mcr        p15, 0, r1, cr15, cr1, 0

        # Test Bottom Bottom Multilply Accumulate
        
        mvi_h_gr   r0, 0x11223344
        mvi_h_gr   r1, 0x55667788
        mvi_h_gr   r2, 0x12345678
        mvi_h_gr   r3, 0x9abcdef0

        tmcrr      wr0, r0, r1

        tmiaBB     wr0, r2, r3
        
        tmrrc      r0, r1, wr0
        
        test_h_gr  r0, 0x05f753c4
        test_h_gr  r1, 0x55667788
        test_h_gr  r2, 0x12345678
        test_h_gr  r3, 0x9abcdef0

        # Test Bottom Top Multilply Accumulate
        
        mvi_h_gr   r0, 0x11223344
        mvi_h_gr   r1, 0x55667788
        mvi_h_gr   r2, 0x12345678
        mvi_h_gr   r3, 0x9abcdef0

        tmcrr      wr0, r0, r1

        tmiaBT     wr0, r2, r3
        
        tmrrc      r0, r1, wr0
        
        test_h_gr  r0, 0xeeede364
        test_h_gr  r1, 0x55667787
        test_h_gr  r2, 0x12345678
        test_h_gr  r3, 0x9abcdef0

        # Test Top Bottom Multilply Accumulate
        
        mvi_h_gr   r0, 0x11223344
        mvi_h_gr   r1, 0x55667788
        mvi_h_gr   r2, 0x12345678
        mvi_h_gr   r3, 0x9abcdef0

        tmcrr      wr0, r0, r1

        tmiaTB     wr0, r2, r3
        
        tmrrc      r0, r1, wr0
        
        test_h_gr  r0, 0x0ec85c04
        test_h_gr  r1, 0x55667788
        test_h_gr  r2, 0x12345678
        test_h_gr  r3, 0x9abcdef0

        # Test Top Top Multilply Accumulate
        
        mvi_h_gr   r0, 0x11223344
        mvi_h_gr   r1, 0x55667788
        mvi_h_gr   r2, 0x12345678
        mvi_h_gr   r3, 0x9abcdef0

        tmcrr      wr0, r0, r1

        tmiaTT     wr0, r2, r3
        
        tmrrc      r0, r1, wr0
        
        test_h_gr  r0, 0x09eed974
        test_h_gr  r1, 0x55667788
        test_h_gr  r2, 0x12345678
        test_h_gr  r3, 0x9abcdef0

        pass

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