OpenCores
URL https://opencores.org/ocsvn/openrisc/openrisc/trunk

Subversion Repositories openrisc

[/] [openrisc/] [trunk/] [gnu-old/] [gdb-7.1/] [sim/] [testsuite/] [sim/] [fr30/] [add2.cgs] - Rev 842

Compare with Previous | Blame | View Log

# fr30 testcase for add2 $m4,$Ri
# mach(): fr30

        .include "testutils.inc"

        START

        .text
        .global add
add:
        mvi_h_gr        30,r8
        set_cc          0x0e    ; Set mask opposite of expected
        add2            -16,r8  ; Max value of immediate field
        test_cc         0 0 0 1
        test_h_gr       14,r8

        set_cc          0x0e    ; Set mask opposite of expected
        add2            -3,r8   ; Mid value of immediate field
        test_cc         0 0 0 1
        test_h_gr       11,r8

        set_cc          0x0e    ; Set mask opposite of expected
        add2            -1,r8   ; Min value of immediate field
        test_cc         0 0 0 1
        test_h_gr       10,r8

        set_cc          0x0a    ; Set mask opposite of expected
        add2            -10,r8  ; Test zero and carry bits
        test_cc         0 1 0 1
        test_h_gr       0,r8

        set_cc          0x07    ; Set mask opposite of expected
        add2            -16,r8  ; Test negative bit
        test_cc         1 0 0 0
        test_h_gr       -16,r8

        mvi_h_gr        0x80000000,r8
        set_cc          0x0c    ; Set mask opposite of expected
        add2            -1,r8   ; Test overflow bit
        test_cc         0 0 1 1
        test_h_gr       0x7fffffff,r8

        pass

Compare with Previous | Blame | View Log

powered by: WebSVN 2.1.0

© copyright 1999-2024 OpenCores.org, equivalent to Oliscience, all rights reserved. OpenCores®, registered trademark.