URL
https://opencores.org/ocsvn/openrisc/openrisc/trunk
Subversion Repositories openrisc
[/] [openrisc/] [trunk/] [gnu-old/] [gdb-7.1/] [sim/] [testsuite/] [sim/] [frv/] [fr400/] [movgs.cgs] - Rev 842
Compare with Previous | Blame | View Log
# frv testcase for movgs $GRj,iacc0[hl]
# mach: fr400
.include "../testutils.inc"
start
.global movgs
IACC0H:
set_gr_limmed 0xdead,0xbeef,gr8
and_spr_immed 0,iacc0h
movgs gr8,iacc0h
test_gr_limmed 0xdead,0xbeef,gr8
test_spr_limmed 0xdead,0xbeef,iacc0h
SPR280:
; try alternate names for iacc0h
and_spr_immed 0,280
movgs gr8,spr[280] ; iacc0h is spr number 280
test_gr_limmed 0xdead,0xbeef,gr8
test_spr_limmed 0xdead,0xbeef,spr[280]
IACC0L:
set_gr_limmed 0xdead,0xbeef,gr8
and_spr_immed 0,iacc0l
movgs gr8,iacc0l
test_gr_limmed 0xdead,0xbeef,gr8
test_spr_limmed 0xdead,0xbeef,iacc0l
SPR281:
; try alternate names for iacc0l
and_spr_immed 0,281
movgs gr8,spr[281] ; iacc0l is spr number 281
test_gr_limmed 0xdead,0xbeef,gr8
test_spr_limmed 0xdead,0xbeef,spr[281]
IACC0L_SPR281:
; try crossing between iacc0l and spr[281]
and_spr_immed 0,281
and_spr_immed 0,iacc0l
movgs gr8,spr[281] ; iacc0l is spr number 281
test_gr_limmed 0xdead,0xbeef,gr8
test_spr_limmed 0xdead,0xbeef,iacc0l
SPR280_IACC0H:
and_spr_immed 0,280
and_spr_immed 0,iacc0h
movgs gr8,iacc0h ; iacc0h is spr number 280
test_gr_limmed 0xdead,0xbeef,gr8
test_spr_limmed 0xdead,0xbeef,spr[280]
pass