URL
https://opencores.org/ocsvn/openrisc/openrisc/trunk
Subversion Repositories openrisc
[/] [openrisc/] [trunk/] [gnu-old/] [gdb-7.1/] [sim/] [testsuite/] [sim/] [frv/] [stqc.cgs] - Rev 842
Compare with Previous | Blame | View Log
# frv testcase for stqc $CPRk,@($GRi,$GRj)
# mach: frv
# as(frv): -mcpu=frv
.include "testutils.inc"
start
.global stqc
stqc:
set_mem_limmed 0xbeef,0xdead,sp
inc_gr_immed -4,sp
set_mem_limmed 0xdead,0xbeef,sp
inc_gr_immed -4,sp
set_mem_limmed 0xdead,0xdead,sp
inc_gr_immed -4,sp
set_mem_limmed 0xbeef,0xbeef,sp
set_gr_immed 0,gr7
set_cpr_limmed 0xbeef,0xdead,cpr8
set_cpr_limmed 0xdead,0xbeef,cpr9
set_cpr_limmed 0xdead,0xdead,cpr10
set_cpr_limmed 0xbeef,0xbeef,cpr11
stqc cpr8,@(sp,gr7)
test_mem_limmed 0xbeef,0xdead,sp
inc_gr_immed 4,sp
test_mem_limmed 0xdead,0xbeef,sp
inc_gr_immed 4,sp
test_mem_limmed 0xdead,0xdead,sp
inc_gr_immed 4,sp
test_mem_limmed 0xbeef,0xbeef,sp
pass