URL
https://opencores.org/ocsvn/openrisc/openrisc/trunk
Subversion Repositories openrisc
[/] [openrisc/] [trunk/] [gnu-old/] [gdb-7.1/] [sim/] [testsuite/] [sim/] [m32r/] [ldh.cgs] - Rev 816
Go to most recent revision | Compare with Previous | Blame | View Log
# m32r testcase for ldh $dr,@$sr
# mach(): m32r m32rx
.include "testutils.inc"
start
.global ldh
ldh:
mvaddr_h_gr r4, data_loc
mvi_h_gr r5, 0
ldh r5, @r4
test_h_gr r5, 0x1234 ; big endian processor
pass
data_loc:
.word 0x12345678
pass
Go to most recent revision | Compare with Previous | Blame | View Log